KR101624979B1 - Method for manufacturing solar cell, and solar cell manufactured by the same method - Google Patents

Abstract

The present invention relates to a solar cell, and more particularly, to a method of manufacturing a solar cell element from a silicon substrate and a solar cell element manufactured by the method.
The present invention provides a silicon substrate having a first semiconductor property, comprising: at least one first semiconductor layer having the same characteristics as the first semiconductor characteristic; and at least one second semiconductor layer having a second semiconductor characteristic different from the first semiconductor characteristic A silicon substrate formed on the bottom surface; A first electrode layer and a second electrode layer formed to be electrically connected to the first semiconductor layer and the second semiconductor layer, respectively; The method of manufacturing a solar cell device according to any one of claims 1 to 3, further comprising the steps of: forming a plurality of fine irregularities on the silicon substrate before the formation of the antireflection film; And a planarizing step of planarizing the bottom surface of the substrate during the step of forming irregularities or after the step of forming irregularities.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a solar cell element and a solar cell element manufactured by the method,

The present invention relates to a solar cell, and more particularly, to a method of manufacturing a solar cell element from a silicon substrate and a solar cell element manufactured by the method.

The term "solar cell" refers to a cell that generates an electromotive force by applying a photovoltaic effect, which is one of the photoelectric effects.

The solar cell is classified into a silicon solar cell, a compound semiconductor solar cell, a compound or a laminated solar cell according to the material of the substrate. Here, the silicon-based solar cell is further divided into crystalline silicon solar cells and amorphous silicon solar cells such as single crystal silicon and polycrystalline silicon.

The efficiency of the solar cell is determined by various parameters such as the reflectance of the substrate and can be maximized by minimizing the reflection of light on the receiving surface, that is, the reflectance.

In order to improve the efficiency of the solar cell, a variety of methods for minimizing the reflectance of light are also being studied in the crystalline silicon solar cell, which is low in manufacturing cost.

On the other hand, in the conventional solar cell manufacturing method, the reflectance of light is minimized through the steps of forming concavities and convexities on the light-receiving surface of the substrate, that is, the top surface.

However, in the conventional method of manufacturing a solar cell, when the unevenness forming step includes a wet etching step, etching is performed not only on the upper surface of the substrate but also on the lower surface of the substrate during the request forming step to form undesired fine irregularities on the bottom surface of the substrate .

Therefore, in the conventional solar cell manufacturing method, when a wet etching process is included in the step of forming irregularities, a mask for preventing the formation of irregularities on the bottom surface of the substrate is formed to prevent the irregularities on the bottom surface of the substrate.

However, as described above, after the mask is formed on the bottom surface of the substrate, the process is complicated and the manufacturing cost increases due to mask formation and removal.

It is an object of the present invention to provide a method of manufacturing a semiconductor device, which includes a wet etching step to form a concave and a convex on an upper surface of a substrate, And a flattening step of removing the raised ridges or fine irregularities is further performed, thereby simplifying the entire process and reducing the manufacturing cost, and a solar cell manufactured by the method.

It is another object of the present invention to provide a method of manufacturing a solar cell element capable of minimizing light reflection on the surface of a silicon substrate and a solar cell element manufactured by the method.

In order to achieve the above object, the present invention provides a silicon substrate having a first semiconductor characteristic, comprising: at least one first semiconductor layer having the same characteristics as the first semiconductor characteristic; A silicon substrate on which at least one second semiconductor layer having a second semiconductor characteristic different from the first semiconductor characteristic is formed on a bottom surface; A first electrode layer and a second electrode layer formed to be electrically connected to the first semiconductor layer and the second semiconductor layer, respectively; The method of manufacturing a solar cell device according to any one of claims 1 to 3, further comprising the steps of: forming a plurality of fine irregularities on the silicon substrate before the formation of the antireflection film; And a planarizing step of planarizing the bottom surface of the substrate during the step of forming irregularities or after the step of forming irregularities.

The step of forming the concavities and convexities may be performed only by the wet etching process.

Forming a plurality of first irregularities on an outer surface of the substrate by etching the substrate with an acidic aqueous solution; Forming a second irregularity forming step of forming second irregularities smaller than the first irregularities by dry etching the light receiving surface on the outer surface of the substrate on which the first irregularities are formed through the first irregularities forming step, And the planarizing step may be performed before the second irregularity forming step or after the second irregularity forming step.

The step of forming concavities and convexities includes a surface damage removing step of removing surface damage from a surface of the substrate by wet etching and a fine concavity and convexity forming step of dry etching the light receiving surface of the substrate to form fine irregularities, May be performed before the fine unevenness forming step or after the fine unevenness forming step.

The planarization step may be performed by wet etching.

The planarizing step may be performed by dry etching by converting the etching gas into plasma.

The etching gas used for the dry etching may include at least one of a chlorine (Cl) gas, a fluorine (F) gas, a bromine (Br) gas and an oxygen (O ₂ ) gas.

The second concavity and convexity forming step may be performed in a state where a plurality of substrates are stacked on a tray and an opening member having a plurality of openings formed on the tray is covered.

The silicon substrate may be a single crystal silicon substrate or a polycrystalline silicon substrate.

The first semiconductor characteristic may be one of p-type and n-type, and the second semiconductor characteristic may be one of n-type and p-type.

A semiconductor layer forming step of forming the first semiconductor layer and the second semiconductor layer on the bottom surface of the silicon substrate; Forming an antireflection film on an upper surface of the silicon substrate; And the electrode layer forming step of forming the first electrode layer and the second electrode layer, wherein the step of forming irregularities may be performed before or after the semiconductor layer forming step.

The present invention also discloses a solar cell element manufactured by the above-described method for manufacturing a solar cell element.

The method for manufacturing a solar cell according to the present invention and the solar cell according to the present invention are characterized in that when the step of forming irregularities on the upper surface of the substrate includes a wet etching step, a mask for preventing the formation of irregularities is formed on the bottom surface of the substrate The planarization step of removing the ridges or fine irregularities formed on the bottom surface of the substrate while performing the wet etching process is further performed to simplify the process and reduce the manufacturing cost.

Particularly, in a conventional solar cell manufacturing method, a mask is formed on the bottom surface of the substrate to prevent unevenness on the bottom surface of the substrate during the wet etching process in the step of forming irregularities to form fine irregularities, There is a problem in that the entire process is troublesome in addition to the mask forming process and the removing process.

In contrast, the present invention is advantageous in that the entire process can be simplified compared to the prior art by further performing a planarization step of removing the ridges (or fine irregularities) formed on the bottom surface of the substrate in the wet etching process without forming a mask on the bottom surface of the substrate .

Furthermore, since the mask for preventing etching is formed on the bottom surface of the substrate in the prior art, the surface damage remains on the bottom surface of the substrate, thereby affecting the subsequent process. However, There is an advantage that the surface damage remaining on the bottom surface of the substrate can be completely removed by further performing the planarization step for the substrate.

The method of manufacturing a solar cell device according to the present invention may include forming first concave and convex portions by the first convexo-concave forming step by wetting and second concave concave and convex forming by dry, that is, second concave-convex forming by dry etching There is an advantage that the reflectance of the silicon substrate of the solar cell element can be remarkably reduced and the efficiency of the solar cell can be improved.

In particular, the first unevenness forming step is advantageous in that the reproducibility and reliability of the process can be improved by carrying out the step of forming the unevenness using an acidic aqueous solution which is carried out at a low temperature without using an alkali aqueous solution which is carried out at a high temperature.

In addition, the area ratio of the actual surface area and the abnormal area of the silicon substrate etched in the first concavity and convexity formation step is set to 1.2 to 3.2, which is advantageous in maximizing the reduction of the reflectance due to the surface treatment.

In addition, the method for manufacturing a solar cell element according to the present invention has an advantage of shortening a process time by dry etching for forming fine irregularities by including a first irregularity forming step of forming irregularities by wet etching.

Further, the method of manufacturing a solar cell device according to the present invention includes a first irregularity forming step of forming irregularities by wet etching, so that when a plurality of substrates are etched in the second irregularity forming step by dry etching, There is an advantage that the color difference can be improved.

1 is a process diagram showing a method of manufacturing a solar cell device according to the present invention.
FIGS. 2A and 2B are process charts of Example 2 and Example 3 of the roughening step of the solar cell manufacturing method of FIG. 1, respectively.
3 is a bottom view showing the bottom surface of the solar cell element of FIG.
4A to 4D are cross-sectional views illustrating states corresponding to the method of manufacturing the solar cell element of FIG.
FIG. 5 is a partial cross-sectional view showing a substrate that has been first surface-treated by the first irregularities forming step in the step of forming irregularities in the method of manufacturing the solar cell element of FIG. 2B.
FIG. 6 is a conceptual view showing a state in which irregularities are formed by the first irregularities forming step of the irregularities forming step in the manufacturing method of the solar cell element of FIG. 2b.
7A to 7C are cross-sectional views showing states corresponding to another example of the method of manufacturing the solar cell element of FIG.

Hereinafter, a method for manufacturing a solar cell device according to the present invention and a solar cell fabricated by the method will be described in detail with reference to the accompanying drawings.

For convenience of description, hatching, which is a sectional view, is omitted in the drawings attached to the present specification, and dimensions and the like are displayed differently from actual ones.

1 is a bottom view showing a bottom surface of the solar cell element of FIG. 1, and FIGS. 4A to 4D are cross-sectional views illustrating a method of manufacturing the solar cell element of FIG. 1 As shown in Fig.

A method of manufacturing a solar cell device according to the present invention includes forming a semiconductor layer (S110) as shown in FIGS. 1 to 4D; A concavity and convexity formation step (S120); A planarization step S230; Anti-reflection film formation step S140; And an electrode layer forming step (S150).

A solar cell device manufactured by the method of manufacturing a solar cell device according to the present invention has a so-called interdigitated back (IBC) structure in which two electrodes are formed on the bottom surface of the substrate, 4D, a first semiconductor layer 111 having a first semiconductor property and at least one second semiconductor layer 112 having a second semiconductor property are formed on a bottom surface A silicon substrate (110) having a first semiconductor characteristic; A first electrode layer 210 and a second electrode layer 220 formed to be electrically connected to the first semiconductor layer 111 and the second semiconductor layer 112, respectively; And an antireflection film 120 formed on the upper surface of the silicon substrate 110.

Here, the silicon substrate 110 is a crystalline silicon substrate such as a single crystal or a polycrystal, and has any one of n-type semiconductor characteristics or p-type semiconductor characteristics doped with impurities.

The silicon substrate 110 may be manufactured by various manufacturing methods and may be manufactured by processing the silicon substrate 110 by slicing the silicon ingot into a device such as a wire saw from a silicon ingot .

At this time, the silicon substrate 110 may have various thicknesses depending on design conditions, and may have a thickness of about 100 to 400 탆.

Hereinafter, a method of manufacturing a solar cell device according to the present invention will be described in detail.

1. Semiconductor layer formation step ( S110 )

The semiconductor layer forming step S110 is a step of forming a first semiconductor layer 111 and a second semiconductor layer 112 on the bottom surface of the silicon substrate 110 to form an IBC solar cell element.

The first semiconductor layer 111 and the second semiconductor layer 112 are selected from p-type and n-type semiconductor layers and have opposite semiconductor characteristics. When the first semiconductor layer 111 has a p-type, Layer 112 has an n-type which is the opposite semiconductor characteristic.

The first semiconductor layer 111 and the second semiconductor layer 112 are formed by a semiconductor process as shown in FIG. 4A. The semiconductor process such as deposition and etching is repeated several times to form a silicon substrate 110 As shown in Fig.

Meanwhile, the order of forming the first semiconductor layer 111 and the second semiconductor layer 112 may be changed. Various materials may be used for the impurities for forming the semiconductor layers 111 and 112, and the impurity diffusion method Various methods can be used.

The first semiconductor layer 111 and the second semiconductor layer 112 are not laminated to each other to generate an electromotive force when receiving light through the upper surface of the silicon substrate 110, Respectively.

The first semiconductor layer 111 is preferably formed to have a higher impurity concentration than the silicon substrate 110, that is, p + or n + having a higher impurity concentration than the silicon substrate 110.

2. Unevenness formation step

The concavity and convexity forming step S120 is a step of forming a plurality of fine concavities and convexities 20 on the light receiving surface of the substrate 110 to lower the reflectivity to light and may be performed only by a wet etching process or a combination of a wet etching process and a dry etching process Lt; / RTI >

1) Unevenness Formation Example 1 ( In the wet etching process  Only performed by

If the unevenness forming step (S120) is performed by a wet etching process alone, it may be performed by an aqueous alkali solution or an aqueous acid solution.

At this time, if the silicon substrate is monocrystalline silicon, it is performed by an aqueous alkali solution, and in the case of polycrystalline silicon, it is preferably performed by an acidic aqueous solution such as a mixed aqueous solution of HF and HNO ₃ .

2) Unevenness Formation Example 2 ( Wet etching process  And Of the dry etching process  Combination 1)

2A is a process diagram of Embodiment 2 of the step of forming concavities and convexities in the solar cell manufacturing method of FIG.

Meanwhile, the concavity and convexity forming step S120 may be a combination of wet etching and dry etching. As shown in FIG. 2A, the concavity and convexity forming step S120 may include a step of removing a surface damage from the surface of the substrate 110 by wet etching And a second step of forming a plurality of fine irregularities such as the second irregularities 20 by dry etching the light receiving surface of the substrate 110 on which the antireflection film 120 is to be formed, (S220).

The surface damage removing step (S210) is a step of removing damage with an acidic aqueous solution or an alkaline aqueous solution, which is damaged in a slicing process for manufacturing the crystalline silicon substrate (110).

Here, the acidic aqueous solution may be a mixed aqueous solution of HNO ₃ and HF, HNO ₃ , HF and CH ₃ COOH (or deionized water). Wherein the ratio of H ₂ O in the mixed aqueous solution is determined by the choice of one of ordinary skill in the art to which the present invention pertains.

The substrate damage treatment step may be performed at about 80 ° C to 90 ° C for about 15 minutes to about 25 minutes in the case of an alkaline aqueous solution. Here, NaOH or KOH is used as the alkali aqueous solution, and IPA (2-isopropyl-alcohol) may be further mixed.

Particularly, in the step of damaging the substrate, it is preferable to use an aqueous alkali solution when the silicon substrate is single crystal and use an acidic aqueous solution when the silicon substrate is polycrystalline.

The fine concavity and convexity forming step S220 is similar to the second concavity and convexity forming step S320 of the third embodiment described later, and a detailed description thereof will be omitted.

3) Example 3 of formation of concavity and convexity Wet etching process  And Of the dry etching process  Combination 2)

FIG. 2B is a process diagram of Embodiment 3 of the step of forming the concavo-convex of the solar cell manufacturing method of FIG. 1, FIG. 5 is a schematic view of a method of manufacturing the solar cell element of FIG. And FIG. 6 is a conceptual view showing a state in which unevenness is formed by the first irregularities forming step of the irregularities forming step in the method of manufacturing the solar cell element of FIG. 2B. FIGS. 5 and 6 are schematically shown for convenience of explanation. Actually, there are variations in the etching depth and the height, size, etc. at the top, and the shape of the cross section and the actual shape are irregular and various.

2B, the silicon substrate 110 is etched with an acidic aqueous solution to form a first concavo-convex structure (not shown) for forming a plurality of first concavities 10 on the outer surface of the silicon substrate 110 Step S310; The upper surface of the silicon substrate 110 to be formed on the outer surface of the silicon substrate 110 on which the plurality of first irregularities 10 are formed through the first irregularity formation step S310 is dry etched, And a second concavity and convexity forming step (S320) for forming two concave and convex portions 20.

i. The first unevenness forming step ( S310 )

The first concavity and convexity forming step S310 is a step of forming the first concavity and convexity 10 by etching the outer surface of the silicon substrate 110 with an alkaline aqueous solution or an acidic aqueous solution. In particular, the first concavity and convexity forming step S310 is to form a plurality of first concavities and convexities 10 on the outer surface of the silicon substrate 110 as shown in FIG. 4B and FIG.

In the case where the acidic aqueous solution is used in the first concavity and convexity formation step S310, it is possible to secure a lower reflectance on the upper surface of the silicon substrate 110 on which the antireflection film 120 is to be formed, The efficiency of the solar cell can be improved by increasing the amount of received light.

In addition, when the alkaline aqueous solution is used in the first concavity and convexity formation step S310, the dependency of the silicon substrate 110 on the material is large, and when the acidic aqueous solution is used, the dependence on the material of the silicon substrate 110 can be reduced.

An aqueous solution containing HNO ₃ and HF may be used as the acidic aqueous solution used in the first irregularity formation step (S310), and the mass ratio and concentration thereof are determined in consideration of the etching temperature, etching depth, and the like.

It is preferable that the substantial mass ratio of HNO ₃ and HF in the aqueous solution in the acidic aqueous solution used in the first unevenness formation step (S310) is 1: 1 to 5.5: 1. Wherein the acidic aqueous solution may further comprise a surface activating agent and a catalyst. At this time, the substrate 110 is preferably a polycrystalline silicon substrate in consideration of the use of an acidic aqueous solution.

On the other hand, an aqueous solution containing HNO ₃ , HF and CH ₃ COOH (or deionized water) may be used as the acidic aqueous solution.

At this time, it is preferable that the etching depth to be etched by the first concavity and convexity forming step S310 is 1 탆 to 10 탆.

The first unevenness forming step S310 may include an inline method or an alkaline method in which the silicon substrate 110 is transported by a roller to an alkaline aqueous solution or an acidic aqueous solution, preferably a wet station containing the acidic aqueous solution, By dipping in a wet station containing an aqueous solution or an acidic aqueous solution, preferably an acidic aqueous solution, and performing etching.

At this time, when the first unevenness forming step S310 is performed in an in-line method, the etching may be performed at a temperature of 6 to 10 ° C for 1 minute to 10 minutes.

When the first unevenness forming step S310 is performed by the dipping method, the first unevenness forming step S310 may be performed at a temperature of 6 ° C to 10 ° C for 15 to 25 minutes.

Meanwhile, the first concavity and convexity forming step S310 may be performed by a wet process such as an acidic aqueous solution, and may further include a subsequent process such as drying the surface of the silicon substrate 110 after etching.

It said first irregularities are etched in the forming step (S310) a plurality of first concave and convex 10 are the actual surface area of the upper surface is anti-reflection film 120 is formed of the outer surface of the formed silicon substrate 110, the actual surface area of the outer surface (S _r ) And the surface area of the surface in a state where the surface is completely flat is defined as an ideal area S _i , the silicon substrate 110 after the first concavity and convexity formation step (S310) , the area ratio of the actual surface area (S _r) for at least the area (S _i) is preferably from 1.2 to 3.2.

If the area ratio is smaller than 1.2, the degree of the irregularity 10 is small, so that the decrease in reflectance due to the first irregularity formation step S310 is not large.

Also, when the area ratio is larger than 3.2, there is a problem that the surface treatment effect is reduced because the reaction by the plasma is not large in the second unevenness formation step (S320) as the subsequent step. Further, when the area ratio is larger than 3.2, there is a problem that the diffusion process of the metal material for electrode formation is interrupted in the electrode forming step (S150), which is a subsequent process of the solar cell manufacturing method, and adversely affects a subsequent process such as forming voids.

ii . The second unevenness forming step ( S320 )

The second unevenness forming step S320 is a step of forming a second unevenness forming step S310 by dry etching the upper surface of the outer surface of the silicon substrate 110 on which the anti-reflection film 120 is to be formed, ).

In particular, the second concavity and convexity forming step S320 is to form a plurality of second concavities 20 on the upper surface of the silicon substrate 110 as shown in FIG. 4C. The second irregularities (20) are fine irregularities smaller than the first irregularities (10).

The first irregularities 10 may be formed in a hemispherical shape having an etching depth of about 1 탆 to about 10 탆 and a diameter of about 2 탆 to about 20 탆 (when considered as an ideal shape) The concavity and convexity 20 has a substantially pyramid shape and may have a size of about 100 nm to 800 nm.

The dry etching performed in the second concavity and convexity forming step S320 may be performed by reactive ion etching (RIE) or inductively coupled plasma (ICP) using a process module.

The etching gas used for dry etching may be Cl ₂ / CF ₄ / O ₂ , SF ₆ / O ₂ , CHF ₃ / SF ₆ / O ₂ , NF ₃ , F _2, and mixtures thereof. The etching time is about several seconds to several minutes.

When the dry etching is performed by RIE, the dry etching by RIE is performed by providing an opening member having a plurality of openings formed on the upper surface of the silicon substrate 110 to facilitate the formation of the second irregularities 20 .

At this time, the dry etching can be performed by transferring the silicon substrate 110 through a tray on which a plurality of silicon substrates 110 are mounted, and loading the substrate on the substrate support in the process module.

Meanwhile, the upper surface of the silicon substrate 110 after surface treatment by the second concavity and convexity forming step S320 is as shown in FIG. 4C.

A plurality of minute irregularities 20 smaller than the first irregularities 10 formed by the first irregularity forming step S310 are formed on the upper surface of the silicon substrate 110. [

As shown in FIG. 4C, the second irregularities 20 have a substantially triangular cross-section (substantially pyramid shape), and the sides of the first irregularities 10 toward the normal side are shorter than the opposite sides .

4B, the silicon substrate 110 is processed by using an acidic aqueous solution, that is, by wet etching, so that the first irregularities 10 are formed on the antireflection film 120 Are formed on the upper surface and the opposite surface, that is, the bottom surface and the outer surface including the side surface.

iii . The semiconductor layer forming step (S110) and  The related step of forming irregularities ( S120 )

7A to 7C are cross-sectional views showing states corresponding to another example of the method of manufacturing the solar cell element of FIG.

4A to 4D, instead of performing the step of forming a semiconductor layer (S110), the step of forming the concavities and convexities (S120) may be performed by forming a semiconductor layer (S110 ). ≪ / RTI >

An example in which the concavity and convexity formation step S120 is performed after the semiconductor layer formation step S110 will be described with reference to Embodiment 3 of the concavity and convexity formation step S120.

The first unevenness forming step S310 and the second unevenness forming step S320 as the unevenness forming step S120 are sequentially performed as shown in FIGS. 7A and 7B to form the first unevenness 10 and the second unevenness (20) is formed.

On the other hand, after the first semiconductor layer 111 and the second semiconductor layer 112 are formed in the semiconductor layer forming step S110, which will be described later, the first semiconductor layer 111 is formed on the upper surface of the silicon substrate 110 Since the layer 150 is formed at the same time, the anti-reflection film forming step S140 may be performed immediately without forming the protective layer forming step S130.

In the method of manufacturing the solar cell substrate according to the present invention, the reflectance of the substrate 110 is measured after performing the first irregularities forming step and the second irregularities forming step, %, 350 nm ~ 1050 nm) was 28.96, which was 7.79.

Further, in the manufacturing method of the solar cell device according to the present invention, after the first concave-convex forming step and the second concave-convex forming step, which are concave and convex forming steps, were performed, the reflectance after the formation of the antireflection film 120 by PECVD was 1.40.

3. Planarization phase ( S230 )

The planarization step S230 may be performed by removing the protrusions or protrusions formed on the bottom surface of the silicon substrate 110 by a wet etching process (for example, removing the first protrusions 10, Dry etching such as RIE or ICP, or wet etching using an alkaline aqueous solution or an acidic aqueous solution or the like.

The flattening step S230 is to remove irregularities or ridges formed on the bottom surface of the silicon substrate 110 by a wet etching process in the process of forming the irregularities in step S120. May be performed immediately after the wet etching process (during the step of forming the concave-convex portion) or after the entire process of forming the concavity and convexity (S120).

That is, in the case of Embodiment 2 or 3 of the concavity and convexity formation step S120, the planarization step S230 may be performed during the concavity and convexity formation step S120, that is, during the surface damage removal step S210 or the first concavity and convexity formation step S310 And may be performed immediately after the formation of the concavity and convexity and the concave-convex-concavity formation step (S220) or the second concavo-convex formation step (S320), or after the concavity and convexity formation step (S120).

For example, the planarization step S230 may be performed by loading the substrate 110 into the process module, which is a dry etching equipment, such that the bottom surface of the substrate 110 faces upward after the surface damage removal step S210 or the first concavity and convexity formation step S310. Alternatively, ICP can be used to perform about 3 to 10 micrometers of etching to perform planarization.

The process module 100 for performing the planarization step S230 may have any configuration as long as it can perform RIE and ICP.

The planarizing step S230 may be performed after the opening member having a plurality of openings formed on the tray on which the substrates 110 are stacked is dumped so that the flattening step S230 can be performed uniformly.

The opening material prevents the plasma from being directly exposed to the substrate 110 when the silicon substrate 110 is etched by the RIE, while the strength of the plasma applied on the substrate 110 is reduced to uniformly planarize .

The opening material is preferably formed such that a space formed between the substrate 110 and the opening is opened to the side.

As described above, when the space formed between the substrate 110 and the opening is opened to the side, the etching material generated by etching the silicon substrate 110 flows through the open side of the opening material, Step S230 can be performed more smoothly.

The opening material is preferably covered on the tray outside the process module in consideration of the structure of the process module.

On the other hand, and the etching gas used in the leveling step (S230) includes chlorine (Cl) based gas, a fluorine (F) based gas, a bromine at least one of (Br) based gas and oxygen (O ₂₎ based gas, SF ₆ / O ₂ , SF ₆ / N ₂ and NF ₃ , CF ₄ , NF ₃ , ClF ₃ , F ₂ and mixtures thereof can be used. The etching time is about several seconds to several minutes.

As a result of performing the planarization step S230 as described above, it is not necessary to form the mask and remove the mask used to prevent the unevenness on the bottom surface of the substrate 110 from being formed through the conventional wet etching, The surface treatment time can be shortened.

In addition, when the planarization step (S230) is performed as described above, since mask formation and mask removal processes are unnecessary, it is possible to reduce manufacturing cost, shorten the manufacturing time, and secure a flat bottom surface.

Meanwhile, as described above, the unevenness forming step S120 may be performed before the semiconductor layer forming step S110, or may be performed after the semiconductor layer forming step S110.

Here, if the concavity and convexity formation step S120 is performed after the semiconductor layer formation step S110, the planarization step S230 may be performed immediately after the first concavo-convex formation step S310 of forming the first concavoconvex 10, Is performed after the step S320 is performed to remove the first concavity 10 from the bottom surface of the silicon substrate 110 as shown in FIG. 7B.

It is preferable that the first semiconductor layer 111 and the second semiconductor layer 112 are formed to have a sufficient depth in consideration of etch through the unevenness forming step S120 and the planarizing step S230.

If the planarization step S230 is further performed as described above, the mask is not formed to protect the first semiconductor layer 111 and the second semiconductor layer 112 formed by the semiconductor layer forming step S110, ) Can be performed, and thus the entire process can be simplified.

If the planarization step S230 is performed by wet etching, only the bottom surface should be etched so that the substrate 1 is transferred to a wet station containing an aqueous alkaline solution or an acidic aqueous solution, preferably an acidic aqueous solution, Is performed.

4. Antireflection film forming step ( S140 )

4D, the anti-reflection film forming step S140 may include forming an anti-reflection film 120 on the upper surface of the silicon substrate 110 to minimize reflection of light and protect the upper surface of the silicon substrate 110 .

The anti-reflection film 120 may be formed on the upper surface of the substrate 110 by vapor deposition or the like using SiN _x , TiO ₂ , SiO ₂ , MgO, ITO, SnO ₂ , ZnO, or the like.

Meanwhile, a protection layer forming step (S130) for forming the protection layer 140 may be further performed before the anti-reflection film forming step S140.

5. Electrode layer formation step ( S150 )

As shown in FIG. 4D, the electrode layer forming step S150 may be any method that can form the first electrode layer 210 and the second electrode layer 220 as long as the electrodes can be formed.

The first electrode layer 210 and the second electrode layer 220 are electrically connected to the first semiconductor layer 111 and the second semiconductor layer 112 to receive light through the upper surface of the silicon substrate 110 And is configured to transmit the electromotive force to the outside.

The first electrode layer 210 and the second electrode layer 220 may have various shapes such as being integrally connected when viewed from the bottom surface of the silicon substrate 110. As shown in FIG. 3, And each branch may be positioned so as to intersect with each other.

The first electrode layer 210 and the second electrode layer 220 are formed in a rod shape when viewed from the bottom surface of the silicon substrate 110 and the first semiconductor layer 111 and the second semiconductor layer 112, The first electrode layer 210, and the second electrode layer 220 may be alternately disposed.

Since the first semiconductor layer 111 and the second semiconductor layer 112 correspond to the first electrode layer 210 and the second electrode layer 220, the first electrode layer 210 and the second electrode layer 210, as viewed from the bottom surface of the silicon substrate 110, And has a shape similar to that of the second electrode layer 220.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention as defined in the appended claims. It is to be understood that both the technical idea and the technical spirit of the invention are included in the scope of the present invention.

110: silicon substrate
111: first semiconductor layer 112: first semiconductor layer
120: antireflection film
210: first electrode layer 220: second electrode layer
10: first unevenness 20: second unevenness (fine unevenness)

Claims (12)

A silicon substrate having a first semiconductor characteristic, comprising: at least one first semiconductor layer having the same characteristics as the first semiconductor characteristic; and at least one second semiconductor layer having a second semiconductor characteristic different from the first semiconductor characteristic, A silicon substrate; A first electrode layer and a second electrode layer formed to be electrically connected to the first semiconductor layer and the second semiconductor layer, respectively; And an antireflection film formed on an upper surface of the silicon substrate,
A concavo-convex forming step of performing a wet etching process to form a plurality of fine irregularities on an upper surface of the silicon substrate before forming the antireflection film;
And a planarizing step of planarizing the bottom surface of the substrate during the step of forming irregularities or after the step of forming irregularities,
In the step of forming irregularities,
Forming a plurality of first irregularities on an outer surface of the substrate by etching the substrate with an acidic aqueous solution;
Forming a second irregularity forming step of forming second irregularities smaller than the first irregularities by dry etching the light receiving surface on the outer surface of the substrate on which the first irregularities are formed through the first irregularities forming step, In addition,
Wherein the flattening step includes removing the first irregularities formed in the first irregularities forming step,
Wherein the planarization step is performed before the second unevenness formation step or after the second unevenness formation step. delete delete delete The method according to claim 1,
Wherein the planarizing step is performed by wet etching. The method according to claim 1,
Wherein the planarizing step is performed by dry etching the etching gas into a plasma. The method of claim 6,
The etching gas used in the dry etching is a chlorine (Cl) based gas, a fluorine (F) based gas, a bromine (Br) based gas and oxygen (O ₂₎ based solar cells, characterized in that at least comprises one of gas ≪ / RTI > The method according to claim 1,
Wherein the second concave-convex forming step is performed in a state where a plurality of substrates are stacked on a tray and an opening member having a plurality of openings formed on the tray is covered. The method according to claim 1,
Wherein the silicon substrate is a single crystal silicon substrate or a polycrystalline silicon substrate. The method according to claim 1,
Wherein the first semiconductor characteristic is one of a p-type and an n-type, and the second semiconductor characteristic is the remaining one of n-type and p-type. The method according to claim 1,
A semiconductor layer forming step of forming the first semiconductor layer and the second semiconductor layer on the bottom surface of the silicon substrate; Forming an antireflection film on an upper surface of the silicon substrate; And an electrode layer forming step of forming the first electrode layer and the second electrode layer,
Wherein the concavity and convexity forming step is performed before or after the semiconductor layer forming step. A solar cell element manufactured by the method for manufacturing a solar cell element according to any one of claims 1, 5 to 11.

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