JP4587988B2 - Method for manufacturing solar cell element - Google Patents

Description

  The present invention relates to a method for roughening a semiconductor substrate, and more particularly to a method for roughening a semiconductor substrate in which a surface of the semiconductor substrate is roughened by a reactive ion etching method.

  When a solar cell element is formed using a silicon substrate, if the substrate surface is etched with an alkaline aqueous solution such as sodium hydroxide, fine irregularities are formed on the surface, and reflection on the substrate surface can be reduced to some extent.

  When a single crystal silicon substrate having a (100) plane orientation is used, a pyramid structure called a texture structure can be uniformly formed on the substrate surface by such a method, but a solar cell element using a polycrystalline silicon substrate. In the case of forming the film, the etching with the alkaline aqueous solution depends on the crystal plane orientation, so that the pyramid structure cannot be formed uniformly, and the overall reflectance cannot be effectively reduced.

  In order to solve such problems, it has been proposed that when a solar cell element is formed of a polycrystalline silicon substrate, a fine protrusion is formed on the surface of the substrate by a reactive ion etching (RIE) method. (See, for example, Japanese Patent Publication No. 60-27195, Japanese Patent Laid-Open No. 5-75152, and Japanese Patent Laid-Open No. 9-102625).

  According to this method, fine protrusions can be formed uniformly without being influenced by the plane orientation of the irregular crystal in the polycrystalline silicon. Especially in the solar cell element using polycrystalline silicon, the reflectance Can be reduced more effectively.

  A crystalline silicon solar cell is usually formed using a wafer obtained by slicing an ingot. At this time, since the surface of the wafer is damaged by slicing, it is necessary to remove the damaged layer before forming the surface junction (impurity diffusion region). This depth is usually about 10 to 15 μm, but even if the surface is roughened by the RIE method, the depth of the unevenness is at most several μm, which is insufficient for removing the damaged layer. Therefore, it is necessary to remove most of the damaged layer before making the surface rough by the RIE method. In order to remove such a damaged layer, hydrofluoric acid or sodium hydroxide aqueous solution is usually used.

  However, when these liquids are used for washing and drying and then roughening by RIE, there is a problem that unevenness is formed when the irregularities are formed. In particular, in the uneven portion, there are many gaps between the irregularities, and sufficient irregularities cannot be formed, leading to an increase in the surface reflectance of the solar cell, which causes a decrease in solar cell characteristics.

  Further, when unevenness is formed on the entire surface of the wafer, the entire surface becomes dark, so that unevenness is easily noticeable, and the aesthetic appearance when made into a product is significantly impaired.

  This unevenness is not caused by RIE in-plane uniformity, but is caused by cleaning unevenness and drying unevenness before RIE. That is, if a slight oxide film or the like is partially present on the substrate surface due to uneven cleaning or dry unevenness, it affects the formation of irregularities by RIE, resulting in unevenness as a whole.

  The present invention has been made in view of such problems of the prior art, and has a roughened semiconductor substrate that solves the problem of the conventional method that the RIE process can cause unevenness on one main surface side of the semiconductor substrate. The purpose is to provide the law.

To achieve the above object, the manufacturing method of the solar cell element of the present invention, in the manufacturing method of the solar battery cell including the step of the surface of the crystalline silicon substrate on rough surface, the oxide layer on the surface of the crystalline silicon substrate Is removed by a reactive ion etching method using a fluorine compound gas, and then the surface of the crystalline silicon substrate is roughened by a reactive ion etching method using a fluorine compound gas, a chlorine gas, and an oxygen gas .

According to the method for producing a solar cell element of the present invention, after removing the oxide layer on the surface of the crystalline silicon substrate by a reactive ion etching method using a fluorine compound gas, the surface of the crystalline silicon substrate is subjected to a fluorine compound gas, Since the surface is roughened by a reactive ion etching method using chlorine gas and oxygen gas, the unevenness can be uniformly formed over the entire surface of the silicon wafer. Accordingly, the reflectance on the substrate surface can be reduced to improve the characteristics, and the aesthetics can be improved.

Embodiments of the present invention will be described below in detail with reference to the accompanying drawings.

  FIG. 1 is a process diagram showing a method of roughening a semiconductor substrate, taking a method for forming a solar cell element as an example, FIG. 2 is a sectional view, 1 is a semiconductor substrate, 2 is an antireflection film, 3 is a surface electrode, 4 is a back electrode.

  First, a semiconductor substrate 1 made of silicon containing one conductivity type semiconductor impurity is prepared.

The semiconductor substrate 1 made of silicon or the like is cut out to a predetermined size from an ingot (see FIG. 2A). The silicon substrate 1 is made of a single crystal silicon substrate or a polycrystalline silicon substrate. This silicon substrate 1 is a substrate containing about 1 × 10 ¹⁶ atoms / cm ^{3 of} one conductivity type semiconductor impurity and having a specific resistance of about 1.5 Ωcm. The silicon substrate 1 may be either p-type or n-type. In the case of monocrystalline silicon, it is formed by a pulling method or the like, and in the case of polycrystalline silicon, it is formed by a casting method or the like. Polycrystalline silicon can be mass-produced and is extremely advantageous over single-crystal silicon in terms of manufacturing cost. An ingot formed by a pulling method or a casting method is sliced to a thickness of about 300 μm and cut into a size of about 10 cm × 10 cm or 15 cm × 15 cm to form a silicon substrate.

Next, in order to remove the slice damage on the surface portion of the silicon substrate 1, the silicon substrate 1 is immersed in hydrofluoric acid or a sodium hydroxide aqueous solution and etched by about 15 μm. An aqueous solution of HNO ₃ : HF = 7: 1 can be used as hydrofluoric acid, and an aqueous solution of about 15% can be used as sodium hydroxide.

  Next, it is washed with water and immersed in a 10% HF aqueous solution for several seconds to remove the oxide film on the surface. After washing with water, it is further immersed in a 0.3 wt% NaOH aqueous solution for several seconds to remove the stainless film (silicon amorphous film). May be. It is because it may adhere by HF processing. This HF and NaOH process is repeated several times until the surface completely repels water.

  Next, after washing with water, it is put into a liquid having oxidizing power such as nitric acid and sulfuric acid for several minutes to form an oxide film uniformly on the substrate surface. This oxide film is preferably several nm or less in order to form unevenness in the RIE process without unevenness. In this way, when an oxide film is formed on the surface of the substrate and RIE is performed, the oxide film is uniformly etched and formation of unevenness is started simultaneously over the entire surface, so that unevenness can be formed without unevenness.

Next, many fine protrusions 1c are formed by the RIE method. That is, plasma is generated in the chamber by some method, a wafer is placed on a flat substrate holder, and a high frequency or DC voltage is applied thereto. Ions generated in the plasma enter the substrate by an electric field and perform etching together with radicals. In the present invention, for example, about 5 to 20 sccm of trifluoromethane (CHF ₃ ), about 50 to 100 sccm of chlorine (Cl ₂ ), about 5 to 15 sccm of oxygen (O ₂ ), and sulfur hexafluoride (SF ₆ ) For about 10 seconds to 15 minutes at a reaction pressure of about 50 mTorr and an RF power of about 300 to 500 W for applying plasma. As a result, a large number of fine protrusions 1c each having a width and a height of 2 μm or less are formed. When the width and height of the protrusion 1c are 2 μm or more, the etching processing time becomes long. In order to form the fine protrusions 1c uniformly and accurately over the entire surface on the surface side of the silicon substrate 1, 1 μm or less is preferable. In addition, even though these minute protrusions are extremely small, they have an effect of reducing reflection. However, in order to form the projections uniformly and accurately in the plane, it is desirable that the thickness be 1 nm or more in the manufacturing process.

  Next, a layer 1a containing the reverse conductivity type semiconductor impurity is formed on the surface portion of the silicon substrate 1 by diffusing the reverse conductivity type semiconductor impurity by a vapor phase diffusion method, a coating diffusion method, or an ion implantation method. The other part is etched so that the layer 1a remains only on the surface side of the substrate 1 (see FIG. 4C).

On the surface side of the silicon substrate 1, a layer 1a in which a reverse conductivity type semiconductor impurity is diffused is formed. The layer 1a in which the reverse conductivity type semiconductor impurity is diffused is provided to form a semiconductor junction in the silicon substrate 1. For example, when n-type impurity is diffused, vapor phase diffusion using POCl ₃ is performed. And a coating diffusion method using P ₂ O ₅ and an ion implantation method for directly diffusing P ⁺ ions. The layer containing the reverse conductivity type semiconductor impurity is formed to a depth of about 0.1 to 0.5 μm.

  Next, a layer in which one conductivity type semiconductor impurity is diffused in a large amount on the back surface side of the silicon substrate 1 by applying and baking a metal paste mainly composed of aluminum (Al) or the like on the back surface side of the silicon substrate 1. 1b is formed (see FIG. 4D).

  On the back side of the silicon substrate 1, it is desirable to form a layer 1b in which one conductivity type semiconductor impurity is diffused at a high concentration. The layer 1b in which the one-conductivity-type semiconductor impurity is diffused at a high concentration forms an internal electric field on the back surface side of the silicon substrate 1 in order to prevent a decrease in efficiency due to carrier recombination near the back surface of the silicon substrate 1. is there. In other words, as a result of the carriers generated near the back surface of the silicon substrate being accelerated by this electric field, the electric power is effectively extracted, and particularly the long wavelength photosensitivity increases and the deterioration of the solar cell characteristics at high temperatures can be reduced. . As described above, the sheet resistance on the back surface side of the silicon substrate 1 on which the layer 1b in which one conductivity type semiconductor impurity is diffused at a high concentration is formed is about 15Ω / □.

  Next, an antireflection film 2 made of, for example, a silicon nitride film or the like is formed on the surface side of the silicon substrate 1 by a plasma CVD method or the like to a thickness of about 500 to 2000 mm (see FIG. 4E).

The antireflection film 2 is provided in order to prevent light from being reflected from the surface of the silicon substrate 1 and to effectively incorporate light into the silicon substrate 1. This antireflection film is made of a material having a refractive index of about 2 in consideration of the refractive index difference from the silicon substrate 1, and is a silicon nitride (SiN _x ) film or silicon oxide (SiO ₂ ) having a thickness of about 500 to 2000 mm. ) Consists of a film or the like.

  Finally, silver (Ag) is baked or sputtered on both the front and back surfaces of the silicon substrate 1, and copper (Cu) is plated to complete the finger electrode 3 and the bus bar electrode 4 (see FIG. 8F). .

  A surface electrode 3 is formed on the surface side of the silicon substrate 1. The surface electrode 3 is made of a two-layer structure of silver (Ag) and copper (Cu). The surface electrode 3 is composed of, for example, a large number of finger electrodes formed with a width of about 80 μm and a pitch of about 1.6 mm, and two bus bar electrodes that connect the large number of finger electrodes to each other. A solder layer or the like for connecting a plurality of solar cell elements with lead wires is deposited on the surface portion of the surface electrode 3.

  A back electrode 4 is formed on the back side of the silicon substrate 1. The back electrode 4 is also made of a two-layer structure of silver (Ag) and copper (Cu), and a solder layer is formed thereon.

It will now be described with reference to embodiments of a method for manufacturing a solar cell element according to claim 1 in FIG.

In this method of roughening a semiconductor substrate, the surface region of the semiconductor substrate is removed by a reactive ion etching method, and then the surface of the semiconductor substrate is roughened by a reactive ion etching method. In this case, after removing the surface region of the semiconductor substrate using a fluorine compound gas such as SF ₆ or CF ₄ , a rough surface using a fluorine compound gas such as fluorinated methane gas and sulfur fluoride gas, chlorine gas, and oxygen gas is used. Shape.

  In other words, the slice damage before the RIE process is removed by etching, washed and dried, and then the surface area of the semiconductor substrate is removed using a fluorine compound gas in the same chamber before the surface is roughened in the RIE chamber. To do.

In order to remove the slice damage of the 15 cm × 15 cm square polycrystalline silicon substrate, etching was performed on a single side of about 15 μm in a mixed acid (HNO ₃ : HF = 7: 1, 30 ° C.). After washing with water, it was immersed in a 10% HF aqueous solution for several seconds to remove the oxide film on the surface. After washing with water and drying, it was placed in a vacuum chamber and the surface layer was etched by RIE. The conditions at this time are SF ₆ = ₆₀ sccm, reaction pressure 50 mTorr, RF power 300 W, and 1 minute. Next, a reaction pressure of 50 mTorr and an RF power are applied while flowing 10 sccm of trifluoromethane (CHF ₃ ), 75 sccm of chlorine (Cl ₂ ), 10 sccm of oxygen (O ₂ ), and 70 sccm of sulfur hexafluoride (SF ₆ ). Etching was performed at 300 W for 10 minutes to form a rough surface. As a result, there was no unevenness and uniform irregularities were formed.

In order to remove the slice damage of the 15 cm × 15 cm square polycrystalline silicon substrate, etching was performed at about 15 μm on one side in a 15% NaOH aqueous solution at 85 ° C. After washing with water, it was immersed in a 10% HF aqueous solution for several seconds to remove the oxide film on the surface. After washing with water and drying, it was placed in a vacuum chamber and the surface layer was etched by RIE. The conditions at this time are SF ₆ = ₆₀ sccm, reaction pressure 50 mTorr, RF power 300 W, and 1 minute. Next, a reaction pressure of 50 mTorr and an RF power are applied while flowing 10 sccm of trifluoromethane (CHF ₃ ), 75 sccm of chlorine (Cl ₂ ), 10 sccm of oxygen (O ₂ ), and 70 sccm of sulfur hexafluoride (SF ₆ ). Etching was performed at 300 W for 10 minutes to form a rough surface. As a result, there was no unevenness and uniform irregularities were formed.

It is a diagram showing a roughening process of the semi-conductor substrate process. Roughening method semiconductors substrate is a sectional view showing a. It is a figure which shows the process of the roughening method of the crystalline silicon substrate which concerns on Claim 1.

Explanation of symbols

1 ... Semiconductor substrate, 2 ... Antireflection film, 3 ... Front electrode, 4 ... Back electrode

Claims (1)

The method of manufacturing a solar cell element comprising the step of the surface of the crystalline silicon substrate to rough surface,
The oxide layer on the surface of the crystalline silicon substrate, after removing by reactive ion etching using a fluorine compound gas, the surface of the fluorine compound gas of the crystalline silicon substrate, chlorine gas, and reactive ion with oxygen gas A method for producing a solar cell element, wherein the surface is roughened by an etching method.

Images