JPH11312665A - Surface-roughening method of semiconductor substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the formation of unevenness in an RIE process on one main surface side of a substrate, by forming an oxide film on the surface of the substrate, and roughening the surface by a reactive ion etching (RIE) method. SOLUTION: The semiconductor substrate consisting of silicon, etc., containing one conductivity type semiconductor impurity is prepared. A silicon substrate is dipped in hydrofluoric/nitric acid and a sodium hydroxide aqueous solution for removing the slice damage of the surface section of the silicon substrate, and etched in approximately 15 μm. The silicon substrate is washed by water, and dipped in an approximately 10% HF aqueous solution for several sec, an oxide film of a surface is removed, the substrate is washed by water, and immersed in an NaOH aqueous solution for several sec, and stained films may also be taken off. The processes of HF and NaOH are repeated at several times until a surface completely repels water. The substrate is washed by water, and introduced into a liquid having oxidation force such as nitric acid, sulfuric acid, etc., for several min, and an oxide film is formed uniformly on the substrate surface. When RIE is conducted, the oxide film is etched equally and irregularities begins to be formed simultaneously extending over the whole surface, thus forming irregularities without unevenness.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for roughening a semiconductor substrate, and more particularly to a method for roughening the surface of a semiconductor substrate by a reactive ion etching method.

[0002]

2. Description of the Related Art When a solar cell element is formed using a silicon substrate, when the surface of the substrate is etched with an aqueous alkali solution such as sodium hydroxide, fine irregularities are formed on the surface. Reflection on the substrate surface can be reduced to some extent.

When a single crystal silicon substrate having a (100) plane orientation is used, a pyramid structure called a texture structure can be uniformly formed on the substrate surface by such a method. When a solar cell element is formed, since the etching with an alkaline aqueous solution depends on the plane orientation of the crystal, a pyramid structure cannot be formed uniformly, and therefore, there is a problem that the entire reflectance cannot be effectively reduced.

In order to solve such a problem, when a solar cell element is formed on a polycrystalline silicon substrate, fine projections are formed on the substrate surface by reactive ion etching (Reactive Ion Etching).
on Etching: RIE) method (for example, Japanese Patent Publication No. 60-27195, Japanese Patent Application Laid-Open No. 5-751).
No. 52, JP-A-9-102625). According to this method, fine projections can be uniformly formed without being affected by the plane orientation of irregular crystals in polycrystalline silicon. In particular, in a solar cell element using polycrystalline silicon, the reflectance is high. Can be more effectively reduced.

[0005] A crystalline silicon solar cell is usually formed using a wafer obtained by slicing an ingot. At this time, since the wafer surface is damaged by the slice, it is necessary to remove the damaged layer before forming the surface junction (impurity diffusion region). This depth is usually 1
Although it is about 0 to 15 μm, even if the surface is roughened by the RIE method, the depth of the unevenness is at most several μm, which is insufficient for removing the damaged layer. Therefore, it is necessary to remove most of the damaged layer before the surface is roughened by the RIE method. Usually, an aqueous solution of hydrofluoric nitric acid or sodium hydroxide is used to remove such a damaged layer.

However, when these liquids are used, washed and dried, and then roughened by RIE, there is a problem that unevenness is generated when forming irregularities. In particular, in the uneven portion, there are many gaps between the irregularities, and sufficient irregularities cannot be formed, which leads to an increase in the surface reflectance of the solar cell, which is a factor of deteriorating the solar cell characteristics.

Further, when the unevenness is formed on the entire surface of the wafer, the entire surface is darkened, so that the unevenness is conspicuous and the appearance of the product is significantly impaired.

This unevenness is not caused by the in-plane uniformity of RIE, but is caused by unevenness of cleaning and drying before RIE. That is, if a slight oxide film or the like is partially present on the substrate surface due to unevenness in cleaning or drying, the unevenness formed by RIE is affected, resulting in unevenness as a whole.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems of the prior art.
It is an object of the present invention to provide a method for roughening a semiconductor substrate, which solves the problem of the conventional method in which unevenness occurs in the IE process.

[0010]

According to a first aspect of the present invention, there is provided a semiconductor substrate roughening method, wherein the surface of the semiconductor substrate is roughened by a reactive ion etching method. In the surface roughening method, after an oxide film is formed on the surface of the semiconductor substrate, the surface is made rough by a reactive ion etching method.

In this method of roughening a semiconductor substrate, it is preferable that the semiconductor substrate is immersed in an oxidizing aqueous solution to form the oxide film.

According to a third aspect of the present invention, in the method of roughening a semiconductor substrate, the surface of the semiconductor substrate is roughened by a reactive ion etching method. Is removed by reactive ion etching, and the surface of the semiconductor substrate is made rough by reactive ion etching.

In this case, it is desirable that the surface region of the semiconductor substrate is removed by using a fluorine compound gas and the surface of the semiconductor substrate is roughened by using a fluorine compound gas, chlorine gas and oxygen gas. .

In the method for roughening a semiconductor substrate, the semiconductor substrate may be a polycrystalline silicon substrate.

[0015]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing a configuration of a vehicle according to an embodiment of the present invention; FIG. 1 is a process diagram showing a method of forming a roughened surface of a semiconductor substrate by taking a method of forming a solar cell element as an example. FIG. 2 is a sectional view, wherein 1 is a semiconductor substrate, 2 is an antireflection film, 3 is a surface electrode, 4 is a back surface electrode.

First, a semiconductor substrate 1 made of silicon or the like containing a semiconductor impurity of one conductivity type is prepared. The semiconductor substrate 1 made of silicon or the like is cut into a predetermined size from an ingot (see FIG. 2A). This silicon substrate 1 is composed of a single crystal silicon substrate or a polycrystalline silicon substrate. This silicon substrate 1 is a substrate containing one conductivity type semiconductor impurity of about 1 × 10 ¹⁶ atoms / cm ³ and a specific resistance of about 1.5 Ωcm. This silicon substrate 1 may be either p-type or n-type. In the case of single crystal silicon, it is formed by a pulling method or the like, and in the case of polycrystalline silicon, it is formed by a casting method or the like.
Polycrystalline silicon can be mass-produced and is extremely advantageous over single crystal silicon in terms of manufacturing cost. An ingot formed by a pulling method or a casting method is sliced into a thickness of about 300 μm, and is sliced into 10 cm × 10 cm or 15 cm.
The silicon substrate is cut into a size of about cm × 15 cm.

Next, in order to remove the slice damage on the surface of the silicon substrate 1, the substrate is immersed in an aqueous solution of hydrofluoric nitric acid or sodium hydroxide and etched to a thickness of about 15 μm. An aqueous solution of HNO ₃ : HF = 7: 1 can be used as hydrofluoric nitric acid, and 15% as sodium hydroxide.
% Aqueous solution can be used.

Next, it is washed with water, immersed in a 10% HF aqueous solution for several seconds to remove an oxide film on the surface, washed with water, and further washed with 0.1% water.
The stainless film (amorphous silicon film) may be removed by dipping in a 3 wt% NaOH aqueous solution for several seconds. This is because they may adhere during the HF treatment. This process of HF and NaOH is repeated several times until the surface completely repels water.

Next, after washing with water, the substrate is immersed in an oxidizing liquid such as nitric acid or sulfuric acid for several minutes to uniformly form an oxide film on the substrate surface. This oxide film is preferably several nm or less in order to form unevenness without unevenness in the RIE process. As described above, when RIE is performed by forming an oxide film on the substrate surface, the oxide film is uniformly etched, and the formation of unevenness is started simultaneously over the entire surface, so that unevenness can be formed without unevenness.

Next, a number of fine projections 1c are formed by RIE. In other words, plasma is created in the chamber by some method, the wafer is placed on a flat substrate holder,
A high frequency or DC voltage is applied to this. Ions generated in the plasma are incident on the substrate by an electric field and perform etching together with radicals. In the present invention, for example, about 5 to 20 sccm of methane trifluoride (CHF ₃ ), about 50 to 100 sccm of chlorine (Cl ₂ ), about 5 to 15 sccm of oxygen (O ₂ ), and sulfur hexafluoride (SF ₆ ) Is performed at a reaction pressure of about 50 mTorr and an RF power of about 300 to 500 W for applying plasma for about 10 seconds to 15 minutes while flowing about 50 to 80 sccm.
Then, the fine projections 1 each having a width and a height of 2 μm or less are provided.
Many c are formed. The width and height of the projection 1c are 2 μm.
Above, the etching processing time becomes longer. In order to form the fine projections 1c uniformly and accurately with controllability over the entire front surface side of the silicon substrate 1,
1 μm or less is preferred. Even if the minute projections are extremely small, they have the effect of reducing reflection. However, in order to form the projections uniformly and accurately in a plane, it is desirable that the thickness be 1 nm or more in the manufacturing process.

Next, a layer 1a containing the opposite conductivity type semiconductor impurity is formed on the surface of the silicon substrate 1 by diffusing the opposite conductivity type semiconductor impurity by a gas phase diffusion method, a coating diffusion method, an ion implantation method or the like. At the same time, other portions are etched so that this layer 1a remains only on the surface side of the substrate 1 (see FIG. 3C).

On the surface side of the silicon substrate 1, a layer 1a in which a semiconductor impurity of the opposite conductivity type is diffused is formed. The layer 1a in which the opposite conductivity type semiconductor impurity is diffused is provided for forming a semiconductor junction in the silicon substrate 1. For example, when an n-type impurity is diffused, POCl is used.
_{It is formed} by a gas phase diffusion method using ₃ , a coating diffusion method using P ₂ O ₅ , and an ion implantation method in which P ⁺ ions are directly diffused. The layer containing the opposite conductivity type semiconductor impurity is formed at a depth of about 0.1 to 0.5 μm.

Next, a metal paste containing, for example, aluminum (Al) as a main component is applied and baked on the back surface of the silicon substrate 1 to diffuse a large amount of one-conductivity-type semiconductor impurities on the back surface of the silicon substrate 1. The formed layer 1b is formed (see FIG. 4D).

It is desirable to form a layer 1b in which a semiconductor impurity of one conductivity type is diffused at a high concentration on the back side of the silicon substrate 1. The layer 1b in which the one-conductivity-type semiconductor impurity is diffused at a high concentration forms an internal electric field on the back surface side of the silicon substrate 1 in order to prevent a decrease in efficiency due to carrier recombination near the back surface of the silicon substrate 1. is there. That is,
As a result of the electric field accelerating the carriers generated near the back surface of the silicon substrate, power is effectively extracted, and in particular, the photosensitivity at long wavelengths is increased, and the deterioration of solar cell characteristics at high temperatures can be reduced. Thus, the layer 1b in which the one-conductivity-type semiconductor impurity is diffused at a high concentration.
The sheet resistance on the back side of the silicon substrate 1 on which is formed
It becomes about 15Ω / □.

Next, an antireflection film 2 made of, for example, a silicon nitride film or the like is formed on the surface side of the silicon substrate 1 by plasma CV.
It is formed to a thickness of about 500 to 2000 mm by a method D or the like (see FIG. 3E).

The antireflection film 2 is provided to prevent light from being reflected on the surface of the silicon substrate 1 and to effectively take light into the silicon substrate 1. The antireflection film has a refractive index of 2 in consideration of a refractive index difference from the silicon substrate 1 and the like.
And a silicon nitride (SiN _x ) film or silicon oxide (SiN _x )
O ₂ ) film.

Finally, silver (Ag) is baked or sputtered on the front and back surfaces of the silicon substrate 1 to form copper (C).
u) is plated to form finger electrodes 3 and bus bar electrodes 4 to complete the process (see FIG. 6F).

A surface electrode 3 is formed on the front side of the silicon substrate 1. The surface electrode 3 has a two-layer structure of silver (Ag) and copper (Cu). The surface electrode 3 has, for example, a width of about 80 μm and a pitch of 1.6 mm.
It is composed of a large number of finger electrodes formed to a certain extent and two bus bar electrodes interconnecting the large number of finger electrodes. A solder layer or the like for connecting a plurality of solar cell elements with lead wires is formed on the surface of the front electrode 3.

On the back side of the silicon substrate 1, a back electrode 4
Are formed. The back electrode 4 also has a two-layer structure of silver (Ag) and copper (Cu), and further has a solder layer formed thereon.

Next, an embodiment of a semiconductor substrate roughening method according to claim 3 will be described with reference to FIG. In this semiconductor substrate roughening method, after the surface region of the semiconductor substrate is removed by reactive ion etching, the surface of the semiconductor substrate is roughened by reactive ion etching. In this case, after removing the surface region of the semiconductor substrate using a fluorine compound gas such as SF ₆ or CF ₄ , the surface is roughened using a fluorine compound gas such as methane fluoride gas and sulfur fluoride gas, chlorine gas, and oxygen gas. Shape.

That is, the slice damage before the RIE treatment is removed by etching, washed with water, dried, and before the surface is roughened in the RIE chamber, the surface region of the semiconductor substrate is flushed with a fluorine compound gas in the same chamber. To remove.

[0032]

[Embodiment 1] A mixed acid (HNO ₃ :
HF = 7: 1, 30 ° C.) and etched on one side by about 15 μm. After washing with water, it was immersed in a 10% HF aqueous solution for several seconds to remove an oxide film on the surface. After washing with water and drying, the substrate was placed in a vacuum chamber and the surface layer was etched by RIE. The conditions at this time are SF ₆ = ₆₀ sccm, reaction pressure 50 m
Torr, RF power 300 W, 1 minute. Next, 10 sccm of methane trifluoride (CHF ₃ ) and chlorine (Cl
₂ ) At a reaction pressure of 50 mTorr and an RF power of 300 W while flowing 75 sccm of oxygen, 10 sccm of oxygen (O ₂ ), and 70 sccm of sulfur hexafluoride (SF ₆ ),
Etching was performed for 10 minutes to form a rough surface. as a result,
Uniform unevenness was obtained without unevenness.

[0033]

Embodiment 2 In order to remove the slice damage of a 15 cm × 15 cm square polycrystalline silicon substrate, one side was etched at about 15 μm in a 15% NaOH aqueous solution at 85 ° C. After washing with water, it was immersed in a 10% HF aqueous solution for several seconds to remove an oxide film on the surface. After washing with water and drying, put it in a vacuum chamber,
The surface layer was etched by RIE. The conditions at this time were SF ₆ = ₆₀ sccm, reaction pressure 50 mTorr,
RF power 300 W, 1 minute. Next, methane trifluoride (CHF ₃ ) was added at 10 sccm, and chlorine (Cl ₂ ) was added at 75 sccm.
Etching was performed at a reaction pressure of 50 mTorr and an RF power of 300 W for 10 minutes while flowing sccm, oxygen (O ₂ ) at 10 sccm, and sulfur hexafluoride (SF ₆ ) at 70 sccm to form a rough surface. As a result, uniform unevenness was obtained without unevenness.

[0034]

As described above, according to the method for roughening a semiconductor substrate according to the first aspect, after an oxide film is formed on one main surface side of the semiconductor substrate, the surface is roughened by a reactive ion etching method. Therefore, unevenness can be uniformly formed over the entire surface of the silicon wafer without unevenness. Thus, the reflectance on the substrate surface is reduced, the characteristics can be improved, and the aesthetic appearance can be improved.

According to a third aspect of the present invention, after the surface region of the semiconductor substrate is removed by the reactive ion etching method, the surface of the semiconductor substrate is roughened by the reactive ion etching method. Because of the planar shape, the unevenness can be uniformly formed over the entire surface of the silicon wafer without unevenness. Thus, the reflectance on the substrate surface is reduced, the characteristics can be improved, and the aesthetic appearance can be improved.

[Brief description of the drawings]

FIG. 1 is a view showing a step of a method for roughening a semiconductor substrate according to claim 1;

FIG. 2 is a cross-sectional view showing a method for roughening a semiconductor substrate according to claim 1;

FIG. 3 is a view showing a step of a semiconductor substrate roughening method according to claim 3;

[Explanation of symbols]

1 semiconductor substrate, 2 antireflection film, 3 front electrode, 4 back electrode

Claims (5)

[Claims] In a method of roughening a semiconductor substrate, the surface of the semiconductor substrate is roughened by a reactive ion etching method.
After forming an oxide film on the surface of the semiconductor substrate, the surface is roughened by a reactive ion etching method. 2. The method according to claim 1, wherein the oxide film is formed by immersing the semiconductor substrate in an oxidizing aqueous solution. 3. A semiconductor substrate roughening method in which a surface of the semiconductor substrate is roughened by a reactive ion etching method.
After the surface area of the semiconductor substrate is removed by a reactive ion etching method, the surface of the semiconductor substrate is roughened by a reactive ion etching method. 4. The method according to claim 1, wherein the surface region of the semiconductor substrate is removed using a fluorine compound gas, and the surface of the semiconductor substrate is roughened using a fluorine compound gas, a chlorine gas and an oxygen gas. The method for roughening a semiconductor substrate according to claim 3. 5. The semiconductor device according to claim 1, wherein said semiconductor substrate is a polycrystalline silicon substrate.
A method for roughening a semiconductor substrate according to claim 4.