KR101596961B1 - Organic Light Emitting Diode Display And Driving Method Thereof - Google Patents

Abstract

The present invention relates to an organic light emitting diode display device and a driving method thereof for improving image quality.

The organic light emitting diode display device includes: an organic light emitting diode (OLED) emitting light by a current flowing between a high potential driving voltage source and a ground voltage source; A driving TFT for controlling a current flowing in the organic light emitting diode according to a gate-source voltage applied between a gate electrode connected to the first node and a source electrode connected to the high potential driving voltage source; A first switch TFT connected between the first node and the driving TFT; A second switch TFT connected between the second node and the organic light emitting diode; A third switch TFT connected between a data line to which a data voltage is applied and a third node; A fourth switch TFT connected between the reference voltage source and the third node; A fifth switch TFT connected between the second node and the third node; A sixth switch TFT connected between the driving TFT and the organic light emitting diode; A first capacitor connected between the first node and the third node; And a second capacitor connected between the first node and the second node.

Description

[0001] The present invention relates to an organic light emitting diode (OLED) display device,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an organic light emitting diode (OLED) display device, and more particularly, to an organic light emitting diode display device and a driving method thereof.

2. Description of the Related Art In recent years, various flat panel displays (FPDs) have been developed to reduce weight and volume, which are disadvantages of cathode ray tubes. Such a flat panel display device includes a liquid crystal display (LCD), a field emission display (FED), a plasma display panel (PDP) And a light emitting device (Electroluminescence Device).

PDP has attracted attention as a display device that is most advantageous for large screen size but small size because of its simple structure and manufacturing process, but it has disadvantage of low luminous efficiency, low luminance and high power consumption. A TFT LCD to which a thin film transistor (hereinafter referred to as "TFT") is applied as a switching element is the most widely used flat panel display device, but has a problem of a narrow viewing angle and a low response speed because it is a non-light emitting device. On the other hand, the electroluminescent device is divided into an inorganic light emitting diode display device and an organic light emitting diode display device according to the material of the light emitting layer. In particular, the organic light emitting diode display device uses self light emitting devices that emit self- Brightness and viewing angle are large.

The organic light emitting diode display device has an organic light emitting diode as shown in FIG. The organic light emitting diode has organic compound layers (HIL, HTL, EML, ETL, EIL) formed between the anode electrode and the cathode electrode.

The organic compound layer includes a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), and an electron injection layer EIL). When a driving voltage is applied to the anode electrode and the cathode electrode, holes passing through the HTL and electrons passing through the ETL are transferred to the EML to form excitons, Thereby generating visible light.

The organic light emitting diode display device arranges the pixels including the organic light emitting diode in a matrix form and controls the brightness of the pixels selected by the scan pulse according to the gray level of the video data. Such an organic light emitting diode display device is divided into a passive matrix type and an active matrix type using a TFT as a switching element. Among them, the active matrix method selectively turns on the TFT as the active element to select the pixel and maintains the light emission of the pixel with the voltage held in the storage capacitor.

2 is a circuit diagram showing one pixel equivalently in an active matrix type organic light emitting diode display.

Referring to FIG. 2, the pixels of the active matrix type organic light emitting diode display include organic light emitting diodes (OLED), data lines DL and gate lines GL intersecting with each other, a switch TFT SW, a driving TFT DR ), And a storage capacitor (Cst). The switch TFT (SW) and the drive TFT (DR) are implemented as a P-type MOS-FET.

The switch TFT SW is turned on in response to a scan pulse from the gate line GL, thereby making the current path between the source electrode and the drain electrode conductive. The switch TFT SW applies a data voltage from the data line DL to the gate electrode of the drive TFT DR and the storage capacitor Cst during the turn-on period. The driving TFT DR controls the current flowing in the organic light emitting diode OLED according to the difference voltage Vgs between the gate electrode and the source electrode of the driving TFT DR. The storage capacitor Cst maintains the gate potential of the driving TFT DR constant for one frame. The organic light emitting diode OLED has a structure as shown in FIG. 1, and is connected between the drain electrode of the driving TFT DR and the ground voltage source GND.

2 is proportional to the driving current Ioled flowing in the organic light emitting diode OLED and the driving current Ioled is proportional to the gate voltage of the driving TFT DR and the source voltage And depends on the difference voltage Vgs and the threshold voltage Vth of the driving TFT DR.

Here, 'μ' denotes the mobility of the driving TFT DR, 'Cox' denotes the parasitic capacitance of the driving TFT DR, 'W' denotes the channel width of the driving TFT DR, and 'L' 'Vdd' denotes a high potential driving voltage, and 'Vdata' denotes a data voltage.

In general, the non-uniformity of luminance between pixels in an organic light emitting diode display is caused by various causes.

First, an electrical characteristic variation of the driving TFT DR such as a threshold voltage Vth or the like can be mentioned.

In a panel using a Low Temperature Poly Silicon (LTPS) back plane, a characteristic deviation of the driving TFT DR between pixels occurs due to an ELA (Excimer Laser Annealing) process. In a panel using an a-Si (amorphous silicon) back plane, there is almost no characteristic deviation of the driving TFT DR due to the process. However, due to the gate-bias stress accumulated in the gate electrode of the driving TFT DR according to the panel driving, the degree of deterioration of the driving TFT DR varies from pixel to pixel, Resulting in characteristic deviations. When the characteristic deviation of the driving TFT DR, that is, the difference of the threshold voltage Vth of the driving TFT DR between the pixels, is generated, the organic light emitting diode (OLED) corresponding to the same data voltage Vdata The driving current Ioled flowing through the OLED varies depending on the pixels.

Second, a deviation of the high potential driving voltage (Vdd) due to the IR drop can be mentioned.

The IR drop is a phenomenon in which the level of the high potential driving voltage (Vdd) gradually decreases as the distance from the voltage input terminal is decreased due to the wiring resistance of the power supply wiring. Therefore, the level of the high potential driving voltage Vdd applied to the pixels differs depending on the positions of the pixels. If the level of the high-potential driving voltage Vdd between the pixels changes according to the position, the driving current Iolde flowing through the organic light-emitting diode OLED corresponding to the same data voltage Vdata Are different for each pixel.

Thirdly, degradation of the organic light emitting diode (OLED) due to driving for a long time can be cited. The degree of deterioration of the organic light emitting diode (OLED) increases when the organic light emitting diode OLED is driven for a long time with a relatively bright gradation as shown in FIG. In the conventional pixel structure, when the organic light emitting diode (OLED) is deteriorated, the luminance is lowered at the position.

Accordingly, it is an object of the present invention to provide an organic light emitting diode display device and a method of driving the same, which can improve image quality by preventing luminance unevenness between pixels.

According to an aspect of the present invention, there is provided an organic light emitting diode (OLED) display device including: an organic light emitting diode (OLED) that emits light by a current flowing between a high potential driving voltage source and a ground voltage source; A driving TFT for controlling a current flowing in the organic light emitting diode according to a gate-source voltage applied between a gate electrode connected to the first node and a source electrode connected to the high potential driving voltage source; A first switch TFT connected between the first node and the driving TFT; A second switch TFT connected between the second node and the organic light emitting diode; A third switch TFT connected between a data line to which a data voltage is applied and a third node; A fourth switch TFT connected between the reference voltage source and the third node; A fifth switch TFT connected between the second node and the third node; A sixth switch TFT connected between the driving TFT and the organic light emitting diode; A first capacitor connected between the first node and the third node; And a second capacitor connected between the first node and the second node.

A gate electrode of each of the first to third switch TFTs is connected to a gate line to which a scan signal is applied; A gate electrode of the fourth switch TFT is connected to a first emission line to which a first emission signal is applied; A gate electrode of each of the fifth and sixth switch TFTs is connected to a second emission line to which a second emission signal is applied.

The scan signal and the first and second emission signals are generated at a turn-on level during a first period; The scan signal is maintained at a turn-on level during a second period subsequent to the first period, and the first and second emission signals are inverted to a turn-off level; During a third period subsequent to the second period, the scan signal is inverted to a turn-off level, the first emission signal is inverted to a turn-on level, and the second emission signal is maintained at a turn-off level; During the fourth period subsequent to the third period, the scan signal is maintained at the turn-off level, the first emission signal is maintained at the turn-on level, and the second emission signal is inverted to the turn-on level.

A gate electrode of each of the first to third switch TFTs is connected to a gate line to which a scan signal is applied; The gate electrodes of the respective fourth to sixth switch TFTs are connected to an emission line to which an emission signal is applied.

During the first period, the scan signal and the emission signal are generated at a turn-on level; The scan signal is maintained at a turn-on level during a second period subsequent to the first period, and the emission signal is inverted to a turn-off level; During the third period subsequent to the second period, the scan signal is inverted to the turn-off level and the emission signal is inverted to the turn-on level.

The driving current Ioled flowing in the organic light emitting diode is expressed by the following equation.

Here, 'μ' denotes a mobility of the driving TFT, 'Cox' denotes a parasitic capacitance of the driving TFT, 'W' denotes a channel width of the driving TFT, 'L' denotes a channel length of the driving TFT, 'Vdd' denotes a high-level driving voltage by the high-potential driving voltage source, and 'Vdata' denotes a threshold voltage of the driving TFT, Vtho 'denotes a capacitance of the organic light emitting diode, Vt denotes a capacitance of the organic light emitting diode, Vt denotes a capacitance of the first capacitor, Vt denotes a data voltage, Vref denotes a reference voltage of the reference voltage source, Cst denotes capacitance of the first capacitor, Cfb denotes capacitance of the second capacitor, Respectively.

According to an embodiment of the present invention, there is provided an organic light emitting display comprising: an organic light emitting diode that emits light by a current flowing between a high potential driving voltage source and a ground voltage source; a gate electrode connected between the gate electrode connected to the first node and the source electrode connected to the high potential driving voltage source A driving TFT for controlling a current flowing in the organic light emitting diode according to a voltage between sources; a driving TFT connected to the first node and the second and third nodes different from the first node and for controlling the potential of the first node; A method of driving an organic light emitting diode display device having a switch circuit includes a first step of initializing a potential of the first and second nodes to a reference voltage level; Applies a first value to the first node minus a threshold voltage of the driving TFT at a high potential driving voltage supplied from the high potential driving voltage source, applies a threshold voltage of the organic light emitting diode to the second node, A second step of applying a voltage to the third node; A reference voltage is applied to the third node to vary the potential of the third node to a second value obtained by subtracting the reference voltage from the data voltage, and a second capacitor connected between the first node and the third node A third step of varying the potential of the first node by the second difference value using the coupling effect and setting it as an intermediate compensation value; And varying a potential of the second node to a third value obtained by subtracting the reference voltage from a threshold voltage of the organic light emitting diode by applying a reference voltage to the fourth node, And a fourth step of varying the potential of the first node by the third difference using the coupling effect of the second capacitor and the voltage distribution of the first and second capacitors to set the final compensation value.

An organic light emitting diode display device according to the present invention includes:

Hereinafter, preferred embodiments of the present invention will be described with reference to FIGS. 4 to 11. FIG.

4 is a block diagram illustrating an organic light emitting diode display device according to an embodiment of the present invention.

4, an organic light emitting diode display device according to an embodiment of the present invention includes a display panel 10 in which pixels P are arranged in a matrix form, a data driving circuit (not shown) for driving the data lines 14 A gate driving circuit 13A for driving the gate lines 15; an emission driving circuit 13B for driving the emission lines 16a and 16b; and driving circuits 12, 13A, And a timing controller 11 for controlling the timing controller 13B.

A plurality of data lines 14, a plurality of gate lines 15 and emission lines 16a and 16b are intersected with each other in the display panel 10 and the pixels P are arranged in a matrix form. Each of the pixels P is supplied with a high potential driving voltage Vdd and a reference voltage Vref and is supplied with one data line 14, one gate line 15 and two emission lines 16a, 16b. The two emission lines 16a and 16b include a first emission line 16a and a second emission line 16b. These two emission lines 16a and 16b can be replaced by one emission line in accordance with the pixel (P) structure. For example, in the pixel (P) structure as shown in Fig. 10, two of the emission lines 16a and 16b are replaced by one emission line 16. The high-potential driving voltage (Vdd) is generated at a constant DC level by the high-potential driving voltage source. The reference voltage Vref is generated at a constant DC level by the reference voltage source. The reference voltage Vref may be defined as the voltage level between the base low voltage and the high potential driving voltage Vdd and may be generally set to the same level as the lowest data voltage.

The timing controller 11 rearranges the digital video data RGB input from the outside in accordance with the resolution of the display panel 10 and supplies the digital video data RGB to the data driving circuit 12. The timing controller 11 is also connected to the data driving circuit 12 based on timing signals such as a vertical synchronizing signal Vsync, a horizontal synchronizing signal Hsync, a dot clock signal DCLK and a data enable signal DE The gate control signal GDC for controlling the operation timing of the gate drive circuit 13A and the operation timing of the emission drive circuit 13B are controlled in accordance with the data control signal DDC, Gt; EDC < / RTI >

The data driving circuit 12 converts the digital video data RGB into an analog data voltage (hereinafter referred to as a data voltage) under the control of the timing controller 11 and supplies it to the data lines 14.

The gate drive circuit 13A generates a scan signal SCAN under the control of the timing controller 11 and supplies it to the gate lines 15. [ The gate drive circuit 13A includes a shift register for shifting the scan signal SCAN. The shift register can be formed directly on the display panel 10 according to the GIP (Gate In Panel) method.

The emission driving circuit 13B generates an emission signal EM under the control of the timing controller 11 and supplies it to the emission lines 16a and 16b. The emission driving circuit 13B includes an inverted shift register for shifting the emission signal EM. The inverted shift register can be formed directly on the display panel 10 according to the GIP (Gate In Panel) method.

Fig. 5 shows an example of the pixel P shown in Fig.

5, a pixel P according to an embodiment of the present invention includes an organic light emitting diode (OLED), a driving TFT (DR), and a driving TFT (DR) formed at intersections of the signal lines 14, 15, 16a, , And a switch circuit.

The gate electrode of the driving TFT DR is connected to the switch circuit through the first node N1 and the source electrode of the driving TFT DR is connected to the high potential driving voltage source VDD, The electrode is connected to the switch circuit through the fourth node N4. The driving TFT DR controls the amount of current flowing in the organic light emitting diode OLED according to the difference voltage between its gate electrode and the source electrode. Here, the driving TFT DR may be implemented as a P-type metal-oxide semiconductor field effect transistor (MOSFET). The semiconductor layer of the driving TFT DR may include a polysilicon layer.

The anode electrode of the organic light emitting diode OLED is connected to the switch circuit through the fifth node N5 and the cathode electrode of the organic light emitting diode OLED is connected to the ground voltage source GND. The organic light emitting diode OLED has the structure shown in Fig. 1 and emits light by a driving current controlled by the driving TFT DR.

The switch circuit includes the first to sixth switch TFTs SW1 to SW6 and the first and second capacitors Cst and Cfb.

The gate electrode of the first switch TFT SW1 is connected to the gate line 15 to which the scan signal SCAN is supplied and the source electrode of the first switch TFT SW1 is connected to the fourth node N4, The drain electrode of the first switch TFT (SW1) is connected to the first node (N1). The first switch TFT SW1 switches the current path between the first node N1 and the fourth node N4 in response to the scan signal SCAN so that the potential of the first node N1 is set to a first value Sampling. Here, the first value indicates a value (Vdd-Vth) obtained by subtracting the threshold voltage Vth of the driving TFT DR from the high-potential driving voltage Vdd.

The gate electrode of the second switch TFT SW2 is connected to the gate line 15 to which the scan signal SCAN is supplied and the source electrode of the second switch TFT SW2 is connected to the fifth node N5, And the drain electrode of the two-switch TFT (SW2) is connected to the second node N2. The second switch TFT SW2 switches the electric potential of the second node N2 to the organic light emitting diode (LED) by switching the current path between the second node N2 and the fifth node N5 in response to the scan signal SCAN OLED). ≪ / RTI >

The gate electrode of the third switch TFT SW3 is connected to the gate line 15 to which the scan signal SCAN is supplied and the source electrode of the third switch TFT SW3 is connected to the data line Vdata 14, and the drain electrode of the third switch TFT (SW3) is connected to the third node (N3). The third switch TFT (SW3) turns on in response to the scan signal (SCAN), thereby supplying the data voltage (Vdata) from the data line (14) to the third node (N3).

The gate electrode of the fourth switch TFT SW4 is connected to the first emission line 16a to which the first emission signal EM1 is supplied and the source electrode of the fourth switch TFT SW4 is connected to the reference voltage source VREF, And the drain electrode of the fourth switch TFT SW4 is connected to the third node N3. The fourth switch TFT SW4 is turned on in response to the first emission signal EM1, thereby supplying the reference voltage Vref to the third node N3.

The gate electrode of the fifth switch TFT SW5 is connected to the second emission line 16b to which the second emission signal EM2 is supplied and the source electrode of the fifth switch TFT SW5 is connected to the third node N3 , And the drain electrode of the fifth switch TFT (SW5) is connected to the second node (N2). The fifth switch TFT (SW5) turns on in response to the second emission signal EM2, thereby supplying the reference voltage Vref to the second node N2.

The gate electrode of the sixth switch TFT SW6 is connected to the second emission line 16b to which the second emission signal EM2 is supplied and the source electrode of the sixth switch TFT SW6 is connected to the fourth node N4 , And the drain electrode of the sixth switch TFT (SW6) is connected to the fifth node (N5). The sixth switch TFT SW6 is turned on in response to the second emission signal EM2 to switch the current path between the fourth node N4 and the fifth node N5.

The first capacitor Cst is connected between the first node N1 and the third node N3. The first capacitor Cst reflects the second difference, which is the amount of potential change at the third node N3, to the first node N1. Here, the second value indicates a value (Vata-Vref) obtained by subtracting the reference voltage (Vref) from the data voltage (Vdata).

The second capacitor Cfb is connected between the first node N1 and the second node N2. The second capacitor Cfb reflects the third difference, which is the amount of potential change in the second node N2, to the first node N1 through the voltage division with the first capacitor Cst. Here, the third value indicates a value (Vtho-Vref) obtained by subtracting the reference voltage (Vref) from the threshold voltage (Vtho) of the organic light emitting diode (OLED).

The operation of the pixel P according to one embodiment of the present invention will be described with reference to FIG. 6 and FIGS. 7A to 7D.

Referring to FIG. 6, the operation of the pixel P according to an embodiment of the present invention can be described by dividing it into a first period to a fourth period (T1 to T4).

7A, during a first period T1, the scan signal SCAN is generated as a low logic voltage to turn on the first to third switch TFTs SW1 to SW3, to turn on the first emission signal EM1, Is generated as a low logic voltage to turn on the fourth switch TFT SW4 and the second emission signal EM2 is generated as a low logic voltage to turn on the fifth and sixth switch TFTs SW5 and SW6 .

As a result, the potential of the first node N1 and the potential of the second node n2 are initialized to the reference voltage Vref level.

Referring to FIG. 7B, during a second period T2, the scan signal SCAN is held at a low logic voltage to turn on the first to third switch TFTs SW1 to SW3 continuously, and the first emission signal The first emission signal EM1 is inverted to the high logic voltage to turn off the fourth switch TFT SW4 and the second emission signal EM2 is inverted to the high logic voltage to turn the fifth and sixth switch TFTs SW5 and SW6 Off. During the second period T2, the data voltage Vdata is supplied to the data line.

As a result, the potential of the first node N1 is sampled by the first difference value (Vdd-Vth) by the diode connection of the drive TFT DR (the gate electrode and the drain electrode of the drive TFT DR are shorted) 1 < / RTI > capacitor Cst. The potential of the second node N2 is sampled at the threshold voltage Vtho of the organic light emitting diode OLED and then stored in the second capacitor Cfb. The potential of the third node N3 is maintained at the data voltage Vdata.

7C, during the third period T3, the scan signal SCAN is inverted to a high logic voltage to turn off the first to third switch TFTs SW1 to SW3, and the first emission signal EM1, Is turned to a low logic voltage to turn on the fourth switch TFT SW4 and the second emission signal EM2 is held at the high logic voltage to continuously turn the fifth and sixth switch TFTs SW5 and SW6 Off.

As a result, the potential of the third node N3 varies by the secondary value (Vata-Vref). The potential of the first node N1 is lowered by the potential variation of the third node N3 by the coupling effect of the first capacitor Cst. That is, the potential of the first node N1 is lowered to the intermediate compensation value {(Vdd-Vth) - (Vdata-Vref)} obtained by subtracting the second difference value Vata-Vref from the first difference value Vdd-Vth.

7D, the scan signal SCAN is maintained at the high logic voltage during the fourth period T4 so that the first to third switch TFTs SW1 to SW3 are continuously turned off and the first emission signal And the second emission signal EM2 is inverted to a low logic voltage to turn on the fifth and sixth switch TFTs SW5 and SW6, .

As a result, the potential of the second node N2 varies by the third value Vtho-Vref. The potential of the first node N1 fluctuates due to the third value Vtho-Vref and the intermediate compensation value {(Vdd-Vth) is obtained by voltage division between the first and second capacitors Cst and Cfb. - (Vdata-Vref)} to the final compensation value. The final compensation value is the variation value {Cfb / (Cfb + Cst) of the first node N1 by the third value Vtho-Vref at the intermediate compensation value {(Vdd-Vth) - (Vdata- (Vtho-Vref) - (Vdd-Vref) - {Cfb / (Cfb + Cst)} * (Vtho-Vref).

The potential of the first node N1 is set to the final compensation value and the sixth switch TFT SW6 is turned on so that the driving current Ioled flows as follows in the organic light emitting diode OLED.

Here, 'μ' denotes the mobility of the driving TFT DR, 'Cox' denotes the parasitic capacitance of the driving TFT DR, 'W' denotes the channel width of the driving TFT DR, and 'L' Vth is the threshold voltage of the driving TFT DR, Vdd is the high-level driving voltage, and Vdd is the gate-to-source voltage of the driving TFT DR. 'Vtho' denotes a threshold voltage of the organic light emitting diode OLED, and 'Vdata' denotes a data voltage, 'Vref' denotes a reference voltage, 'Cst' denotes a capacitance of the first capacitor, 'Cfb' denotes a capacitance of the second capacitor, Respectively.

Unlike Equation (1), Equation 2 (C) does not include 'Vth' and 'Vdd' in the equation. This means that the driving current Ioled flowing through the organic light emitting diode OLED is free from a threshold voltage Vth deviation and / or a high potential driving voltage Vdd deviation of the driving TFT DR between pixels. As a result, even if the threshold voltage (Vth) deviation and / or the high potential driving voltage (Vdd) deviation of the driving TFT (DR) between the pixels occurs, the luminance of the pixels does not change corresponding to the same data voltage.

Also, (C) in Equation (2) differs from Equation (1) in the past, and includes 'Vtho' as a factor in the equation. Accordingly, the driving current Ioled flowing through the organic light emitting diode OLED increases in proportion to an increase in the threshold voltage Vtho of the organic light emitting diode OLED. For example, when the threshold voltage Vtho of the organic light emitting diode OLED gradually increases in the order of A <B <C according to the driving time of the organic light emitting diode OLED as shown in FIG. 8, The driving current Ioled flowing in the organic light emitting diode OLED increases in the order of A <B <C. As a result, since the driving current Ioled increases as the threshold voltage Vtho of the organic light emitting diode OLED increases according to (C) in Equation 2, the luminance nonuniformity phenomenon due to deterioration of the organic light emitting diode OLED Is automatically compensated.

10 and 11 show the structure and operation period of the pixel P according to another embodiment of the present invention.

The connection structure of the pixel P according to another embodiment of the present invention is the same as that shown in Fig. 5 except that the fourth to sixth switch TFTs SW4 to SW6 are connected to be controlled simultaneously by the same emission signal EM Is substantially the same as the connection structure of the pixel P according to the illustrated embodiment of the present invention. Gate electrodes of the fourth to sixth switch TFTs SW4 to SW6 are commonly connected to the emission line 16.

The operation of the pixel P according to another embodiment of the present invention is similar to the operation of the pixel P in the second and third periods T3 and T4 of the operations of the pixel P according to the embodiment of the present invention shown in Fig. The step operation is reduced to the first step of the third period T3. The pixel P according to the other embodiment of the present invention is configured such that the potential variation value of the second node N2 and the potential variation value of the third node N3 during the third period T3 are simultaneously set to the potential of the first node N1 . Otherwise, it operates substantially the same as the operation of the pixel P according to the embodiment of the present invention.

As described above, according to the organic light emitting diode display device and the driving method of the present invention, the driving current flowing through the organic light emitting diode is not affected by the threshold voltage deviation and / or high potential driving voltage deviation of the driving TFT. As a result, even if the deviations are generated, luminance unevenness phenomenon between the pixels is not caused, so that a dramatic improvement in image quality can be expected compared with the conventional method.

Further, according to the organic light emitting diode display device and the driving method of the present invention, since the driving current can be increased as the threshold voltage of the organic light emitting diode increases, the luminance unevenness due to the deterioration of the organic light emitting diode can be compensated automatically So that a remarkable improvement in image quality can be expected compared with the conventional art.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. For example, in the embodiment of the present invention, only the case where the TFT is implemented as a P-type MOSFET has been described. However, it is needless to say that the technical idea of the present invention is not limited to this and can also be applied to an N-type MOSFET. In addition, in the embodiment of the present invention, only the case where the display panel is implemented as the LPTS back plane has been described. However, it is needless to say that the technical idea of the present invention is also applicable to the a-Si back plane. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram for explaining the principle of light emission of a general organic light emitting diode display device. FIG.

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an organic light emitting diode (OLED) display device having a 2T1C structure.

3 is a view showing a residual image generated by deterioration of an organic light emitting diode.

4 is a block diagram illustrating an organic light emitting diode display device according to an embodiment of the present invention.

5 is an equivalent circuit diagram of a pixel according to an embodiment of the present invention.

6 is a waveform diagram of control signals applied to Fig.

FIG. 7A is an equivalent circuit diagram of a pixel for the first period of FIG. 6; FIG.

FIG. 7B is an equivalent circuit diagram of a pixel for the second period of FIG. 6; FIG.

FIG. 7C is an equivalent circuit diagram of a pixel for the third period of FIG. 6; FIG.

FIG. 7D is an equivalent circuit diagram of a pixel for the fourth period of FIG. 6; FIG.

8 is a graph showing the relationship between voltage and current according to the degree of deterioration of the organic light emitting diode.

9 is a view showing that the degree of deterioration of an organic light emitting diode is reflected in a driving current.

10 is an equivalent circuit diagram of a pixel according to another embodiment of the present invention.

11 is a waveform diagram of control signals applied to Fig.

Description of the Related Art

10: Display panel 11: Timing controller

12: Data driving circuit 13A: Gate driving circuit

13B: Emission driving circuit 14: Data line

15: Gate line 16a, 16b: Emission line

Claims (11)

An organic light emitting diode emitting light by a current flowing between a high potential driving voltage source and a ground voltage source; And a gate electrode connected to the first node, a source electrode connected to the high potential driving voltage source, and a drain electrode connected to the fourth node, wherein the organic A driving TFT for controlling a current flowing in the light emitting diode; A first switch TFT connected between the first node and the fourth node; A second switch TFT connected between the second node and the organic light emitting diode; A third switch TFT connected between a data line to which a data voltage is applied and a third node; A fourth switch TFT connected between the reference voltage source and the third node; A fifth switch TFT connected between the second node and the third node; A sixth switch TFT connected between the fourth node and the organic light emitting diode; A first capacitor connected between the first node and the third node; And And a second capacitor connected between the first node and the second node. The method according to claim 1, A gate electrode of each of the first to third switch TFTs is connected to a gate line to which a scan signal is applied; A gate electrode of the fourth switch TFT is connected to a first emission line to which a first emission signal is applied; And a gate electrode of each of the fifth and sixth switch TFTs is connected to a second emission line to which a second emission signal is applied. 3. The method of claim 2, The scan signal and the first and second emission signals are generated at a turn-on level during a first period; The scan signal is maintained at a turn-on level during a second period subsequent to the first period, and the first and second emission signals are inverted to a turn-off level; During a third period subsequent to the second period, the scan signal is inverted to a turn-off level, the first emission signal is inverted to a turn-on level, and the second emission signal is maintained at a turn-off level; The scan signal is maintained at the turn-off level during the fourth period after the third period, the first emission signal is maintained at the turn-on level, and the second emission signal is inverted to the turn-on level To the organic light emitting diode display device. The method according to claim 1, A gate electrode of each of the first to third switch TFTs is connected to a gate line to which a scan signal is applied; And a gate electrode of each of the fourth to sixth switch TFTs is connected to an emission line to which an emission signal is applied. 5. The method of claim 4, During the first period, the scan signal and the emission signal are generated at a turn-on level; The scan signal is maintained at a turn-on level during a second period subsequent to the first period, and the emission signal is inverted to a turn-off level; And the scan signal is inverted to a turn-off level and the emission signal is inverted to a turn-on level during a third period subsequent to the second period. The method according to claim 1, Wherein the driving current Ioled flowing through the organic light emitting diode is expressed by the following equation.

Here, 'μ' denotes a mobility of the driving TFT, 'Cox' denotes a parasitic capacity of the driving TFT, 'W' denotes a channel width of the driving TFT, 'L' denotes a channel length of the driving TFT 'Vdd' is a high-level driving voltage by the high-potential driving voltage source, and 'Vdata' is a high-potential driving voltage by the high-potential driving voltage source. The data voltage is represented by Vref, the reference voltage by the reference voltage source, Cst, the capacitance of the first capacitor, Cfb, the capacitance of the second capacitor, and Vtho, Respectively. A gate electrode connected to the first node, a source electrode connected to the high potential driving voltage source, and a drain electrode connected to the fourth node, the organic light emitting diode comprising: A driving TFT for controlling a current flowing in the organic light emitting diode according to a gate-source voltage applied between the gate electrode and the source electrode; a first switch TFT connected between the first node and the fourth node; A second switch TFT connected between the second node and the organic light emitting diode, a third switch TFT connected between a data line to which a data voltage is applied and a third node, and a second switch TFT connected between the reference voltage source and the third node A fifth switch TFT connected between the second node and the third node, and a fourth switch TFT connected between the fourth node and the organic light emitting diode And a second capacitor connected between the first node and the second node, and a second capacitor connected between the first node and the third node, and a second capacitor connected between the first node and the second node. In the method, A first step of initializing a potential of the first and second nodes to a reference voltage level; Applies a first value to the first node minus a threshold voltage of the driving TFT at a high potential driving voltage supplied from the high potential driving voltage source, applies a threshold voltage of the organic light emitting diode to the second node, A second step of applying a voltage to the third node; A reference voltage is applied to the third node to vary the potential of the third node to a second value obtained by subtracting the reference voltage from the data voltage, and a second capacitor connected between the first node and the third node A third step of varying the potential of the first node by the second difference value using the coupling effect and setting it as an intermediate compensation value; And A reference voltage is applied to the fourth node to vary a potential of the second node from a threshold voltage of the organic light emitting diode to a third value obtained by subtracting the reference voltage from the threshold voltage, And a fourth step of varying the potential of the first node by the third difference value using the coupling effect of the second capacitor and the voltage distribution of the first and second capacitors to set the final compensation value as a final compensation value And a driving method of the organic light emitting diode display device. 8. The method of claim 7, Wherein the intermediate compensation value is a value obtained by subtracting the second difference from the first difference value. 8. The method of claim 7, Wherein the final compensation value is a value obtained by subtracting the third difference from the intermediate compensation value. 8. The method of claim 7, Wherein the third step and the fourth step are integratable into one step. 8. The method of claim 7, Wherein the driving current Ioled flowing through the organic light emitting diode is expressed by the following equation.

Here, 'μ' denotes a mobility of the driving TFT, 'Cox' denotes a parasitic capacitance of the driving TFT, 'W' denotes a channel width of the driving TFT, 'L' denotes a channel length of the driving TFT, 'Vdd' is the high voltage driving voltage, 'Vdata' is the data voltage, 'Vref' is the high voltage driving voltage, 'Vdd' is the driving voltage, 'Denotes a capacitance of the first capacitor,' Cfb 'denotes a capacitance of the second capacitor, and' Vtho 'denotes a threshold voltage of the organic light emitting diode.

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