KR101581542B1 - Cap substrate, structure, and method of manufacturing the same - Google Patents

Cap substrate, structure, and method of manufacturing the same Download PDF

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KR101581542B1
KR101581542B1 KR1020140049602A KR20140049602A KR101581542B1 KR 101581542 B1 KR101581542 B1 KR 101581542B1 KR 1020140049602 A KR1020140049602 A KR 1020140049602A KR 20140049602 A KR20140049602 A KR 20140049602A KR 101581542 B1 KR101581542 B1 KR 101581542B1
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substrate
microstructure
bonding
bump
eutectic
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KR1020140049602A
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KR20150123106A (en
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박종삼
이종성
서평보
우종창
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주식회사 스탠딩에그
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Abstract

According to the present invention, there is provided a cap substrate used for encapsulating and mounting a microstructure substrate, a bump formed on the cap substrate, coupled with a portion of the microstructure substrate, for sealingly mounting the microstructure substrate; And a bonding reaction supporting layer formed to have a thickness lower than the bumps and controlling the eutectic reaction of the bumps to maintain a gap between the microstructure substrate and the cap substrate after bonding with the microstructure substrate, And a cap substrate. Further, a method for manufacturing a structure and a structure using the cap substrate is provided.

Description

[0001] CAP SUBSTRATE, STRUCTURE, AND METHOD OF MANUFACTURING THE SAME [0002]

[0001] The present invention relates to a cap substrate, a structure and a manufacturing method thereof, and more particularly, to a cap substrate, a structure and a manufacturing method thereof, and more particularly to a cap substrate having a bump structure for Au-Si eutectic bonding, which is one of reliable wafer level hermetic packaging technologies And a method of manufacturing a structure and a structure using the Cu / Ni / Au bump structure. In the conventional Cu / Ni / Au bump structure, a moisture weakness is found in the Au-Si eutectic bonding interface. In addition, in the case of the Au bump structure of the prior art, it is impossible to control the gap between the microstructure substrate and the cap substrate appropriately, so that there is a problem that the cavity formation process must be additionally included However, the present invention is applicable to a cap substrate capable of solving such problems at its source, a structure and a structure manufacturing room using the same Relate to.

In recent years, MEMS (Micro Electro Mechanical Systems) technology has been expanding into the field of miniaturization of innovative systems that will lead various technology fields in the mobile and automobile fields. MEMS technology is a technology for forming a specific part of a system on a substrate such as a silicon substrate in a precise shape of micro or nanometer unit by using special silicon technology of only MEMS in various existing technologies of semiconductor.

Most of the devices fabricated using MEMS technology are sensitive to the external environment such as temperature, humidity, fine dust, vibration and impact, and thus can not perform the operation. Or an error occurs frequently during operation.

Accordingly, there is a need for wafer-level hermetic packaging that forms a seal-mounted MEMS package by disposing a cap substrate on top of the sensor substrate where the MEMS element is located, thereby shielding the MEMS element from the external environment.

There are various methods for such wafer-level hermetic packaging, but the Au-Si fusion bonding discussed in the present invention has the following various advantages.

First, since it is not necessary to further fabricate a layer for bonding to the microstructure substrate, the fabrication process of the microstructure substrate can be simplified. Second, it is applicable to a gyro sensor requiring a vacuum package because various substrates can be used and the sealing property is good. Third, since the microstructure substrate and the cap substrate are electrically connected to each other, it is possible to fabricate a structure capable of power connection through the cap substrate. Fourth, if the signal processing device is integrated on the cap wafer in the future, the manufacturing cost and package size can be greatly reduced. Fifth, there is a great advantage that the gap between the microstructure substrate and the cap substrate can be controlled to a level at which gap sensing is possible.

Although there are various cap substrate structures for Au-Si fusion bonding, the structure for forming the bumps has been advantageously commercialized and applied to commercially available stabilized devices and technologies.

Commonly used bump structures are Cu / Ni / Au bumps and Au bumps. In the Cu / Ni / Au bump technology, Au-Si eutectic bonding was performed on a cap substrate made of Cu / Ni / Au bump structure. As a result, a bonding layer vulnerable to moisture was formed, Test) and PCT (Pressure Cooker Test), there is a problem that the performance of the MEMS device is affected and the yield rate is decreased.

As a result, seeds and bumps have to be formed of a material replacing the Cu component, so that conventional semiconductor standard processes can not be used. In addition, since the Ni-Si compound is formed during the bonding process to weaken the bonding strength, special management is required to stabilize the bonding, and it is difficult to control the interval between the microstructure substrate and the cap substrate to a level at which gap sensing is possible.

On the other hand, when the bump is fabricated with an Au bump structure, a cavity forming process for maintaining a proper gap between the microstructure substrate and the cap substrate must be added. Since the cavity forming process is not a standard semiconductor process, it is difficult to control the process, increase the manufacturing cost, and cause various process problems.

1. Korean Patent Publication No. 10-2009-0131029 (Mar. 26, 2010), a wafer level camera module and a manufacturing method thereof 2. U.S. Patent No. 5,747,353 (May 05, 1998), METHOD OF MAKING SURFACE MICRO-MACHINED ACCELEROMETER USING SILICON-ON-INSULATOR TECHNOLOGY

It is an object of the present invention to provide a cap substrate having an Au bump which does not additionally require a cavity forming process, a structure using the cap substrate, and a method of manufacturing the structure.

More specifically, the present invention is based on the discovery that the prior art Cu / Ni / Au bump structure is susceptible to moisture vapors at the Au-Si eutectic bonding interface and that a portion of the copper- In addition, in the case of the Au bump structure of the related art, it is impossible to control the gap between the microstructure substrate and the cap substrate appropriately, so that there is a problem that the cavity forming process must be additionally included It is an object of the present invention to provide a cap substrate, a structure using the cap substrate, and a method of manufacturing the structure.

In order to achieve the above object, a cap substrate according to a first embodiment of the present invention is a cap substrate used for sealingly mounting a microstructure substrate, wherein the cap substrate is formed on the cap substrate, A bump sealingly mounting the microstructure substrate; And a bonding reaction supporting layer formed to have a thickness lower than the bumps and controlling the eutectic reaction of the bumps to maintain a gap between the microstructure substrate and the cap substrate after bonding with the microstructure substrate, Lt; / RTI >

Here, the bonding reaction supporting layer has a melting point and a eutectic melting point higher than the eutectic temperature of the bump with Si.

The bumps may be made of any one or more of Au, Au / Si, Au / Ge, Al / Si, and Al / Ge.

Meanwhile, a structure according to a second embodiment of the present invention includes: a microstructure substrate on which a microstructure is formed; A bump formed on a surface opposite to the microstructure substrate and coupled to a portion of the microstructure substrate for sealingly mounting the microstructure substrate; And a bonding reaction supporting layer formed to a thickness lower than the bump and controlling eutectic reaction of the bumps to maintain a gap between the microstructure substrate and the cap substrate at a predetermined interval after bonding with the microstructure substrate; And a cap substrate.

The microstructure substrate may further include a seed layer electrically connecting the bump to a part of the surface of the cap substrate opposite to the microstructure substrate.

Here, the bonding reaction supporting layer has a melting point and a eutectic melting point higher than the eutectic temperature of the bump with Si.

The bumps may be made of any one or more of Au, Au / Si, Au / Ge, Al / Si, and Al / Ge.

In addition, the microstructured substrate may be a micro-device requiring wafer-level hermetic packaging.

According to another aspect of the present invention, there is provided a method of manufacturing a structure, including: preparing a microstructure substrate having a microstructure formed on a surface thereof; A bump formed on a surface opposite to the microstructured substrate and coupled with a portion of the microstructured substrate to seal and mount the microstructured substrate; And a bonding reaction supporting layer formed to a thickness lower than the bump and controlling eutectic reaction of the bumps to maintain a gap between the microstructure substrate and the cap substrate at a predetermined interval after bonding with the microstructure substrate; The method comprising: preparing a cap substrate; And bonding the microstructure substrate and the cap substrate using a eutectic reaction of the bumps.

According to another aspect of the present invention, there is provided a method of manufacturing a structure, comprising: preparing a microstructure substrate having a microstructure formed on a surface thereof; Forming a bonding reaction support layer on the cap substrate opposite to the microstructure substrate, for sealingly mounting the microstructure substrate; Forming a bump eutectic bonding with the microstructure substrate on a cap substrate facing the microstructure substrate; And eutectic bonding the bump and the microstructure substrate.

Here, the step of eutectic bonding includes pressing and heating at a preset pressure and temperature for close contact between the microstructured substrate and the bump.

In addition, prior to the step of forming the bump, a step of forming a silicon layer on the microstructure substrate may be further included.

The bumps may be made of any one or more of Au, Au / Si, Au / Ge, Al / Si, and Al / Ge.

The bonding reaction supporting layer may be a single layer or two or more layers of a plating material having a melting point and a eutectic point higher than the eutectic temperature of the microstructured substrate and good bonding strength with the seed layer, Cu, Pd, and the like.

The bonding reaction support layer may be formed to have a thickness lower than that of the bumps to control the eutectic reaction of the bumps to maintain a gap between the microstructure substrate and the cap substrate at a predetermined interval after bonding with the microstructure substrate I make it.

According to the cap substrate, the structure and the manufacturing method thereof according to the present invention,

First, it is possible to utilize conventional semiconductor equipment and technology as it is. In other words, Au-Si eutectic bonding between the cap substrate and the microstructured substrate on which the Au bumps are formed can be stably manufactured using devices and techniques set up for commercialization of semiconductors. As a result, It was confirmed that it was formed without any problem. This provides many advantages such as simplification of process steps, easy control of bonding, reduction of Au consumption, vacuum sealing, and easy adjustment of gap between upper and lower wafers.

Second, in the technique of sealing and mounting a microstructure substrate on which a microstructure such as a sensor chip or a semiconductor chip is formed to a cap substrate, it is possible to fabricate a bump structure without a cavity to perform vacuum sealing bonding.

Third, all of the problems in the prior art are solved. That is, in the case of the conventional Cu / Ni / Au bump structure, a moisture weakness is found in the eutectic bonding interface of Au-Si, and a part of the region where copper exists exists as a void due to moisture in the reliability test process In the case of the conventional Au bump structure, it is impossible to properly control the space between the microstructure substrate and the cap substrate, so that the cavity forming process must be additionally included. However, It is possible to solve it at the origin.

1 is a cross-sectional view showing a structure of a microstructure substrate 12 and a cap substrate 11 immediately before sealing mounting using a conventional Cu / Ni / Au bump structure,
Fig. 2 is a cross-sectional view showing a cross-sectional state of the microstructure substrate 12 and the cap substrate 11 after the eutectic bonding of the structure shown in Fig. 1 is completed,
3 is a cross-sectional view showing the cross-sectional state of the microstructure substrate 12 and the cap substrate 11 after performing a reliability evaluation (HAST (High Accelerated Stress Test)) on the structure shown in FIG.
Fig. 4 is a photograph taken after separating the microstructure substrate 12 and the cap substrate 11 with the knife with respect to the structure of Fig. 3,
5 is a cross-sectional view showing the cross-sectional state of the microstructure substrate 12 and the cap substrate 11 using the Au bumps 21 in order to improve the bonding strength and reliability of the Cu / Ni / Au bump structure of FIG. ,
Fig. 6 is a cross-sectional view showing the cross-sectional state of the microstructure substrate 12 and the cap substrate 11 after Au-Si eutectic bonding of the structure shown in Fig. 5 is completed,
7 is a sectional view showing the microstructure substrate 12 and the cap 12 according to the present invention using the bonding reaction supporting layer 22 in order to solve the problem that the eutectic solid phase 17 generated in FIG. Sectional view showing the cross-sectional state of the substrate 11,
8 is a cross-sectional view showing a cross-sectional state of the microstructure substrate 12 and the cap substrate 11 after Au-Si eutectic bonding of the structure shown in FIG. 7 is completed.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. Prior to this, terms and words used in the present specification and claims should not be construed as limited to ordinary or dictionary terms, and the inventor should appropriately interpret the concepts of the terms appropriately The present invention should be construed in accordance with the meaning and concept consistent with the technical idea of the present invention.

Therefore, the embodiments described in this specification and the configurations shown in the drawings are merely the most preferred embodiments of the present invention and do not represent all the technical ideas of the present invention. Therefore, It is to be understood that equivalents and modifications are possible.

Hereinafter, the present inventors will first discuss the problem awareness of the present invention and explain the present invention. 1 to 5, the problem awareness of the present invention will be described. Next, the present invention will be described with reference to Figs. 6 and 7. Fig.

1 is a cross-sectional view showing a structure of a microstructure substrate 12 and a cap substrate 11 immediately before sealing mounting using a conventional Cu / Ni / Au bump structure.

As shown in Fig. 1, a microstructured substrate 12 is located below the structure. The microstructure substrate 12 is composed of a silicon (Si) or an SOI (Si on Insulator) wafer depending on the manufacturing method and the type of device. The cap substrate 11 is placed on the microstructure substrate 12 and the cap substrate 11 is covered and mounted on the microstructure substrate 12 as a cover. Here, the microstructured substrate refers to a substrate made of fine elements requiring wafer-level hermetic packaging, and may be a sensor substrate on which the MEMS element is located.

The cap substrate 11 may be preceded by a wiring process for electrical input and output. The bumps are formed by plating Cu in the order of Cu (14), Ni (15) and Au (16) using Cu as a seed and Au-Si eutectic bonding between the Au (16) and the surface 13 of the microstructure substrate Level hermetic packaging and electrically connecting the two substrates (the microstructure substrate 12 and the cap substrate 11) to each other.

FIG. 2 is a cross-sectional view showing a cross-sectional state of the microstructure substrate 12 and the cap substrate 11 after eutectic bonding of the structure shown in FIG. 1 is completed. The eutectic bonding process includes: a first step in which the eutectic reaction is generated and enlarged in the Au layer 16 and the surface 13 of the microstructure substrate; Second, the liquid phase formed by the eutectic reaction flows to the Ni (15) and Cu (14) along the surface 13 of the microstructure substrate and the side surface of the bump; Third, a part of Cu is diffused into a liquid phase formed by a eutectic reaction and a compound 30 of Ni and Si is formed; Fourth, the step of forming the Cu material 18 on the interface between the microstructure substrate surface 13 and the eutectic solid phase 17 during the phase transformation of the liquid phase formed by the eutectic reaction into the solid phase 17 can be categorized.

3 is a cross-sectional view showing the cross-sectional state of the microstructure substrate 12 and the cap substrate 11 after performing a reliability evaluation (HAST (High Accelerated Stress Test)) on the structure shown in FIG.

As a result of performing a reliability evaluation (HAST (High Accelerated Stress Test)) on the structure shown in FIG. 3, the Cu material 18 formed on the interface between the microstructured substrate surface 13 and the eutectic solid phase 17, Oxidized and removed by moisture, the bonding force between the microstructure substrate surface 13 and the eutectic solid phase 17 is lowered.

In addition, moisture penetrates into the microstructure due to penetration of moisture through the removed space of the Cu material (18), thereby affecting the performance of the microstructure such as the MEMS element, thereby causing a problem of deterioration of the positive / negative yield Respectively. Also, there is a problem that the resistance increases in terms of electrical connection.

4 is a photograph taken after separating the microstructure substrate 12 and the cap substrate 11 with the knife with respect to the structure of FIG.

As shown in FIG. 4, a large area is separated at the interface between Ni (15) and Ni (30), and the Ni (15) And the bonding force of the boundary portion is changed. Such a phenomenon may adversely affect yield and reliability in the future in mass production.

5 is a cross-sectional view showing the cross-sectional state of the microstructure substrate 12 and the cap substrate 11 using the Au bumps 21 in order to improve the bonding strength and reliability of the Cu / Ni / Au bump structure of FIG. to be. The Au bump structure can be formed as a single layer or multiple layers.

6 is a cross-sectional view showing a cross-sectional state of the microstructure substrate 12 and the cap substrate 11 after Au-Si eutectic bonding of the structure shown in FIG. 5 is completed.

It was confirmed that the bond strength was not lowered at the interface between Ni (15) and the compound 30 of Ni and Si shown in FIG. 4, and a strong bonding force such that the surface of the microstructure substrate 12 was broken was confirmed. Also, the reliability issue as shown in Fig. 3 is also expected to be improved.

However, due to the difficulty in controlling the gap between the microstructure substrate 12 and the cap substrate 11, there is a problem that the eutectic solid phase 17 moves by several tens of micrometers or more and electrical shorts are generated.

As described above, in the case of the conventional Cu / Ni / Au bump structure, there is found a weakness of moisture in the Au-Si eutectic bonding interface, copper exists in a void form, Structure, it is impossible to control the gap between the microstructure substrate and the cap substrate. Therefore, a problem has arisen that the cavity formation process must be additionally included. The applicant of the present invention recognized the problem of the prior art and solved the problems of the prior art by adding the bonding reaction support layer 22 as shown in FIGS. 7 and 8 in order to solve the problem.

7 is a sectional view showing the microstructure substrate 12 and the cap 12 according to the present invention using the bonding reaction supporting layer 22 in order to solve the problem that the eutectic solid phase 17 generated in FIG. Sectional view showing a cross-sectional state of the substrate 11. Fig.

The microstructure substrate 12 is a substrate on which microstructures are formed on the surface, and is generally made of Si or Ge.

The cap substrate 11 is a substrate used for sealingly mounting the microstructure substrate 12 and is formed on the cap substrate 11 and is combined with a portion of the microstructure substrate 12 to form the microstructure substrate 12 The Au bump 21 is formed to have a thickness lower than that of the Au bump 21 and controls eutectic reaction of the Au bump 21 to form a fine structure after bonding with the microstructure substrate 12 And a bonding reaction supporting layer 22 for keeping the gap between the substrate 12 and the cap substrate 11 at a constant interval.

For the sake of convenience, the bump 21 will be described as an Au bump 21 for convenience of explanation. The bump is made of any one or more of Au, Au / Si, Au / Ge, Al / Si, Or multi-layers.

Here, the microstructure substrate 12 is made of a micro-device requiring wafer-level hermetic packaging.

In addition, the surface of the region to which the microstructure substrate 12 is bonded may be formed of at least one of Si, Ge, Au / Si, Au / Ge, and Al / Ge.

The microstructure substrate 12 may further include a seed layer for electrically connecting the Au bump 21 to a part of the surface of the cap substrate 11 facing the microstructure substrate 12.

Here, the bonding reaction support layer 22 is formed to have a thickness smaller than that of the Au bumps 21 and has a melting point higher than Au-Si eutectic temperature of the Au bumps 21, . Through the above-described structure, the melting point of the bonding reaction supporting layer 22 has a melting point higher than the Au-Si eutectic temperature of the Au bumps 21, The gap can be controlled by the thickness of the support layer 22. [

The bonding reaction support layer 22 and the Au bumps 21 are mainly used for the plating process, but they can also be formed by vapor deposition such as evaporation and sputtering. It is preferable that the surface of the Au bump is made of at least one of Au, Au / Si, and Au / Ge.

8 is a cross-sectional view showing a cross-sectional state of the microstructure substrate 12 and the cap substrate 11 after Au-Si eutectic bonding of the structure shown in FIG. 7 is completed.

It can be seen that the bonding reaction support layer 22 can maintain an appropriate gap between the microstructure substrate 12 and the cap substrate 11 even though the Au bump 21 is liquidated by the eutectic reaction.

Hereinafter, a method for manufacturing a structure according to the present invention will be described.

A method for fabricating a structure according to the present invention comprises: preparing a microstructure substrate on which a microstructure is formed; An Au bump formed on a surface opposite to the microstructured substrate and coupled with a portion of the microstructured substrate to seally mount the microstructured substrate; And a bonding step of forming a gap between the microstructure substrate and the cap substrate at a predetermined interval after bonding with the microstructure substrate by controlling an eutectic reaction of the Au bumps, Providing a cap substrate comprising a support layer; And bonding the microstructure substrate and the cap substrate using a eutectic reaction of the Au bumps.

According to another aspect of the present invention, there is provided a method of fabricating a structure, comprising: preparing a microstructure substrate on which a microstructure is formed; Forming a seed layer on the microstructure substrate facing surface of the cap substrate for sealingly mounting the microstructure substrate; Forming a bonding reaction supporting layer on the seed layer; Forming Au bumps eutectic bonding with the microstructured substrate; Removing a seed layer in a region other than the region where the Au bump is formed; And eutectic bonding the Au bump and the microstructure substrate.

Preferably, the step of eutectic bonding includes a step of pressing and heating at a preset pressure and temperature for closely contacting the microstructure substrate and the Au bump.

Furthermore, prior to the step of forming the Au bumps, a step of forming a silicon layer on the microstructured substrate may be further included.

It is preferable that the Au bump is made of at least one of Au, Au / Si, and Au / Ge.

The bonding reaction supporting layer may be a single layer or two or more layers of a plating material having a melting point and a eutectic point higher than the eutectic temperature of the microstructured substrate and good bonding strength with the seed layer, Cu, Pd, and the like.

The bonding reaction support layer may be formed to have a thickness lower than that of the Au bumps to control the eutectic reaction of the Au bumps so that the gap between the microstructure substrate and the cap substrate after bonding with the microstructure substrate is maintained at a constant interval .

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. It is to be understood that various modifications and changes may be made without departing from the scope of the appended claims.

11 ... cap substrate
12 ... microstructure substrate
21 ... Au bump
22 ... bonding reaction support layer

Claims (15)

A cap substrate used for sealingly mounting a microstructure substrate,
A bump formed on the cap substrate and coupled to a portion of the microstructure substrate to seal and mount the microstructure substrate; And
A bonding reaction supporting layer formed to have a thickness lower than the bump and controlling an eutectic reaction of the bumps to maintain a gap between the microstructure substrate and the cap substrate after bonding with the microstructure substrate; / RTI >
Cap substrate.
The method according to claim 1,
Wherein the bonding reaction supporting layer comprises:
Having a melting point and a eutectic point higher than the eutectic temperature of the bump with Si,
Cap substrate.
The method according to claim 1,
The bump is made of at least one of Au, Au and Si, Au and Ge, Al and Si, or Al and Ge,
Cap substrate.
A microstructure substrate on which a microstructure is formed; And
A bump formed on a surface opposite to the microstructured substrate and coupled with a portion of the microstructured substrate to seal and mount the microstructured substrate; And a bonding reaction supporting layer formed to a thickness lower than the bump and controlling eutectic reaction of the bumps to maintain a gap between the microstructure substrate and the cap substrate at a predetermined interval after bonding with the microstructure substrate; And a cap substrate,
structure.
5. The method of claim 4,
Further comprising a seed layer electrically connecting the bump to a portion of the surface of the cap substrate opposite the microstructured substrate.
structure.
5. The method of claim 4,
Wherein the bonding reaction supporting layer comprises:
Having a melting point and a eutectic point higher than the eutectic temperature of the bump with Si,
structure.
5. The method of claim 4,
The bump is made of at least one of Au, Au and Si, Au and Ge, Al and Si, or Al and Ge,
structure.
5. The method of claim 4,
The microstructured substrate is made of a micro-device requiring wafer-level hermetic packaging.
structure
Preparing a microstructured substrate on which a microstructure is formed;
A bump formed on a surface opposite to the microstructured substrate and coupled with a portion of the microstructured substrate to seal and mount the microstructured substrate; And a bonding reaction supporting layer formed to a thickness lower than the bump and controlling eutectic reaction of the bumps to maintain a gap between the microstructure substrate and the cap substrate at a predetermined interval after bonding with the microstructure substrate; The method comprising: preparing a cap substrate; And
And bonding the microstructure substrate and the cap substrate using a eutectic reaction of the bumps.
Method of manufacturing a structure.
Preparing a microstructured substrate on which a microstructure is formed;
Forming a bonding reaction support layer on the cap substrate opposite to the microstructure substrate, for sealingly mounting the microstructure substrate;
Forming a bump eutectic bonding with the microstructure substrate on a cap substrate facing the microstructure substrate; And
And eutectic bonding the bump and the microstructure substrate.
Method of manufacturing a structure.
11. The method of claim 10,
Wherein the eutectic bonding comprises:
And pressing and heating the microstructure substrate to a preset pressure and temperature for close contact between the microstructure substrate and the bump.
Method of manufacturing a structure.
11. The method of claim 10,
Prior to the step of forming the bumps,
Further comprising forming a silicon layer on the microstructured substrate.
Method of manufacturing a structure.
11. The method of claim 10,
The bump is made of at least one of Au, Au and Si, Au and Ge, Al and Si, or Al and Ge,
Method of manufacturing a structure.
11. The method of claim 10,
Ti, Cr, V, Al, Cu, and Pd as a plating material having a melting point and a eutectic point higher than the eutectic temperature of the microstructure substrate and having a good bonding strength with the seed layer ≪ RTI ID = 0.0 > and / or < / RTI >
Method of manufacturing a structure.
11. The method of claim 10,
Wherein the bonding reaction support layer is formed to have a lower thickness than the bumps and controls the eutectic reaction of the bumps to maintain a gap between the microstructure substrate and the cap substrate after bonding with the microstructure substrate,
Method of manufacturing a structure.
KR1020140049602A 2014-04-24 2014-04-24 Cap substrate, structure, and method of manufacturing the same KR101581542B1 (en)

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JP2002246489A (en) 2001-02-03 2002-08-30 Samsung Electronics Co Ltd Wafer level hermetic sealing method
KR100941446B1 (en) 2009-03-03 2010-02-11 주식회사 바른전자 Bump structure with multiple layers and method of manufacture

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KR100442830B1 (en) * 2001-12-04 2004-08-02 삼성전자주식회사 Low temperature hermetic sealing method having a passivation layer
KR101206030B1 (en) * 2006-01-25 2012-11-28 삼성전자주식회사 RF module, multi RF module, and method of fabricating thereof
KR100950915B1 (en) 2008-06-17 2010-04-01 삼성전기주식회사 Wafer level camera module and method of manufacturing the same

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Publication number Priority date Publication date Assignee Title
JP2002246489A (en) 2001-02-03 2002-08-30 Samsung Electronics Co Ltd Wafer level hermetic sealing method
KR100941446B1 (en) 2009-03-03 2010-02-11 주식회사 바른전자 Bump structure with multiple layers and method of manufacture

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