KR101574275B1 - 그래픽 파이프라인을 위한 효율적인 상태 관리 - Google Patents
그래픽 파이프라인을 위한 효율적인 상태 관리 Download PDFInfo
- Publication number
- KR101574275B1 KR101574275B1 KR1020107016295A KR20107016295A KR101574275B1 KR 101574275 B1 KR101574275 B1 KR 101574275B1 KR 1020107016295 A KR1020107016295 A KR 1020107016295A KR 20107016295 A KR20107016295 A KR 20107016295A KR 101574275 B1 KR101574275 B1 KR 101574275B1
- Authority
- KR
- South Korea
- Prior art keywords
- block
- global
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- command
- states
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T15/00—3D [Three Dimensional] image rendering
- G06T15/005—General purpose rendering architectures
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/461—Saving or restoring of program or task context
- G06F9/462—Saving or restoring of program or task context with multiple register sets
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Computer Graphics (AREA)
- General Engineering & Computer Science (AREA)
- Image Generation (AREA)
- Image Processing (AREA)
- Advance Control (AREA)
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US1674607P | 2007-12-26 | 2007-12-26 | |
| US61/016,746 | 2007-12-26 | ||
| US12/341,028 US8826294B2 (en) | 2007-12-26 | 2008-12-22 | Efficient state management system |
| US12/341,028 | 2008-12-22 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20100102176A KR20100102176A (ko) | 2010-09-20 |
| KR101574275B1 true KR101574275B1 (ko) | 2015-12-04 |
Family
ID=40800308
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020107016295A Active KR101574275B1 (ko) | 2007-12-26 | 2008-12-23 | 그래픽 파이프라인을 위한 효율적인 상태 관리 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US8826294B2 (enExample) |
| EP (1) | EP2232447B1 (enExample) |
| JP (1) | JP5379810B2 (enExample) |
| KR (1) | KR101574275B1 (enExample) |
| CN (1) | CN101918982B (enExample) |
| WO (1) | WO2009085264A1 (enExample) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9147224B2 (en) * | 2011-11-11 | 2015-09-29 | Nvidia Corporation | Method for handling state transitions in a network of virtual processing nodes |
| CN104484173B (zh) * | 2014-12-12 | 2017-10-27 | 北京国双科技有限公司 | 基于TPL Dataflow的状态监控方法及装置 |
| CN106921646B (zh) * | 2016-07-26 | 2020-11-20 | 创新先进技术有限公司 | 业务处理方法及装置 |
| US10430990B2 (en) * | 2017-09-20 | 2019-10-01 | Intel Corporation | Pixel compression mechanism |
| US20240378790A1 (en) * | 2023-05-09 | 2024-11-14 | Advanced Micro Devices, Inc. | Pipelined graphics state management |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2420261A (en) * | 2004-11-15 | 2006-05-17 | Falanx Microsystems As | Configuring units of a rendering pipeline |
| US20070103475A1 (en) | 2005-11-10 | 2007-05-10 | Via Technologies, Inc. | Interruptible GPU and method for processing multiple contexts and runlists |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE69635066T2 (de) | 1995-06-06 | 2006-07-20 | Hewlett-Packard Development Co., L.P., Houston | Unterbrechungsschema zum Aktualisieren eines Lokalspeichers |
| US6343309B1 (en) | 1996-09-30 | 2002-01-29 | International Business Machines Corporaton | Method and apparatus for parallelizing a graphics pipeline |
| US5920326A (en) | 1997-05-30 | 1999-07-06 | Hewlett Packard Company | Caching and coherency control of multiple geometry accelerators in a computer graphics system |
| US6091422A (en) | 1998-04-03 | 2000-07-18 | Avid Technology, Inc. | System for editing complex visual data providing a continuously updated rendering |
| JP3338673B2 (ja) | 1999-09-07 | 2002-10-28 | 株式会社マルチターム | 3次元仮想空間共有マルチユーザーシステム |
| US6452600B1 (en) * | 1999-10-28 | 2002-09-17 | Nintendo Co., Ltd. | Graphics system interface |
| US6411301B1 (en) * | 1999-10-28 | 2002-06-25 | Nintendo Co., Ltd. | Graphics system interface |
| US6462743B1 (en) | 1999-12-21 | 2002-10-08 | Ati International Srl | Pipeline processing system and method |
| JP2001236221A (ja) | 2000-02-21 | 2001-08-31 | Keisuke Shindo | マルチスレッドを利用するパイプライン並列プロセッサ |
| US7162716B2 (en) | 2001-06-08 | 2007-01-09 | Nvidia Corporation | Software emulator for optimizing application-programmable vertex processing |
| US7586492B2 (en) | 2004-12-20 | 2009-09-08 | Nvidia Corporation | Real-time display post-processing using programmable hardware |
-
2008
- 2008-12-22 US US12/341,028 patent/US8826294B2/en active Active
- 2008-12-23 CN CN200880122341.9A patent/CN101918982B/zh active Active
- 2008-12-23 KR KR1020107016295A patent/KR101574275B1/ko active Active
- 2008-12-23 JP JP2010540662A patent/JP5379810B2/ja active Active
- 2008-12-23 WO PCT/US2008/014011 patent/WO2009085264A1/en not_active Ceased
- 2008-12-23 EP EP08866336.4A patent/EP2232447B1/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2420261A (en) * | 2004-11-15 | 2006-05-17 | Falanx Microsystems As | Configuring units of a rendering pipeline |
| US20070103475A1 (en) | 2005-11-10 | 2007-05-10 | Via Technologies, Inc. | Interruptible GPU and method for processing multiple contexts and runlists |
Also Published As
| Publication number | Publication date |
|---|---|
| JP5379810B2 (ja) | 2013-12-25 |
| EP2232447A1 (en) | 2010-09-29 |
| US20090172677A1 (en) | 2009-07-02 |
| CN101918982B (zh) | 2015-01-21 |
| JP2011508338A (ja) | 2011-03-10 |
| EP2232447B1 (en) | 2019-05-08 |
| WO2009085264A1 (en) | 2009-07-09 |
| CN101918982A (zh) | 2010-12-15 |
| US8826294B2 (en) | 2014-09-02 |
| KR20100102176A (ko) | 2010-09-20 |
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