KR101564438B1 - Multilayer device having intrinsic layered-type single crystal material and method for preparing the same - Google Patents

Abstract

A first electrode; A second electrode; And a single crystal material having a layered structure between the first electrode and the second electrode. In the laminated device of the present invention, the metal electrode bonded directly to both surfaces of the single crystal layer is not oxidized and corroded because the metal electrode is not exposed to the air, and not only the electrical conductivity of the device is high, but also the single crystal material is manufactured by a simple cleavage technique Can be applied to the fabrication of nanodevices having an atomic size channel length.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a multi-layered device including a congenial multi-layered single crystal material,

More particularly, the present invention relates to a layered device having a thickness of an atomic layer unit using a congenital laminated single crystal material and a method of manufacturing the same.

A multilayered device is a device having a structure in which a material such as an insulator, semiconductor, or metal is stacked in a vertical direction, and a memory or a central processing unit that requires a small size and a high integration degree by thinning its thickness to several hundreds of nanometers It is essential for active device applications. Since most materials are made by thermal evaporation techniques that re-vaporize the vaporized gas at high temperatures or sputtering techniques that vaporize the material by hitting the target by accelerating the ionized noble gas, . In this case, impurities or lattice defects generated in the deposited material deteriorate the performance of the device during operation of the device and cause power loss and heat generation that cause malfunction. This problem, which can not be avoided by the current deposition technique, is relatively hindered as the size of the device becomes smaller and the degree of integration becomes higher, which hinders the development of a higher performance nano device.

On the other hand, the congenial laminated monocrystalline material inherently has a single crystal structure with at least impurity or lattice defects. In addition, due to the layered structure along the c-crystal axis, the anisotropy of the atomic bond strength is very large and can be processed into a very thin atomic layer thickness by cleavage. Representative examples of the inherent laminated single crystal material include graphite as a conductor, hexagonal boron nitride as an insulator, and transition metal dichalcogenide as a semiconductor or a superconductor. Since these congenial laminated single crystal materials are naturally formed, their characteristics are uniform, and they are stacked very closely and periodically in units of atomic size, which is highly applicable to very small devices.

Current technology for fabricating a layered device from a congenial laminated monocrystalline material uses a technique of transferring the cleaved material to a previously prepared metal electrode. However, the junction between the cleaved material and the metal electrode made by this transfer technique has a disadvantage in that the electrical conductivity is low and the performance of the device is deteriorated. The reason for this is that the bond between the cleaved material and the metal electrode depends only on weak van der Waals forces and that the prepared metal electrode combines with oxygen and moisture in the air during the transferring technique of the cleaved material They are oxidized or corroded.

SUMMARY OF THE INVENTION The object of the present invention is to solve the above-mentioned problems, and it is an object of the present invention to provide a method of manufacturing a semiconductor device, in which metal electrodes bonded directly to both surfaces of a single crystal layer are not exposed to air and are not oxidized or corroded, Layered device, which can be applied to the fabrication of a nano device having a channel length of an atomic size manufactured as a single crystal material through the technique of the present invention, and a method of manufacturing the same.

According to an aspect of the present invention, there is provided a plasma display panel comprising: a first electrode; A second electrode; And a single crystal material having a layered structure between the first electrode and the second electrode.

The single crystal material may have a layered structure along the c-crystal axis.

The average value of the angle formed by the plane where the first or second electrode and the single crystal material are in contact with the plane perpendicular to the c-crystal axis of the single crystal material may be 0 ° to 20 °.

The thickness of the single crystal material in the c-crystal axis direction may be 0.3 to 1,000 nm.

The single crystal material may include any one selected from the group consisting of a conductor, an insulator, a semiconductor, and a superconductor.

Wherein the single crystalline material is selected from the group consisting of graphene, graphite, hexagonal boron nitride, molybdenum disulfide, tungsten disulfide, niobium disulfide, tantalum disulfide, iron diselenide ), Cobalt diselenide, zirconium nitride chloride, niobium diselenide, bismuth strontium calcium copper oxide, and lanthanum oxide (lanthanum strontium copper oxide).

The first or second electrode may include at least one selected from the group consisting of a transition metal, a Group 13 metal, a rare earth metal, a superconducting metal, and a magnetic metal.

The first or second electrode may be formed of a material selected from the group consisting of Cu, Ag, Au, Pt, Ti, Fe, Sn, Al, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Yb, Lu, Co, Nb, Ni, NbN, NbTiN, GdN, Pb and Cu-perovskite ceramic materials.

The thickness of the first electrode may be 30 to 100 nm.

The thickness of the second electrode may be 60 to 200 nm.

The stacked element can be used for a storage element or a logic circuit element.

According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: forming a first electrode on a cleaved side of a single crystal material having a layered structure (step 1); And forming a second electrode on the other side of the cleaved side of the single crystal material located in the opposite direction of the first side (step 2).

The method of manufacturing a laminate-type device includes: a step (step a) of laminating a sacrificial layer and a supporting layer sequentially on one surface of a first substrate before step 1; Preparing a single crystal material having a layered structure by cleaving the layered single crystal material (step b); And attaching the cleaved one side of the single crystal material of step b to be in contact with the support layer of step a (step c), further comprising the steps of: bumping the sacrificial layer of step 1 between step 1 and step 2 Removing the first substrate (step d); Attaching a second substrate on the first electrode of step d) (step e); And removing the support layer of step e) (step f).

The sacrificial layer may include at least one selected from the group consisting of poly (4-styrenesulfonic acid), polyvinyl alcohol, and polypropylene carbonate. have.

The support layer may be an organic polymer material including polydimethylglutarimide.

The first or second substrate may include any one selected from the group consisting of glass, sapphire, silica, and mica.

The first or second electrode may be formed by any one method selected from the group consisting of electron beam lithography, photolithography, thermal deposition, and sputter deposition.

Removal of the sacrificial layer in step d may be performed by dissolving in water.

The removal of the support layer in step f) can be carried out by dissolving in a solution of N-methylpyrrolidinone.

According to another aspect of the present invention, a computing device including the above-described layered device can be provided.

In the laminated device of the present invention, the metal electrode bonded directly to both surfaces of the single crystal layer is not oxidized and corroded because the metal electrode is not exposed to the air, and the electrical conductivity of the device is high, and the single crystal material is processed by a simple cleavage technique There is an effect that can be applied to the manufacture of nano devices having an atomic size channel length.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a cross-sectional view of a layered device including the congenial laminated single crystal material of the present invention. FIG.
FIG. 2 is a cross-sectional view illustrating a method of manufacturing a multilayered device according to the present invention.
3 is an optical microscope image of the laminate device manufactured in Example 1 of the present invention.
4 is an AFM image of a Josephson junction fabricated according to Comparative Example 1;
5 is a graph showing the temperature dependence of the resistance of the Josephson junction fabricated according to Example 1. FIG.
6 is a graph showing the current-voltage characteristics of the Josephson junction fabricated according to Example 1. FIG.
7 is a graph showing current-voltage characteristics of a Josephson junction fabricated according to Comparative Example 1. FIG.
8 is a graph showing a dV / dI graph (a) of the magnetic field of the Josephson junction fabricated according to Example 1 and an IV characteristic (b) of the microwave applied state.
9 is a graph showing a dV / dI graph (a) of the magnetic field of the Josephson junction manufactured according to Comparative Example 1 and an IV characteristic (b) of the Josephson junction in a state in which microwave is applied.

The invention is capable of various modifications and may have various embodiments, and particular embodiments are exemplified and will be described in detail in the detailed description. It is to be understood, however, that the invention is not to be limited to the specific embodiments, but includes all modifications, equivalents, and alternatives falling within the spirit and scope of the invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The singular expressions include plural expressions unless the context clearly dictates otherwise. In the present application, the terms "comprises" or "having" and the like are used to specify that there is a feature, a number, a step, an operation, an element, a component or a combination thereof described in the specification, But do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or combinations thereof.

Hereinafter, embodiments of the present invention will be described in detail. However, it should be understood that the present invention is not limited thereto, and the present invention is only defined by the scope of the following claims.

Fig. 1 shows a cross-sectional structure of a layered device including the congenial laminated single crystal material of the present invention. Hereinafter, with reference to FIG. 1, the structure of a layered device including the congenial laminated single crystal material of the present invention will be described.

1, a laminated device according to the present invention includes a first electrode 20, a second electrode 22, a single crystal material 10 having a layered structure between the first electrode 20 and the second electrode 22, .

At this time, the single crystal material 10 has a layered structure along the c-crystal axis, and the average value of the angle formed by the plane contacting the first or second electrode and the single crystal material and the plane perpendicular to the c- ° to 20 °, preferably 0 ° to 10 °, more preferably 0 ° to 5 °, and even more preferably 0 °.

The single crystal material 10 is produced by cleavage of a layered material, and the thickness of the single crystal material 10 in the direction of the c-axis can be adjusted within the range of 0.3 to 1,000 nm to the thickness of the atomic layer unit.

The single crystal material 10 may have various electrical characteristics such as a conductor, a non-conductor, a semiconductor, a magnetic body, and a superconductor. Examples thereof include hexagonal boron nitride which is a conductor such as graphene, graphite and nonconductor, semiconductor, molybdenum disulfide, tungsten disulfide, niobium disulfide, tantalum disulfide, Iron diselenide, cobalt diselenide, superconductor zirconium nitride chloride, niobium diselenide, bismuth strontium calcium copper oxide, and the like. oxide, lanthanum strontium copper oxide, etc. may be used alone or together.

The first or second electrode 20, 22 may be a transition metal, a Group 13 metal, a rare earth metal, a superconducting metal, and a magnetic metal, either singly or in combination.

For example, the first and second electrodes 20 and 22 may be made of any one of Cu, Ag, Au, Pt, Ti, Fe, Sn, Al, La, Ce, Pr, Nd, Pm, Sm, Eu, A variety of materials such as Dy, Ho, Er, Tm, Yb, Lu, Co, Nb, Ni, NbN, NbTiN, GdN, Pb and Cu- perovskite- The present invention is not limited thereto.

The thickness of the first electrode 20 is preferably 30 to 100 nm and the thickness of the second electrode 22 is preferably 60 to 200 nm which is twice the thickness of the first electrode 20.

The above-described laminated element of the present invention can be used for a memory element or a logic circuit element.

Hereinafter, a method of manufacturing a multilayered device including the layered single crystal material of the present invention will be described.

FIG. 2 is a cross-sectional view illustrating a method of manufacturing a multilayered device according to the present invention. The method of manufacturing the laminated device of the present invention will be described in detail with reference to FIG.

First, a first electrode 20 is formed on a cleaved surface of a single crystal material 10 having a layered structure (step 1).

The formation of the first electrode 20 may be performed by micropatterning or nano patterning such as photo lithography or electron-beam lithography, thermal deposition, sputtering, etc., which are typically used in semiconductor manufacturing techniques , But is not limited thereto.

Next, the second electrode 22 is formed on the cleaved other surface of the single crystal material 10 located in the opposite direction of the one surface (Step 2).

The method of forming the second electrode 22 is the same as the method of forming the first electrode 20 described above.

Prior to step 1, steps a to c may be performed.

In detail, a sacrificial layer 40 and a supporting layer 50 are sequentially stacked on one surface of the first substrate 30 (step a).

The sacrificial layer 40 may be formed of poly (4-styrenesulfonic acid), polyvinyl alcohol, polypropylene carbonate or the like, May be formed by an organic polymer based on polydimethylglutarimide.

The first substrate 30 may be made of glass, sapphire, silica, and mica.

By Step a, a laminate composed of the first substrate 30 - the sacrificial layer 40 - the support layer 50 can be prepared.

Further, a single crystal material 10 having a layered structure is prepared by cleaving the layered single crystal material (step b).

Since the layered type single crystal material has a layered structure along the upper and lower crystal axes (c-crystal axis), the anisotropy of the atomic bonding strength is very large, so that it can be processed to a very thin atomic layer thickness by the cleavage technique.

Cleavage is a property in which a crystalline solid breaks well along a certain direction when subjected to a mechanical blow.

The cleavage may be made using a sticky material such as a scotch tape. Specifically, a congenial laminated single crystal material is attached to the adhesive tape, and another adhesive tape is stuck on the attached conformational laminated single crystal material to repeatedly carry out the operation. Thus, a single crystal material 10 having a thin thickness of several nm in atomic layer ) Can be obtained. For example, a single-layered or multi-layered graphene layer can be obtained from the graphite by cleavage. However, the cleavage method is not limited to the above method.

The steps a and b do not need to be performed sequentially, and any of the steps may be performed first or simultaneously.

Next, the cleaved one side of the monocrystalline material of step b is adhered to the support layer of step a (step c).

In detail, the single crystal material 10 is attached to the support layer 50 of the laminate composed of the first substrate 30, the sacrificial layer 40 and the support layer 50, 30 - sacrificial layer 40 - support layer 50 - single crystal material 10 can be produced.

Between step 1 and step 2, step d to step f may be performed.

After the first electrode 20 is formed on the cleaved side of the single crystal material 10 having the layered structure (step 1), the sacrifice layer 40 of the step 1 is removed to separate the first substrate 30 (Step d).

The removal of the sacrificial layer 40 may leave a stack of the support layer 50 - the single crystal material 10 - the first electrode 20 as a result of step d.

The sacrificial layer 40 is preferably formed by dissolving the sacrificial layer 40 on the water surface of water contained in the resultant laminate as a result of the step 1, It is preferable to use a substance.

Then, a second substrate is attached on the first electrode of step d (step e).

The second substrate 32 may be made of the same material as the first substrate 30 described above.

The resultant laminate of step e may be dried and then heated at 90 to 120 캜 to improve the adhesion between the first electrode 20 and the second substrate 32.

Next, the support layer 50 of step e is removed (step f).

The support layer 50 may be removed by dissolving it in an N-methylpyrrolidinone solution or the like, and an appropriate solution may be selected depending on the material of the support layer 50.

The step 2 of forming the second electrode 22 on the other surface corresponding to one surface of the first electrode 20 of the single crystal material 10 from which the support layer 50 has been removed may be performed according to step e) have.

Since the first and second electrodes 20 and 22 are directly deposited on both sides of the cleaved single crystal material 10, the multi-layered device including the congenial single crystal material of the present invention manufactured according to the above- The first and second electrodes 20 and 22 may not be exposed to the air and may not be oxidized and corroded, and the electrical conductivity of the device may be improved. In addition, since the single crystal material 10 has a thin thickness at the atomic layer level through the cleavage technique, the present invention can be applied to manufacture of a nano device having an atomic size channel length.

As described above, the first and second electrodes 20 and 22 may be formed of a superconducting metal or a magnetic metal, as well as a conventional metal, in the laminated device including the congenial single crystal material of the present invention. When a superconducting metal is applied to the present invention, it can be applied to manufacture a Josephson junction, which is a basic unit of a superconducting element. When a magnetic metal is applied, a spin valve transistor You may.

On the other hand, since a large number of materials having various properties ranging from a conductor, a non-conductor, a semiconductor and a superconductor are found in the congenial laminated single crystal material, the present invention can be applied to the production of a laminate type device having various properties. .

Hereinafter, the present invention will be described more specifically by way of examples. However, this is for illustrative purposes only, and thus the scope of the present invention is not limited thereto.

[Example]

Example  One: Josephson  Manufacturing of joints

First, an aqueous solution of poly (4-styrenesulfonic acid) was applied as a sacrificial layer on a non-conductive substrate made of silica using a spin coater. The spin coater was rotated at about 3000 rpm for 30 seconds and then heated on a hot plate at 200 DEG C for 90 seconds. Then, polydimethylglutarimide was applied as a support layer using a spin coater. At this time, the spin coater was rotated at about 3000 rpm for about 30 seconds, and then heated on a hot plate at 200 캜 for 20 minutes to form a polymethylglutarimide layer with a thickness of about 1 탆.

In addition, graphite, which is a congenial laminated single crystal material, was stuck to a scotch tape, and then repeatedly stuck with another scotch tape two to five times, and cleaved off to prepare a graphene layer, which was a single crystal layer with a thickness of 43 nm, and adhered to the prepared substrate- sacrificial layer- .

Next, the first Ti / Al / Au (5 nm / 50 nm / 5 nm) superconducting electrode is patterned on the single crystal layer through electron-beam lithography, and the electron- And immersed in xylene solution at 50 캜 for 10 minutes to remove.

Then, the sacrificial layer was melted by immersing the beaker at room temperature in water and the structure having the electrode formed thereon, and the laminate composed of the support layer-single crystal layer-electrode was separated from the nonconductive substrate. The laminate composed of the support layer-single crystal layer-electrode was taken out from the water and turned over so that another glass substrate was in contact with the electrode. This was dried at room temperature for 10 minutes to dry the surface water and heated on a hot plate at 110 ° C for 10 minutes to improve the adhesion between the electrode and the nonconductive substrate.

Next, the laminate was immersed in N-methyl pyrrolidinone solution at 80 ° C for 30 minutes to dissolve and remove the support layer, and another second Ti / Al (Al) layer was formed on the opposite surface of the single- / Au (5 nm / 200 nm / 5 nm) superconducting electrodes were formed by the same method for forming the above electrodes to produce Josephson junctions.

(A) in which the first Ti / Al / Au (5 nm / 50 nm / 5 nm) superconducting electrode is formed in the above embodiment, and the single crystal layer in which the first superconducting electrode is formed is inverted on another silica non- (b), and a second Ti / Al / Au (5 nm / 200 nm / 5 nm) superconducting electrode was formed on the other surface of the single crystal layer. FIG.

Comparative Example  1: Conventional Josephson  join

The Josephson junction of Comparative Example 1 is described in HB Heersche et al . , Nature 446 , 56-59 (March 2007)]. The Josephson junction was fabricated by graphene mechanically stripped of graphite on a silica substrate and two superconducting electrodes were formed by electron beam lithography where the graphene layer was thin. The superconducting electrodes were formed of Ti / Al (10 / 70nm) bilayer, and the two superconducting electrodes were fabricated to be located on the same plane on the graphene layer. The distance between the electrodes of the Josephson junction thus fabricated was in the range of 100 to 500 nm.

An AFM (Atomic Force Microscope) image of the Josephson junction fabricated according to Comparative Example 1 is shown in FIG.

 [Test Example]

Test Example  1: Temperature dependence of resistance

FIG. 5 shows the results of analyzing the resistance change according to the temperature of the Josephson junction fabricated according to Example 1. FIG.

In detail, the temperature dependence of the resistivity (r _c ) of the Josephson junction fabricated according to Example 1 is shown.

The maximum value of the resistance appeared around 50 K, which can be explained by two factors that are opposite in the change of temperature. The resistance is inversely proportional to the product of the charge mobility and the carrier transport density. As the temperature increases, the charge mobility decreases, while the charge carrier density due to thermal excitation increases. The competition causes the resistance to change nonlinearly with temperature. Such characteristics of graphite have been studied in advance and can be said to be graphite-specific properties. This Josephson junction structure will include the metal / graphite junction resistance when measuring the graphite resistance. Nevertheless, it shows that the resistivity of graphite is similar to that of graphite (0.1 ~ 10 mWm) and that it has inherent nonlinear temperature dependence. Therefore, it can be seen that the ideal junction is formed because the resistance of metal / graphite is very small.

Test Example  2: Current-voltage characteristics

The current-voltage characteristics of the Josephson junction fabricated according to Example 1 are shown in FIG. 6, and the current-voltage characteristics according to the various gate voltages of the Josephson junction of Comparative Example 1 are shown in FIG.

According to Fig. 6, the Josephson junction of Example 1 shows that a supercurrent flows with a voltage of 0 V within a critical current of about 0.8 mA, indicating that the Josephson junction is well formed. Josephson junctions can occur when the junction resistance between the superconductor and the metal is very small and the channel length (i.e., the thickness of the graphite) is typically as short as about 300 nm or less, and the Josephson junction manufactured according to Example 1 satisfies this characteristic .

According to FIG. 7, the Josephson junction of the comparative example 1 has a range of the threshold current depending on the gate voltage, but a supercurrent flows at about 100 nA. The threshold current is smaller than that of the first embodiment.

The magnitude of the critical current can be controlled by controlling the junction size of the Josephson junction of the present invention.

Test Example  3: for the magnetic field dV / dI  And a current-voltage characteristic in a state in which a microwave is applied

The dV / dI graph of the (a) magnetic field and (b) the I-V characteristic of the Josephson junction fabricated according to Example 1 and Comparative Example 1 were analyzed and shown in FIGS. 8 and 9, respectively.

Referring to FIGS. 8 and 9, the dV / dI graph for the magnetic field in (a) shows that the threshold current is repeatedly increased and decreased with respect to the magnetic field, which is called a Fraunhofer pattern. In (b), when a microwave is applied, a graph of a step-like shape appears in the I-V characteristic, which is referred to as a Shapiro step. These two phenomena are characteristic of the Josephson junction and show that the Josephson junction is well formed.

In the Josephson junction formed in accordance with Embodiment 1 of the present invention, as in the Josephson junction according to the conventional Comparative Example 1, the Fraunhofer pattern and the Shapiro step are shown, indicating that the Josephson junction is properly formed according to the present invention.

10: single crystal material 20: first electrode
22: second electrode 30: second substrate
32: second substrate 40: sacrificial layer
50: Support layer

Claims (20)

Forming a first electrode on a cleaved side of the single crystal material having a layered structure (step 1); And
(Step 2) of forming a second electrode on the cleaved other surface of the single crystal material located in the opposite direction of the one surface,
Before step 1,
Sequentially stacking a sacrificial layer and a supporting layer on one surface of the first substrate (step a);
Preparing a single crystal material having a layered structure by cleaving the layered single crystal material (step b); And
(Step c) of attaching the cleaved one side of the monocrystalline material of step b to the support layer of step a,
Between step 1 and step 2,
Removing the sacrificial layer of step 1 to separate the first substrate (step d);
Attaching a second substrate on the first electrode of step d) (step e); And
Removing the support layer of step e) (step f); Wherein the step (c) comprises the steps of: The method according to claim 1,
The sacrificial layer may include at least one selected from the group consisting of poly (4-styrenesulfonic acid), polyvinyl alcohol, and polypropylene carbonate. Wherein the step (c) comprises the steps of: The method according to claim 1,
Wherein the support layer is an organic polymer material including polydimethylglutarimide. The method according to claim 1,
Wherein the first or second substrate comprises any one selected from the group consisting of glass, sapphire, silica, and mica. The method according to claim 1,
Wherein the first or second electrode is formed by any one method selected from the group consisting of electron beam lithography, photolithography, thermal deposition, and sputtering deposition. The method according to claim 1,
Wherein the removal of the sacrificial layer in the step (d) is performed by dissolving in water. The method according to claim 1,
Wherein the removal of the support layer in step (f) is carried out by dissolving in a solution of N-methylpyrrolidinone. The method according to claim 1,
The first electrode; The second electrode; And a single crystal material having the layered structure between the first electrode and the second electrode. The method according to claim 1,
Wherein the single crystal material has a layered structure along the c-crystal axis. 10. The method of claim 9,
Wherein an average value of the angle formed by the plane where the first or second electrode and the single crystal material are in contact with the plane perpendicular to the c-crystal axis of the single crystal material is 0 ° to 20 °. The method according to claim 1,
Wherein the thickness of the single crystal material in the c-axis direction is 0.3 to 1,000 nm. delete The method according to claim 1,
Wherein the single crystal material comprises any one selected from the group consisting of a conductor, an insulator, a semiconductor, and a superconductor. 14. The method of claim 13,
Wherein the single crystalline material is selected from the group consisting of graphene, graphite, hexagonal boron nitride, molybdenum disulfide, tungsten disulfide, niobium disulfide, tantalum disulfide, iron diselenide ), Cobalt diselenide, zirconium nitride chloride, niobium diselenide, bismuth strontium calcium copper oxide, and lanthanum oxide (lanthanum strontium copper oxide. < RTI ID = 0.0 > 21. < / RTI > The method according to claim 1,
Wherein the first or second electrode comprises at least one selected from the group consisting of a transition metal, a Group 13 metal, a rare earth metal, a superconducting metal, and a magnetic metal. The method according to claim 1,
The first or second electrode may be formed of a material selected from the group consisting of Cu, Ag, Au, Pt, Ti, Fe, Sn, Al, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Wherein at least one selected from the group consisting of Yb, Lu, Co, Nb, Ni, NbN, NbTiN, GdN, Pb and Cu-perovskite ceramic material is contained. The method according to claim 1,
Wherein the first electrode has a thickness of 30 to 100 nm. 10. The method of claim 9,
Wherein the thickness of the second electrode is 60 to 200 nm. The method according to claim 1,
Wherein the stacked element is used for a storage element or a logic circuit element. delete

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