KR101556990B1 - Display substrate and method of manufacturing the same - Google Patents

Abstract

In a display substrate and a manufacturing method thereof, a display substrate is electrically connected to gate lines and data lines intersecting with each other, and includes a switching transistor including a switching active pattern formed of amorphous silicon, a driving voltage line crossing the gate line, And a driving transistor including a driving active pattern formed of a metal oxide and an electroluminescent element electrically connected to the driving transistor. Thus, it is possible to realize a high-resolution and large-sized display device, and to improve display quality.

AMOLED, oxide semiconductor, metal oxide, driving transistor, current stress

Description

DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME [0002]

The present invention relates to a display substrate and a method of manufacturing the same, and more particularly, to an electroluminescent display substrate and a method of manufacturing the same.

2. Description of the Related Art Recently, an organic light emitting diode (OLED) display has been attracting attention as a display device capable of overcoming the problems of a liquid crystal display device. The organic light emitting diode display includes two electrodes and an organic light emitting layer disposed therebetween. Electrons injected from one electrode and holes injected from the other electrode are combined in the organic light emitting layer to form excitons excitons, and the excitons emit energy and emit light. Since the OLED display device does not require a separate light source as a self-luminous display device, it is advantageous not only in power consumption but also in display quality such as response speed, viewing angle and contrast ratio.

Meanwhile, an active matrix organic light emitting display device includes a switching transistor connected to a signal line and controlling a data voltage, a driving transistor for applying a data voltage received from the switching transistor to a control electrode, driving transistor. The driving transistor is required to have high mobility and stability so as to allow a sufficient current to flow through the electroluminescent element. For this purpose, recently, polycrystalline silicon or microcrystalline silicon is used as an active pattern of the driving transistor.

However, since the process of forming polycrystalline silicon or microcrystalline silicon is performed at a high temperature, misalignment may occur between the upper and lower patterns due to expansion of the base substrate. In addition, since the polycrystalline silicon layer or the microcrystalline silicon layer mainly uses a method of crystallizing amorphous silicon at a high temperature, reliability may be limited in uniformly forming the polycrystalline silicon layer or the microcrystalline silicon layer. Further, even if an active pattern formed of polycrystalline silicon or microcrystalline silicon is used, the occurrence of a leakage current of the transistor can not be fundamentally solved.

Accordingly, it is an object of the present invention to provide a display substrate for improving electrical characteristics of a driving transistor.

Another object of the present invention is to provide a method of manufacturing the display substrate.

According to an aspect of the present invention, a display substrate includes a switching transistor, a driving transistor, and an electroluminescent element.

The switching transistor is electrically connected to the gate line and the data line intersecting with each other and includes a switching active pattern formed of amorphous silicon. The driving transistor includes a driving voltage line crossing the gate line and a driving active pattern electrically connected to the switching transistor and formed of a metal oxide. The electroluminescent element is electrically connected to the driving transistor.

The driving element may include a driving control electrode, a driving input electrode, and a driving output electrode. The switching device may include a switching control electrode, a switching input electrode, and a switching output electrode.

For example, the driving control electrode and the switching control electrode may be formed by patterning a first conductive layer, and the driving input / output electrodes and the switching input / output electrodes may be formed by patterning a second conductive layer May be formed by patterning. At this time, the switching active pattern may be formed on the driving control electrode, and the driving active pattern may be formed on the switching control electrode. Alternatively, the active pattern may be formed on the driving input / output electrodes.

In another embodiment, the driving input / output electrodes and the switching input / output electrodes are formed by patterning a first conductive layer, and the driving control electrode and the switching control electrode are formed by patterning a second conductive layer formed on the first conductive layer, And may be formed by patterning the conductive layer.

In another embodiment, the switching control electrode, the driving input electrode, and the driving output electrode are formed by patterning a first conductive layer, and the switching input electrode, the switching output electrode, and the driving control electrode are formed by patterning the first conductive layer Layer and a second conductive layer different from the first conductive layer.

The gate line, the switching control electrode, and the driving control electrode are formed by patterning the first conductive layer, and the data line, the driving voltage line, and the driving voltage line are formed by patterning the first conductive layer. In the method of manufacturing the display substrate according to an embodiment of the present invention, , Switching input / output electrodes and driving input / output electrodes are formed by patterning the second conductive layer. In the step of forming the switching active pattern, the switching active pattern is formed of amorphous silicon and is formed in a region corresponding to the switching control electrode. In the step of forming the driving active pattern, the driving active pattern is formed of a metal oxide and is formed in a region corresponding to the driving control electrode. The electroluminescent element is electrically connected to the driving output electrode.

In another embodiment, the gate line and the switching control electrode are formed by patterning the first conductive layer, and the data line, the switching input / output electrodes, the driving voltage line, and the driving input / output electrodes are formed by patterning the second conductive layer And the driving control electrode is formed by patterning the third conductive layer. In the step of forming the switching active pattern, the switching active pattern is formed of amorphous silicon and is formed in a region corresponding to the switching control electrode. In the step of forming the driving active pattern, the driving active pattern is formed of a metal oxide and is formed in a region corresponding to the driving control electrode.

According to the display substrate and the method of manufacturing the same, the active characteristics of the switching transistor and the driving transistor can be improved by applying an active pattern matching the characteristics of the switching transistor and the driving transistor. Thus, it is possible to realize a high-resolution and large-sized display device, and to improve display quality.

Further, the display substrate including the switching transistor and the driving transistor can be manufactured under low temperature conditions, and misalignment of the display substrate can be prevented, thereby improving the reliability of the manufacturing process.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings.

While the present invention has been described in connection with what is presently considered to be the most practical and preferred embodiment, it is to be understood that the invention is not limited to the disclosed embodiments. It is to be understood, however, that the invention is not intended to be limited to the particular forms disclosed, but on the contrary, is intended to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention. Like reference numerals are used for like elements in describing each drawing. The terms first, second, etc. may be used to describe various components, but the components should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another. The terminology used in this application is used only to describe a specific embodiment and is not intended to limit the invention. The singular expressions include plural expressions unless the context clearly dictates otherwise. In the present application, the term "comprises" or "comprising ", etc. is intended to specify that there is a stated feature, figure, step, operation, component, But do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms such as those defined in commonly used dictionaries are to be interpreted as having a meaning consistent with the contextual meaning of the related art and are to be interpreted as either ideal or overly formal in the sense of the present application Do not.

In the accompanying drawings, the dimensions of the substrate, layer (film), or patterns are shown enlarged in actuality for clarity of the present invention. In the present invention, when each layer (film), pattern or structure is referred to as being formed on the substrate, on each layer (film) or on the patterns, ) Means that the pattern or structures are directly formed on or under the substrate, each layer (film) or patterns, or another layer (film), another pattern or other structure may be additionally formed on the substrate.

Example 1

1B is a plan view of a display substrate according to Embodiment 1 of the present invention, and FIG. 2 is a cross-sectional view taken along line I-I 'of FIG. 1B Sectional view.

1A, 1B, and 2, a display substrate 101 according to Embodiment 1 of the present invention includes a plurality of signal lines GL, DL, and VL and a plurality of signal lines GL, DL, Of unit pixels. Each of the signal lines GL, DL and VL includes a gate line GL, a data line DL and a driving voltage line VL. Each unit pixel includes a switching transistor Qs, a driving transistor Qd, An electroluminescence element Qe and a storage capacitor Cst.

The display substrate 101 includes a first insulating layer 130 formed on the gate line GL and a second insulating layer 150 formed on the data line DL and the driving voltage line VL. . The display substrate 101 may further include a third insulating layer 160 formed on the second insulating layer 150 and an insulating partition wall WA formed on the third insulating layer 160. [

The gate line GL is a signal line for applying a gate signal (or a scan signal). The gate line GL extends in the first direction D1 and a plurality of the gate lines GL are arranged in parallel in the second direction D2 different from the first direction D1. The second direction D2 may be perpendicular to the first direction D1.

The data line DL is a signal line for applying a data signal. The data lines DL extend in the second direction D2, and a plurality of data lines DL are arranged in parallel in the first direction D1. The data line DL crosses the gate line GL.

The driving voltage line VL is a signal line for transmitting the driving voltage of the electroluminescent device Qe. The driving voltage line VL may be disposed between adjacent data lines DL and may apply the driving voltage to pixels adjacent to each other in the first direction D1.

The switching transistor Qs may transmit the data signal applied to the data line DL to the driving transistor Qd in response to the gate signal applied to the gate line GL. The switching transistor Qs includes a switching control electrode GE1, a switching active pattern AP1, a switching input electrode SE1 and a switching output electrode DE1.

The switching control electrode GE1 is connected to the gate line GL. The switching input electrode SE1 is connected to the data line DL and is formed on the switching active pattern AP1 so as to overlap one end of the switching control electrode GE1. The switching output electrode DE1 is formed on the switching active pattern AP1 so as to be spaced apart from the switching input electrode SE1 and overlapped with the other end of the switching control electrode GE1. The switching output electrode DE1 is connected to the driving control electrode GE2 of the driving transistor Qd to thereby electrically connect the switching transistor Qs to the driving transistor Qd.

The switching active pattern AP1 is formed on the first insulating layer 130 on the switching control electrode GE1. The switching active pattern AP1 includes an amorphous silicon layer 140a which is a semiconductor layer. The amorphous silicon layer 140a is formed of amorphous silicon (a-Si). The switching active pattern AP1 may further include an ohmic contact layer 140b for lowering the contact resistance between the amorphous silicon layer 140a and the switching input electrode SE1 and the switching output electrode DE1 . The ohmic contact layer 140b may be formed of, for example, amorphous silicon (n + a-Si) doped with an n-type impurity at a high concentration.

The switching transistor Qs is an element for turning on / off the driving transistor Qd for driving the electroluminescent element Qe. Therefore, the mobility of the switching active pattern AP1 of the switching transistor Qs is lower than that of other semiconductor materials such as crystalline silicon, fine silicon, And can be easily formed on the base substrate 110 having a large area through a low-temperature process of about 400 DEG C or less. That is, the switching active pattern AP1 is advantageous from the viewpoints of reliability and productivity because the display substrate can be made larger while minimizing damage to the lower film and / or the base substrate by the low temperature process.

Wherein the driving transistor Qd is operated by the data signal applied to the driving control electrode GE2 through the switching output electrode DE1 and the driving transistor Qd is driven by the data signal of the driving voltage line VL. The driving voltage may be transmitted to the electroluminescent device Qe. The driving transistor Qd includes the driving control electrode GE2, the driving active pattern AP2, the driving input electrode SE2, and the driving output electrode DE2.

The driving control electrode GE2 is electrically connected to the switching output electrode DE1. For example, the driving control electrode GE2 may be electrically connected to the switching output electrode DE1 through the first connection electrode CE1. Specifically, the first connection electrode CE1 is connected to the switching output electrode DE1 through a first hole H1 passing through the second insulation layer 150 and the third insulation layer 160 And is connected to the driving control electrode GE2 through a second hole H2 passing through the first to third insulating layers 130, The driving input electrode SE2 is connected to the driving voltage line VL and is formed on the driving active pattern AP2 so as to overlap one end of the driving control electrode GE2. The driving output electrode DE2 is formed on the driving active pattern AP2 so as to be spaced apart from the driving input electrode SE2 and overlapped with the other end of the driving control electrode GE2. The driving output electrode DE2 is electrically connected to the anode AN of the electroluminescent element Qe via a third hole H3 passing through the second insulating layer 150 and the third insulating layer 160. [ Lt; / RTI >

The driving active pattern AP2 is formed on the first insulating layer 130 on the driving control electrode GE2. The driving active pattern AP2 is formed of a metal oxide. Examples of the metal oxide include gallium (Ga), indium (In), tin (Sn), and zinc (Zn). The metal oxide may be at least one selected from the group consisting of lithium, beryllium, sodium, magnesium, calcium, scandium, titanium, vanadium, manganese, (Fe), Ni, Cu, Y, Zr, Nb, Ru, Pd, Cd, Ta, (W), boron (B), carbon (C), nitrogen (N), fluorine (F), aluminum (Al), silicon (Si), phosphorus (P), germanium have. More specifically, the driving active pattern AP2 may include a single oxide such as Gallium Oxide, Indium Oxide, Tin Oxide, and Zinc Oxide, Gallium indium zinc oxide (Ga ₂ O ₃ -In ₂ O ₃ -ZnO, GIZO), indium gallium tin oxide (In ₂ O ₃ -Ga ₂ O ₃ -SnO), indium zinc oxide A mixed metal oxide such as indium zinc oxide (In ₂ O ₃ -Zn ₂ O ₃ ) and zinc aluminum oxide (Zn ₂ O ₃ -Al ₂ O ₃ ).

The mobility of the metal oxide is about 3 cm ² / V · s to about 10 cm ² / V · s, and is about 0.5 cm ² / V · s or about 0.5 cm ² / V · s s to about 1.5 cm < ² > / V · s. Accordingly, the driving transistor Qd moves a relatively large amount of electrons relative to the switching transistor Qs, thereby driving the electroluminescent element Qe through the activated driving pattern AP2 Sufficient current can be delivered.

In addition, the on-current value (I _on) an on / off current ratio (I _on / I _off) divided by the value of the off current (I _off) of the metal oxide is from about 1 × 10 ^7, from about 1 × 10 ⁵ to about Which is about 10 times to about 100 times higher than that of polysilicon having an on / off current ratio of 1 x 10 < ^{6 &} gt ;. This means that the off current value of the metal oxide is lower than the off current value of the polysilicon and is advantageous in minimizing the leakage current of the driving active pattern AP2 formed of the metal oxide. Indeed, the minimum value of the off current of the polysilicon is about 1 nA (nano ampere) to about 1 pA (pico ampere), while the minimum value of the off current of the metal oxide is less than about 1 pA.

Also, although the driving active pattern AP2 is insensitive to the current stress, it can be easily formed on the large-sized base substrate 110 through the low-temperature process. Thus, the use of the metal oxide may be advantageous in maximizing the size of the display substrate, while minimizing damage to the underlying film and / or base substrate by the low temperature process.

3 is a graph for explaining electrical characteristics of the driving transistor according to the first embodiment of the present invention.

In Figure 3, A denotes a threshold voltage (V _th) with time of the transistor having a semiconductor pattern formed of amorphous silicon, B is a threshold voltage (V _th) with time of the transistor having a semiconductor pattern formed of a metal oxide .

3, the transistor having a semiconductor pattern formed of a metal oxide is not this time has elapsed, and also little variation in the threshold voltage (V _th) (B). It can be seen that the transistor having the semiconductor pattern formed of the metal oxide has a threshold voltage of about 0.25 V even after about 100 hours have elapsed. On the other hand, a transistor having a semiconductor pattern formed of amorphous silicon abruptly changes its threshold voltage over time (A). In addition, it can be seen that the transistor having the semiconductor pattern formed of the amorphous silicon abruptly rises in threshold voltage from about 0 V to about 1.75 V in about 20 hours. That is, the transistor having the semiconductor pattern formed of the metal oxide is relatively insensitive to the current stress as compared with the transistor having the semiconductor pattern formed of the amorphous silicon. Accordingly, when the metal oxide is used, an increase in power consumption can be relatively prevented.

The electroluminescent device Qe includes an anode AN connected to the driving output electrode DE2, a cathode CA opposing the anode AN, and an anode AN connected between the anode AN and the cathode CA. (EL). The anode AN provides an electron hole to the light emitting layer EL and the cathode CA provides electrons to the light emitting layer EL, EL) to form an exciton.

Although not shown, the electroluminescent device Qe may further include a hole injection layer, a hole transport layer, an electron injection layer, and an electron transport layer formed between the anode AN and the cathode CA.

The storage capacitor Cst includes a storage electrode STE. Wherein the storage electrode STE defines a first electrode of the storage capacitor Cst and the first insulating layer 130 on the storage electrode STE defines a dielectric layer of the storage capacitor Cst, The anode AN on the storage electrode STE defines a second electrode of the storage capacitor Cst. The storage electrode STE may be connected to the driving control electrode GE2. A fourth hole H4 passing through the third insulating layer 160 on the storage electrode STE is formed on the third insulating layer 160 on the storage electrode STE in order to increase the capacitance of the storage capacitor Cst. (160).

Although not shown, a protective layer, a moisture absorption layer, and the like may be formed on the base substrate 110 including the electroluminescent device Qe. In addition, a counter substrate for protecting the electroluminescent element Qe from moisture penetration and physical impact can be combined. In addition, although only one switching transistor and one driving transistor are shown in the first embodiment of the present invention, at least one transistor and signal lines for driving the same are further included, so that even when driven for a long time, And the driving transistor (Qd) from being deteriorated.

4A to 4G are cross-sectional views illustrating a method of manufacturing the display substrate shown in FIG.

4A, a first conductive pattern including the switching control electrode GE1, the driving control electrode GE2, the gate line GL, and the storage electrode STE is formed on a base substrate 110 . A first conductive layer (not shown) is formed on the base substrate 110, and the first conductive layer is patterned through a photolithography process to form the first conductive pattern.

The base substrate 110 may be a transparent and insulating substrate. The base substrate 110 may be, for example, a glass substrate, a soda lime substrate, a plastic substrate, or the like.

The first conductive layer may have a single layer or a structure in which two or more metal layers having different physical properties are stacked. The first conductive layer may be formed of, for example, aluminum, copper, molybdenum, titanium, tantalum, tungsten, neodymium, chromium, Silver (Ag), and the like.

Referring to FIG. 4B, the first insulating layer 130, the amorphous silicon layer 140a, and the ohmic contact layer 140b are sequentially formed on the base substrate 110 on which the first conductive pattern is formed.

The amorphous silicon layer 140a and the ohmic contact layer 140b are patterned through a photolithography process to form the switching active pattern AP1 on the switching control electrode GE1. The amorphous silicon layer 140a and the ohmic contact layer 140b may be formed on a base substrate 110 on which the first insulating layer 130 is formed by plasma enhanced chemical vapor deposition (PECVD) .

Referring to FIG. 4C, a metal oxide layer (not shown) is formed on the base substrate 110 on which the switching active pattern AP1 is formed, and the driving active pattern AP2 is formed by patterning the metal oxide layer .

The metal oxide layer is formed on the base substrate 110 on which the switching active pattern AP1 is formed by a sputtering method and the metal oxide layer is patterned through a photolithography process to form a pattern on the driving control electrode GE2 The driving active pattern AP2 is formed on the first insulating layer 130. [ Alternatively, the metal oxide layer may be formed by MOCVD (Metal Organic Chemical Vapor Deposition).

The drive active pattern (AP2) is the metal oxide layer HCl (Hydrochloric acid: HCl), acetic acid _{(Acetic acid: CH 3 COOH)} , nitric acid (Nitric acid: HNO ₃₎ and sulfuric acid _{(Sulfuric acid: H 2 SO 4} ) And then performing a wet etching process using the etchant. Alternatively, the driving active pattern AP2 may be dry-etched using an etching gas containing methane gas (CH ₄ ), argon gas (Argon gas), and tri-fluoromethane (CHF ₃ ) .

4B and 4C illustrate that the driving active pattern AP2 is formed after the switching active pattern AP1 is formed. However, after the driving active pattern AP2 is formed, (AP1) may be formed.

4D, the data line DL, the switching input electrode SE1, and the switching output electrode (not shown) are formed on the base substrate 110 on which the switching active pattern AP1 and the driving active pattern AP2 are formed. The first driving conductive line DE1, the driving voltage line VL, the driving input electrode SE2, and the driving output electrode DE2.

A second conductive layer is formed on the base substrate 110 on which the switching active pattern AP1 and the driving active pattern AP2 are formed and the second conductive layer is patterned by photolithography, . The second conductive layer may be formed by stacking a single metal layer or two or more metal layers having different physical properties. The second conductive layer may be formed of, for example, aluminum, copper, molybdenum, titanium, tantalum, tungsten, neodymium, chromium, Silver (Ag), and the like.

When the second conductive layer is formed in a multi-layered structure, the lowermost film of the multi-layer structure is a metal film in contact with the driving active pattern AP2, and the metal film is formed on the driving active pattern AP2, A metal for lowering the contact resistance between the drive output electrode SE2 and the drive output electrode DE2.

Then, the ohmic contact layer 140b of the switching active pattern AP1 exposed through the spaced space between the switching input electrode SE1 and the switching output electrode DE1 is removed.

The second insulating layer 150 and the third insulating layer 160 are sequentially formed on the base substrate 110 on which the second conductive pattern is formed.

Referring to FIG. 4E, the second insulating layer 150 and the third insulating layer 160 on the switching output electrode DE1 are removed to expose a portion of the switching output electrode DE1. Thereby forming a hole H1. The first to third insulating layers 130, 150 and 160 on the driving control electrode GE2 are removed to form the second hole H2 for exposing a part of the driving control electrode GE2. The second insulating layer 150 and the third insulating layer 160 on the driving output electrode DE2 and the driving control electrode GE2 are removed to form the third hole H3, (H4).

Referring to FIG. 4F, a third conductive layer (not shown) is formed on the base substrate 110 on which the first through fourth holes H1, H2, H3, and H4 are formed, And patterned through an etching process to form the first connection electrode CE1 and the anode AN.

The third conductive layer may be formed of a transparent and conductive material having a large work function. The anode (AN) may be formed of, for example, indium zinc oxide, indium tin oxide, vanadium oxide, molybdenum oxide, ruthenium oxide, or the like. . The third conductive layer is connected to the switching output electrode DE1 through the first hole H1 and to the driving control electrode GE2 through the second hole H2, Is connected to the driving output electrode (DE2) through the third electrode (H3).

Referring to FIG. 4G, an organic layer (not shown) is formed on the first connection electrode CE1 and the base substrate 110 on which the anode AN is formed, and the organic layer is patterned to form the insulating partition wall WA . The insulating partition wall WA exposes the anode AN.

The light emitting layer EL is formed on the anode AN exposed by the insulating partition wall WA and the cathode CA is formed on the base substrate 110 on which the light emitting layer EL is formed. The cathode (CA) may be formed of a metal having a low work function, for example, cesium, radium, calcium, or the like. Alternatively, the cathode CA may be formed of an alloy of a metal having a high work function but easy to be deposited on the light emitting layer EL, for example, aluminum, copper, silver, or the like.

As described above, according to the first embodiment of the present invention, the active matrix pattern matching the characteristics of the switching transistor Qs and the driving transistor Qd is applied, thereby realizing high resolution and large size of the display substrate 101 The display quality can be improved. Further, since the driving active pattern AP2 can be formed under a low temperature condition while having almost the same electric characteristics as polysilicon, misalignment of the display substrate can be prevented. The control electrodes GE1 and GE2 of the switching transistor Qs and the driving transistor Qd are formed as the first conductive layer and the input electrodes SE1 and SE2 and the output electrodes DE1 and DE2 ) Is formed of the second conductive layer, the process can be simplified.

Example 2

5 is a cross-sectional view of a display substrate according to a second embodiment of the present invention.

In Fig. 5, the components of the display substrate 102 according to the second embodiment are the same as those of the display substrate 101 according to the first embodiment except for the formation position of the drive active pattern AP2. Therefore, the same members as those in the first embodiment are denoted by the same reference numerals, and a detailed description thereof will be omitted.

Referring to FIG. 5, a display substrate 102 according to Embodiment 2 of the present invention includes a switching transistor Qs, a driving transistor Qd, and an electroluminescent element Qe.

The switching transistor Qs includes a switching active pattern AP1 formed of amorphous silicon.

The driving transistor Qd includes a driving control electrode GE2 formed on the base substrate 110, a driving input electrode SE2 formed on the first insulating layer 130 on the driving control electrode GE2, A drive active pattern AP2 formed on the drive input electrode SE2 and the drive output electrode DE2. The driving active pattern AP2 is formed of a metal oxide.

6A to 6C are cross-sectional views illustrating a method of manufacturing the display substrate shown in FIG.

Referring to FIG. 6A, a first conductive pattern including a switching control electrode GE1, a driving control electrode GE2, and a storage electrode STE is formed on the base substrate 110. Referring to FIG. A first conductive layer (not shown) is formed on the base substrate 110, and the first conductive layer is patterned through a photolithography process to form the first conductive pattern.

The first insulating layer 130 is formed on the base substrate 110 on which the first conductive pattern is formed.

The switching active pattern AP1 is formed on the first insulating layer 130 on the switching control electrode GE1.

Subsequently, on the base substrate 110 on which the switching active pattern AP1 is formed, the switching input electrode SE1, the switching output electrode DE1, the driving input electrode SE2, and the driving output electrode DE2 Thereby forming a second conductive pattern. The second conductive pattern may be formed by forming a second conductive layer and patterning the second conductive layer through a photolithography process.

Referring to FIG. 6B, the driving active pattern AP2 is formed on the base substrate 110 on which the driving input electrode SE2 and the driving output electrode DE2 are formed. The driving active pattern AP2 may be formed by forming a metal oxide on the base substrate 110 on which the second conductive pattern is formed by a sputtering method and patterning the base oxide layer 110 through a photolithography process.

Referring to FIG. 6C, a second insulating layer 150 and a third insulating layer 160 are sequentially formed on a base substrate 110 on which the driving active pattern AP2 is formed, and patterned to form a first hole, The fourth holes H1, H2, H3, and H4 can be formed.

In the method of manufacturing a display substrate according to the second embodiment of the present invention, the steps after the patterning of the second insulating layer 150 and the third insulating layer 160 are performed in the same manner as in the first embodiment, The same reference numerals will be given to the same or similar parts.

According to the second embodiment of the present invention, the driving active pattern AP2 may be exposed to the etching solution for wet-etching the second conductive layer to form the driving input electrode SE2 and the driving output electrode DE2 It is possible to prevent the drive active pattern AP2 from being damaged. In addition, by applying an active pattern that matches the characteristics of the switching transistor Qs and the driving transistor Qd, the display substrate 102 can be realized in high resolution and large size, and the display quality can be improved.

Example 3

7 is a plan view of a display substrate according to a third embodiment of the present invention, and FIG. 8 is a cross-sectional view taken along line II-II 'of FIG.

7 and 8, except for the layered structure of the display substrate 103, the components of the display substrate 103 of Embodiment 3 are the same as those of the display substrate 101 of Embodiment 1 shown in Figs. 1B and 2 Components are the same. Therefore, the same members as those in the first embodiment are denoted by the same reference numerals, and a detailed description thereof will be omitted.

7 and 8, the display substrate 103 according to the third embodiment of the present invention includes a switching transistor Qs, a driving transistor Qd, and an electroluminescent element Qe.

The switching transistor Qs includes a switching input electrode SE1 connected to the data line DL, a switching output electrode DE1 spaced apart from the switching input electrode SE1, the switching input electrode SE1, A switching active pattern AP1 formed on the switching active pattern DE and a switching control electrode GE1 formed on the switching active pattern AP1 and connected to the gate line GL.

The switching output electrode DE1 of the switching transistor Qs and the driving control electrode GE2 of the driving transistor Qd are electrically connected through the first connection electrode CE1. The switching active pattern AP1 is formed of amorphous silicon.

The driving transistor Qd includes a driving input electrode SE2 connected to the driving voltage line VL, a driving output electrode DE2 spaced apart from the driving input electrode SE2, the driving input electrode SE2, A driving active pattern AP2 formed on the electrode DE2 and a driving control electrode GE2 formed on the driving active pattern AP2. The driving output electrode DE2 is electrically connected to the anode AN of the electroluminescent element Qe.

Figs. 9A and 9B are cross-sectional views illustrating a method of manufacturing the display substrate shown in Fig.

Referring to FIG. 9A, a first conductive layer is formed on the base substrate 110, and the first conductive layer is patterned through a photolithography process to form the switching input / output electrodes SE1 and DE1 and the driving Thereby forming a first conductive pattern including the input / output electrodes SE2 and DE2.

Subsequently, on the base substrate 110 on which the first conductive pattern is formed, the switching active pattern AP1 overlapped with the switching input / output electrodes SE1 and DE1 is formed. The switching active pattern AP1 is formed of amorphous silicon. And the driving active pattern AP2 overlapping the driving input / output electrodes SE2 and DE2 of the base substrate 110 on which the switching active pattern AP1 is formed. The driving active pattern AP2 is formed of a metal oxide. Alternatively, the driving active pattern AP2 may be formed, and the switching active pattern AP1 may be formed on the base substrate 110 on which the driving active pattern AP2 is formed.

The first insulating layer 130 is formed on the base substrate 110 on which the switching active pattern AP1 and the driving active pattern AP2 are formed.

Referring to FIG. 9B, a second conductive layer is formed on the base substrate 110 on which the first insulating layer 130 is formed, and the second conductive layer is patterned to form the switching control electrode GE1, Thereby forming a second conductive pattern including the electrode GE2 and the storage electrode STE.

A second insulating layer 150 and a third insulating layer 160 are sequentially formed on the base substrate 110 on which the second conductive pattern is formed.

Subsequently, the first to third insulating layers 130, 150 and 160 on the switching output electrode DE1 are removed to form a fifth hole H5, and the second and third insulating layers 130 and 150 are formed on the driving control electrode GE2. The third insulating layer 150 and 160 are removed to form a sixth hole H6. At the same time, the first to third insulating layers 130, 150 and 160 on the driving output electrode DE2 are removed to form a seventh hole H7, (160) is removed to a predetermined thickness to form an eighth hole (H8). The predetermined thickness may be determined in consideration of the capacitance of the storage capacitor Cst.

A third conductive layer (not shown) is formed on the base substrate 110 on which the fifth through eighth holes H5, H6, H7 and H8 are formed, and the third conductive layer is patterned, (CE1) and the anode (AN). The first connection electrode CE1 is connected to the switching output electrode DE1 through the fifth hole H5 and contacts the drive control electrode GE2 through the sixth hole H6, So that the switching transistor Qs and the driving transistor Qd can be electrically connected. The anode AN is connected to the driving output electrode DE2 through the seventh hole H7.

The process of forming the insulating partition wall WA, the light emitting layer EL and the cathode CA on the base substrate 110 on which the anode AN is formed in Embodiment 3 of the present invention is similar to Embodiment 1 of the present invention The light emitting layer EL and the cathode CA in the manufacturing method of the display substrate 101 according to the first embodiment of the present invention, the overlapping description will be omitted.

8 and 9 illustrate a case where the switching active pattern AP1 and the driving active pattern AP2 are formed on the input electrodes SE1 and SE2 and the output electrodes DE1 and DE2 respectively The switching active pattern AP1 and the driving active pattern AP2 are formed on the base substrate 110 and the switching input / output electrodes SE1 and DE1 are formed on the switching active pattern AP1, And the driving input / output electrodes SE2 and DE2 may be formed on the driving active pattern AP2.

As described above, according to the third embodiment of the present invention, the active matrix pattern matching the characteristics of the switching transistor Qs and the driving transistor Qd is applied to achieve a high resolution and a large size of the display substrate 103 The display quality can be improved. The input electrodes SE1 and SE2 and the output electrodes DE1 and DE2 of the switching transistor Qs and the driving transistor Qd are formed as the first conductive layer and the control electrodes GE1 and GE2 ) Is formed as the second conductive layer, the manufacturing process can be simplified.

Example 4

10 is a cross-sectional view of a display substrate according to a fourth embodiment of the present invention.

10, except for the layered structure of the display substrate 104, the constituent elements of the display substrate 104 of Embodiment 4 are the same as those of the constituent elements of the display substrate 101 of Embodiment 1 shown in Figs. 1B and 2 . Therefore, the same members as those in the first embodiment are denoted by the same reference numerals, and a detailed description thereof will be omitted.

Referring to FIG. 10, a display substrate 104 according to Embodiment 4 of the present invention includes a switching transistor Qs, a driving transistor Qd, and an electroluminescent element Qe.

The switching transistor Qs includes a switching control electrode GE1, a switching active pattern AP1 formed on the switching control electrode GE1, a switching input electrode SE1 formed on the switching active pattern AP1, And an electrode DE1. The switching output electrode DE1 is exposed through the ninth hole H9 passing through the second insulating layer 150 and the third insulating layer 160. [

The driving transistor Qd includes a driving input electrode SE2 and a driving output electrode DE2 formed on the first insulating layer 130 and a driving active pattern formed on the driving input / output electrodes SE2 and DE2 AP2, and a driving control electrode GE2 formed on the driving active pattern AP2. The drive control electrode GE2 is exposed through a tenth hole H10 passing through the third insulating layer 160 and the drive output electrode DE2 is exposed through the second insulating layer 150 and the third And is exposed through an eleventh hole (H11) passing through the insulating layer (160). The drive output electrode DE2 is electrically connected to the electroluminescent element Qe through the eleventh hole H11.

The switching output electrode DE1 and the driving control electrode GE2 are connected to the first connection electrode CE1 through the ninth hole H9 and the tenth hole H10, (Qs) and the driving transistor (Qd) are electrically connected.

The third insulating layer 160 on the storage electrode STE connected to the driving control electrode GE2 includes a twelfth hole H12 whose thickness is removed. The predetermined thickness may be determined in consideration of the capacitance of the storage capacitor Cst.

11A to 11E are sectional views for explaining a method of manufacturing the display substrate shown in Fig.

Referring to FIG. 11A, a first conductive layer is formed on a base substrate 110, and the first conductive layer is patterned to form a first conductive pattern including the switching control electrode GE1.

The first insulating layer 130 is formed on the base substrate 110 on which the first conductive pattern is formed.

Referring to FIG. 11B, the switching active pattern AP1 is formed on the first insulating layer 130. Referring to FIG. The switching active pattern AP1 is formed of amorphous silicon.

A second conductive layer is formed on the base substrate 110 on which the switching active pattern AP1 is formed and the switching input / output electrodes SE1 and DE1, the driving voltage lines VL And the driving input / output electrodes SE2 and DE2.

Referring to FIG. 11C, the driving active pattern AP2 is formed on the base substrate 110 on which the second conductive pattern is formed. The driving active pattern AP2 is formed of a metal oxide.

The second insulating layer 150 is formed on the base substrate 110 on which the driving active pattern AP2 is formed.

11D, a third conductive layer is formed on the base substrate 110 on which the second insulating layer 150 is formed, and the driving control electrode GE2 and the storage electrode STE). ≪ / RTI >

Next, the third insulating layer 160 is formed on the base substrate 110 on which the third conductive pattern is formed. The ninth to tenth holes H9, H10, H11 and H12 are formed by patterning the second insulating layer 150 and the third insulating layer 160. [

Referring to FIG. 11E, a fourth conductive layer is formed on the base substrate 110 on which the ninth through twelfth holes H9, H10, H11, and H12 are formed, and the fourth conductive layer is patterned to form the first Thereby forming the connection electrode CE1 and the anode AN.

The process of forming the insulating partition wall WA, the light emitting layer EL and the cathode CA on the base substrate 110 on which the anode AN is formed in Embodiment 4 of the present invention is similar to Embodiment 1 of the present invention The light emitting layer EL and the cathode CA in the manufacturing method of the display substrate 101 according to the first embodiment of the present invention, the overlapping description will be omitted.

As described above, according to the fourth embodiment of the present invention, by applying the active pattern matching the characteristics of the switching transistor Qs and the driving transistor Qd, the display substrate 104 can be realized in high resolution and large size The display quality can be improved. In addition, by forming the switching control electrode GE1 below the switching active pattern AP1, it is possible to prevent the switching active pattern AP1 from generating a leakage current in response to external light. In addition, by forming the driving active pattern AP2 on the driving input / output electrodes SE2 and DE2, damage to the driving active pattern AP2 can be prevented.

Example 5

FIG. 12 is a plan view of a display substrate according to a fifth embodiment of the present invention, and FIG. 13 is a sectional view taken along line III-III 'of FIG.

12 and 13, the components of the display substrate 105 of the fifth embodiment except for the driving transistor Qd, the driving voltage line VL and the second connecting electrode CE2 are shown in Figs. 1B and 2 Are the same as those of the display substrate 101 of Embodiment 1 shown. Therefore, the same members as those in the first embodiment are denoted by the same reference numerals, and a detailed description thereof will be omitted.

12 and 13, a display substrate 105 according to Embodiment 5 of the present invention includes a switching transistor Qs, a driving transistor Qd, and an electroluminescent element Qe.

The switching output electrode DE1 of the switching transistor Qs is physically and electrically connected to the driving control electrode GE2 of the driving transistor Qd. That is, one end of the switching output electrode DE1 is extended and connected to the driving control electrode GE2. Accordingly, even if there is no separate means for electrically connecting the switching output electrode DE1 and the driving control electrode GE2, they can be electrically connected.

The driving transistor Qd includes driving input / output electrodes SE2 and DE2 and a driving active pattern AP2 formed below the driving control electrode GE2. The driving active pattern AP2 is formed of a metal oxide.

The driving input electrode SE2 is electrically connected to the driving voltage line VL through the second connection electrode CE2. The second connection electrode CE2 exposes the driving voltage line VL through the thirteenth hole H13 which exposes the driving voltage line VL and passes through the second insulating layer 150 and the third insulating layer 160. [ VL). The second connection electrode CE2 exposes the drive input electrode SE2 and includes a fourth hole H14 passing through the first insulation layer 130, the second and third insulation layers 150 and 160, To the driving input electrode SE2.

14A to 14E are sectional views for explaining a method of manufacturing the display substrate shown in Fig.

14A is a cross-sectional view illustrating a step of forming a switching control electrode, driving input / output electrodes and a driving active pattern, and FIG. 14B is a plan view of FIG. 14A.

14A and 14B, a first conductive layer (not shown) is formed on the base substrate 110, and the first conductive layer is patterned to form the gate line GL, the switching control electrode GE1, , The driving input electrode (SE2), and the driving output electrode (DE2).

The driving active pattern AP2 is formed on the base substrate 110 on which the first conductive pattern is formed. The driving active pattern AP2 is formed of a metal oxide. The driving active pattern AP2 may be formed by a sputtering method or an MOCVD method.

The first insulating layer 130 is formed on the base substrate 110 on which the driving active pattern AP2 is formed.

Referring to FIG. 14C, the switching active pattern AP1 is formed on the base substrate 110 on which the first insulating layer 130 is formed. The switching active pattern AP1 is formed of amorphous silicon. The switching active pattern AP1 is formed on the switching control electrode GE1. The switching active pattern AP1 may form amorphous silicon on the first insulating layer 130 by a PECVD method.

For example, the switching active pattern AP1 includes an amorphous silicon layer 140a formed on the first insulating layer 130 and an ohmic contact layer 140b formed on the amorphous silicon layer 140a. The ohmic contact layer 140b may be formed of, for example, amorphous silicon doped with an n-type impurity at a high concentration.

FIG. 14D is a cross-sectional view for explaining a step of forming switching input / output electrodes and a drive control electrode, and FIG. 14E is a plan view of FIG. 14D.

14D and 14E, a second conductive layer is formed on the base substrate 110 on which the switching active pattern AP1 is formed, and the second conductive layer is patterned to form the switching input / output electrodes SE1 , The driving control electrode (GE2), the storage electrode (STE), and the driving voltage line (VL). The driving voltage line VL is spaced apart from the driving control electrode GE2.

The second insulating layer 150 and the third insulating layer 160 are sequentially formed on the base substrate 110 on which the second conductive pattern is formed.

Subsequently, the second insulating layer 150 and the third insulating layer 160 on the driving voltage line VL are removed to form the thirteenth hole H13. The first to third insulating layers 130, 150 and 160 are removed to form the fourteenth hole H14 and the first to third insulating layers 130, 150 and 160 Are removed to form the fifteenth holes H15. At the same time, a part of the third insulating layer 160 on the storage electrode STE may be removed to form the sixteenth hole H16.

A third conductive layer is formed on the base substrate 110 on which the thirteenth through sixteenth holes H13, H14, H15, and H16 are formed, and the third connection electrode CE2 and / Thereby forming an anode (AN). The second connection electrode CE2 is connected to the driving voltage line VL through the thirteenth hole H13 and to the driving control electrode GE2 through the fourteenth hole H14. The anode (AN) is connected to the driving output electrode (DE2) through the fifteenth hole (H15).

The process of forming the insulating partition wall WA, the light emitting layer EL and the cathode CA on the base substrate 110 on which the anode AN is formed in Embodiment 5 of the present invention is similar to Embodiment 1 of the present invention The light emitting layer EL and the cathode CA in the manufacturing method of the display substrate 101 according to the first embodiment of the present invention, the overlapping description will be omitted.

As described above, according to the fifth embodiment of the present invention, by applying the active pattern matching the characteristics of the switching transistor Qs and the driving transistor Qd, the display substrate 105 can be realized in high resolution and large size The display quality can be improved. In addition, by forming the switching control electrode GE1 below the switching active pattern AP1, it is possible to prevent the switching active pattern AP1 from generating a leakage current in response to external light. In addition, by forming the driving active pattern AP2 on the driving input / output electrodes SE2 and DE2, damage to the driving active pattern AP2 can be prevented. Also, the switching control electrode GE1 and the driving input / output electrodes SE2 and DE2 are formed by patterning the first conductive layer, and the switching input / output electrodes SE1 and DE1 and the driving control By forming the electrode GE2 by patterning the second conductive layer, the manufacturing process can be simplified.

Example 6

Fig. 15 is a plan view of a display substrate according to Embodiment 6 of the present invention, and Fig. 16 is a cross-sectional view taken along the line IV-IV 'in Fig.

15 and 16, except for the switching transistor Qs, the components of the display substrate 106 of Embodiment 6 are the same as those of the components of the display substrate 101 of Embodiment 1 shown in Figs. 1B and 2 . Therefore, the same members as those in the first embodiment are denoted by the same reference numerals, and a detailed description thereof will be omitted.

15 and 16, a display substrate 106 according to Embodiment 6 of the present invention includes a switching transistor Qs, a driving transistor Qd, and an electroluminescent element Qe.

The switching transistor Qs includes a switching input electrode SE1 and a switching output electrode DE1 spaced from each other, a switching active pattern AP1 formed on the switching input / output electrodes SE1 and DE1, And a switching control electrode GE1 formed on the switching element AP1. The switching active pattern AP1 is formed of amorphous silicon.

The driving transistor Qd includes a driving control electrode GE2, a driving active pattern AP2 formed on the driving control electrode GE2, a driving input electrode SE2 formed on the driving active pattern AP2, And an electrode DE2. The driving active pattern AP2 is formed of a metal oxide.

The switching output electrode DE1 is physically and electrically connected to the driving control electrode GE2 without any other means. That is, one end of the switching output electrode DE1 is extended and connected to the driving control electrode GE2.

The driving output electrode DE2 is exposed through the seventeenth hole H17 passing through the second insulating layer 150 and the third insulating layer 160 and the driving output electrode DE2 is exposed through the seventeenth hole H17 to the anode AN.

17A to 17E are sectional views for explaining a method of manufacturing the display substrate shown in Fig.

17A, a first conductive layer (not shown) is formed on a base substrate 110, and the data line DL, the switching input / output electrodes SE1 and DE1 ), The driving control electrode (GE2), and the storage electrode (STE). The switching output electrode DE1 and the driving control electrode GE2 are connected.

Referring to FIG. 17B, the switching active pattern AP1 is formed on the base substrate 110 on which the first conductive pattern is formed.

The switching active pattern AP1 is formed between the switching input / output electrodes SE1 and DE1. The amorphous silicon layer 140a and the ohmic contact layer 140b are sequentially formed on the switching active pattern AP1 and the amorphous silicon layer 140a and the ohmic contact layer 140b are patterned through a photolithography process .

Next, a first insulating layer 130 is formed on the base substrate 110 on which the switching active pattern AP1 is formed.

Referring to FIG. 17C, the driving active pattern AP2 is formed on the base substrate 110 on which the first insulating layer 130 is formed. The driving active pattern AP2 is formed of a metal oxide. The driving active pattern AP2 may be formed by forming a metal oxide layer (not shown) and patterning the metal oxide layer through a photolithography process.

17D, a second conductive layer is formed on the base substrate 110 on which the driving active pattern AP2 is formed, and the second conductive layer is patterned to form the driving voltage line VL, the driving input / Thereby forming a second conductive pattern including the electrodes SE2 and DE2.

The second insulating layer 150 is formed on the base substrate 110 on which the second conductive pattern is formed.

17E, a third conductive layer (not shown) is formed on the base substrate 110 on which the second insulating layer 150 is formed, and the third conductive layer is patterned to form the switching control electrode GE1, To form a third conductive pattern.

The third insulating layer 160 is formed on the base substrate 110 on which the third conductive pattern is formed and the third insulating layer 160 on the driving output electrode DE2 is removed to form the seventeenth hole H17). At the same time, a part of the third insulating layer 160 on the storage electrode STE may be removed to form the 18th hole H18. The 18th hole H18 on the storage electrode STE may be formed by removing the third insulating layer 160 and the second insulating layer 150 in consideration of the electric capacity of the storage capacitor Cst have.

Next, a fourth conductive layer (not shown) is formed on the base substrate 110 on which the seventeenth hole H17 and the eighteenth hole H18 are formed, and the fourth conductive layer is patterned to form the anode AN ).

The process of forming the insulating partition wall WA, the light emitting layer EL and the cathode CA on the base substrate 110 on which the anode AN is formed according to Embodiment 6 of the present invention is similar to Embodiment 1 of the present invention The light emitting layer EL and the cathode CA in the manufacturing method of the display substrate 101 according to the first embodiment of the present invention, the overlapping description will be omitted.

As described above, according to the sixth embodiment of the present invention, by applying the active pattern matching the characteristics of the switching transistor Qs and the driving transistor Qd, the display substrate 106 can be realized in high resolution and large size The display quality can be improved.

According to the display substrate and the method of manufacturing the same of the present invention, the electrical characteristics of the switching transistor and the driving transistor can be improved by applying an active pattern matching the characteristics of the switching transistor and the driving transistor. Accordingly, the present invention can be applied to a display substrate having improved display quality while realizing a high-resolution and large-sized display device.

Particularly, by applying an active pattern formed of a metal oxide to the driving transistor, the mobility and stability of the driving transistor can be secured. Further, the display substrate including the switching transistor and the driving transistor can be manufactured under low temperature conditions, and misalignment of the display substrate can be prevented, thereby improving the reliability of the manufacturing process.

It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined in the appended claims. It will be possible.

1A is an equivalent circuit diagram of a display device according to Embodiment 1 of the present invention.

1B is a plan view of a display substrate according to Embodiment 1 of the present invention.

2 is a cross-sectional view taken along line I-I 'of FIG. 1B.

3 is a graph for explaining electrical characteristics of a driving transistor according to the first embodiment of the present invention. FIGS. 4A to 4G are cross-sectional views illustrating a method of manufacturing the display substrate shown in FIG.

5 is a cross-sectional view of a display substrate according to a second embodiment of the present invention.

6A to 6C are cross-sectional views illustrating a method of manufacturing the display substrate shown in FIG.

7 is a plan view of a display substrate according to Embodiment 3 of the present invention.

8 is a cross-sectional view taken along line II-II 'of FIG.

Figs. 9A and 9B are cross-sectional views illustrating a method of manufacturing the display substrate shown in Fig.

10 is a cross-sectional view of a display substrate according to a fourth embodiment of the present invention.

11A to 11E are sectional views for explaining a method of manufacturing the display substrate shown in Fig.

12 is a plan view of a display substrate according to Embodiment 5 of the present invention.

13 is a cross-sectional view taken along line III-III 'of FIG.

Figs. 14A to 14E are cross-sectional views illustrating a method of manufacturing the display substrate shown in Fig.

15 is a plan view of a display substrate according to a sixth embodiment of the present invention.

16 is a cross-sectional view taken along line IV-IV 'of FIG.

17A to 17E are sectional views for explaining a method of manufacturing the display substrate shown in Fig.

           Description of the Related Art

First, second, third, fourth, fifth, and sixth display substrates 101, 102, 103, 104, 105,

GL: gate line DL: data line

VL: driving voltage line Qs: switching transistor

GE1: switching control electrode SE1: switching input electrode

DE1: Switching output electrode AP1: Switching active pattern

Qd: driving transistor GE2: driving control electrode

SE2: drive input electrode DE2: drive output electrode

AP2: Driving active pattern STE: Storage electrode

Qe: electroluminescence element AN: anode

EL: light emitting layer CA: cathode

Claims (20)

A switching transistor electrically connected to gate lines and data lines crossing each other and including a switching active pattern formed of amorphous silicon; A driving electrode electrically connected to the switching transistor, the driving active pattern formed of a metal oxide, the driving control electrode, the driving input electrode connected to the driving voltage line, and the driving electrode spaced apart from the driving input electrode, A driving transistor including an output electrode; An insulating layer formed on the driving transistor; An electroluminescent element electrically connected to the driving transistor; A storage capacitor including a storage electrode coupled to the drive control electrode; And And a contact hole formed by removing the insulating layer on the storage electrode. The method of claim 1, wherein the metal oxide Wherein the display substrate comprises at least one selected from the group consisting of gallium (Ga), indium (In), tin (Sn), and zinc (Zn). 3. The method of claim 2, wherein the metal oxide And at least one selected from the group consisting of Gallium Indium Zinc Oxide and Indium Gallium Tin Oxide. 3. The method of claim 2, wherein the metal oxide (Li), beryllium (Be), sodium (Na), magnesium (Mg), calcium (Ca), scandium (Sc), titanium (Ti), vanadium (V), manganese (Ni), Cu, Y, Zr, Nb, Ru, Pd, Cd, Ta, W, Further comprising at least one selected from the group consisting of boron (B), carbon (C), nitrogen (N), fluorine (F), aluminum (Al), silicon (Si), phosphorus (P) and germanium . The organic light emitting display according to claim 1, wherein the driving control electrode of the driving transistor is formed by patterning a first conductive layer formed on a substrate, Wherein the driving input electrode is formed by patterning a second conductive layer formed on the first conductive layer, connected to the driving voltage line, Wherein the driving output electrode is formed by patterning the second conductive layer. 6. The method of claim 5, wherein the switching transistor A switching control electrode formed by patterning the first conductive layer and connected to the gate line; A switching input electrode formed by patterning the second conductive layer and connected to the data line; And And a switching output electrode which is formed by patterning the second conductive layer and is separated from the switching input electrode and connected to the driving control electrode. 6. The method of claim 5, wherein the switching transistor A switching input electrode formed by patterning the first conductive layer and connected to the data line; A switching output electrode formed by patterning the first conductive layer, the switching output electrode being spaced apart from the switching input electrode and connected to the driving control electrode; And And a switching control electrode connected to the gate line, the switching control electrode being formed by patterning a third conductive layer formed on the second conductive layer. The organic light emitting display according to claim 1, wherein the driving input electrode of the driving transistor is formed by patterning a first conductive layer, Wherein the driving output electrode is formed by patterning the first conductive layer, Wherein the driving control electrode is formed by patterning a second conductive layer formed on the first conductive layer. 9. The device of claim 8, wherein the switching transistor A switching input electrode formed by patterning the first conductive layer and connected to the data line; A switching output electrode formed by patterning the first conductive layer, the switching output electrode being spaced apart from the switching input electrode; And And a switching control electrode formed by patterning the second conductive layer and connected to the gate line. 9. The device of claim 8, wherein the switching transistor A switching control electrode formed by patterning a third conductive layer formed under the first conductive layer and connected to the gate line; A switching input electrode formed by patterning the first conductive layer and connected to the data line; And And a switching output electrode spaced apart from the switching input electrode, the switching output electrode being formed by patterning the first conductive layer. 9. The device of claim 8, wherein the switching transistor A switching control electrode formed by patterning the first conductive layer and connected to the gate line; A switching input electrode formed by patterning the second conductive layer and connected to the data line; And And a switching output electrode formed by patterning the second conductive layer and spaced apart from the switching input electrode. The display substrate according to claim 11, wherein the driving input electrode is electrically connected to the driving voltage line through a connection electrode formed by patterning the fourth conductive layer on the second conductive layer. Forming a first conductive pattern including a switching control electrode connected to a gate line, a driving control electrode, and a storage electrode connected to the driving control electrode; A switching input electrode connected to the data line, a switching output electrode spaced apart from the switching input electrode, a driving input electrode connected to the driving voltage line, and a driving input electrode connected to the driving input electrode, Forming a second conductive pattern including a driving output electrode; Forming a switching active pattern including amorphous silicon in a region corresponding to the switching control electrode; Forming a driving active pattern including a metal oxide in a region corresponding to the driving control electrode; Forming an insulating layer on the driving active pattern; Removing the insulating layer on the storage electrode to form a contact hole; And And forming an electroluminescent device electrically connected to the driving output electrode. 14. The method of claim 13, wherein the second conductive pattern Wherein the first conductive pattern is formed on the base substrate on which the first conductive pattern is formed. 14. The method of claim 13, wherein the first conductive pattern Wherein the second conductive pattern is formed on the base substrate on which the second conductive pattern is formed. 14. The method of claim 13, wherein forming the drive active pattern comprises: Wherein the driving active pattern is formed on the driving input electrode and the driving output electrode. Forming a first conductive pattern including a switching control electrode and a storage electrode connected to a gate line; A switching input electrode connected to the data line, a switching output electrode spaced apart from the switching input electrode, a driving input electrode connected to the driving voltage line, and a driving input electrode connected to the driving input electrode, Forming a second conductive pattern comprising a driven output electrode; Forming a third conductive pattern formed between the driving input electrode and the driving output electrode and including a driving control electrode connected to the storage electrode; Forming a switching active pattern including amorphous silicon in a region corresponding to the switching control electrode; Forming a driving active pattern including a metal oxide in a region corresponding to the driving control electrode; Forming an insulating layer on the driving active pattern; Removing the insulating layer on the storage electrode to form a contact hole; And And forming an electroluminescent device electrically connected to the driving output electrode. The method of claim 17, wherein the second conductive pattern Wherein the first conductive pattern is formed on the base substrate on which the first conductive pattern is formed. Forming a first conductive pattern including a switching control electrode coupled to a gate line and driving input / output electrodes; A data line crossing the gate line, a driving voltage line spaced apart from the driving input electrode, a switching input electrode connected to the data line and a switching output electrode spaced apart from the switching input electrode, Forming a second conductive pattern including an electrode and a storage electrode coupled to the drive control electrode; Forming a switching active pattern including amorphous silicon in a region corresponding to the switching control electrode; Forming a driving active pattern including a metal oxide in a region corresponding to the driving control electrode; Forming an insulating layer on the driving active pattern; Removing the insulating layer on the storage electrode to form a contact hole; And And forming an electroluminescent device electrically connected to the driving output electrode. 20. The method of claim 19, wherein forming the electroluminescent device comprises forming an anode by patterning a third conductive layer, And forming a connection electrode electrically connecting the driving voltage line and the driving input electrode by patterning the third conductive layer in the step of forming the anode.

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