KR101548695B1 - Apparatus and method for topology design of hybrid optical networks on chip - Google Patents

Abstract

The present invention relates to a hybrid optical network-on-chip topology designing method and a device thereof. To design the topology for a hybrid optical network-on-chip, the device generates multiple topology structures based on a characterized graph of an application task and a router model, and detects at least one topology structure having optimized energy efficiency and response time among the topology structures by applying a genetic algorithm technique. The genetic algorithm detects the optimized topology structure through an appropriateness function based on optical signal power loss costs and collision path loss costs.

Description

[0001] APPARATUS AND METHOD FOR TOPOLOGY DESIGN OF HYBRID OPTICAL NETWORKS ON CHIP [0002]

The present invention relates to an apparatus and a method for designing a topology of a Hybrid Optical Networks On Chip (HONoC).

On-chip (Network-on-Chip, NoC), which is highly scalable on-chip communication in the field of multiprocessor system-on-chip (MPSoC)

Recent advances in silicon photonics technology, on the other hand, are driving research into combining optical interconnect (OI) into chip-to-chip communication, and furthermore, on-chip communication. OI is expected to greatly improve bandwidth, power consumption, and response time when compared to traditional electrical interconnects (EI). However, hybrid optical network-on-chip (HONoC) is of interest because it needs to interwork with existing EI-based chips and because of the problem of electric-optical signal conversion and the absence of buffer to store optical signals. .

In the hybrid optical network on chip (HONoC), energy consumption due to optical communication is large, and energy consumption due to optical communication is proportional to the transmission power of the optical signal. In this HONoC, topology design problem is NP-hard problem. Because the optimal topology in general-purpose NoC is hard to exist, a topology optimization design that takes into account application-specific traffic conditions is needed. At this time, two main problems to be considered in HONoC's architecture level design are increased path collision problems due to circuit switching and power loss of optical signals, which are closely related to HONoC's response time and energy efficiency in particular.

Specifically, due to the use of circuit switching on the OI, two or more independent data transmissions can not be simultaneously transmitted, unlike packet switching, when paths are overlapped with each other, A problem of degradation of the response time and the throughput occurs. This problem is caused by the connectivity between cores and communication patterns. Therefore, it is necessary to study a topology that mitigates a path conflict, a routing algorithm that can set various paths, a method of mitigating a path conflict by a core mapping method in a regular topology Is required.

In this paper, we propose a topology design method for HONOC based on heterogeneous multicore based NoC.

In this regard, Korean Patent Registration No. 714073 (entitled "On-chip Network Automatic Generation Method Without Contention of Communication Resources"), in the SoC design, traffic graphs and communication for communication amount between modules constituting the on- Analyzing schedules to automatically generate an optimal on-chip network without contention between each communication request.

SUMMARY OF THE INVENTION In order to solve the problems of the prior art described above, an embodiment of the present invention aims to provide an apparatus and method for designing a topology optimized for response time of an application and energy efficiency of HONoC.

It should be understood, however, that the technical scope of the present invention is not limited to the above-described technical problems, and other technical problems may exist.

According to an aspect of the present invention, there is provided an apparatus for designing a topology of a Hybrid Optical Networks On Chip (HONOC) A topology generator for generating a topology and detecting at least one topology in which energy efficiency and response time are optimized among the plurality of topologies by applying a genetic algorithm technique, And detects the optimized topology through a cost-based fitness function.

According to another aspect of the present invention, there is provided a method for designing a topology of a hybrid optical network on chip (HONOC), the method comprising: Receiving a graph; Generating a plurality of topologies as an initial population based on the graph of the router model and the application task; Selecting an object to be evolved by evaluating a fitness through a fitness function predetermined for the initial population; And generating a next generation population by processing a crossing operation and a mutation operation on the object to be evolved, wherein the next generation population is subjected to object evolution and object evolution in accordance with whether or not the predetermined termination condition is satisfied And detects at least one optimization entity among the population of the end generation as an optimized topology when the entity evolution is terminated.

According to any one of the above-mentioned objects of the present invention, since the topology design problem is NP-hard, a collision of communication paths is reduced by using a heuristic approach based on a genetic algorithm (GA) Optimizes response time and solves optical signal power loss problem by minimizing MR and optical waveguide crossing.

1 is a diagram showing an example of an optical router of HONoC to which an embodiment of the present invention is applied.
FIG. 2 is a diagram illustrating a relationship between a communication characteristic and a topology of a specific application in the HONoC according to an embodiment of the present invention; FIG.
3 is a block diagram showing a configuration of a task designing apparatus of the HONoC according to an embodiment of the present invention.
4 is a diagram illustrating an example of a data structure of a topology entity according to an embodiment of the present invention.
5 is a flowchart illustrating a method of designing a topology of HONoC according to an embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings, which will be readily apparent to those skilled in the art. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. In order to clearly illustrate the present invention, parts not related to the description are omitted, and similar parts are denoted by like reference characters throughout the specification.

Throughout the specification, when a part is referred to as being "connected" to another part, it includes not only "directly connected" but also "electrically connected" with another part in between . Also, when an element is referred to as "comprising ", it means that it can include other elements as well, without departing from the other elements unless specifically stated otherwise.

First, a topology designing apparatus of a hybrid optical network-on-chip (HONOC) according to an embodiment of the present invention is used for a power loss problem of an optical signal considered in designing an optimized HONoC topology and Describe the problem of path collision in detail.

In HONoC, energy consumption due to optical communication is large, and this energy consumption is proportional to the transmission power of the optical signal. For reference, the optical signal transmission power in HONoC can be defined as shown in Equation (1) below.

&Quot; (1) "

As shown in Equation (1), the optical signal transmission power Psrc can be calculated as the sum of the optical signal power loss Lsrc_to_dst and the minimum optical signal power required for optical signal detection at the destination Pdst. At this time, the optical signal power loss Lsrc_to_dst is determined by the routing path, the optical signal transmission power Psrc is determined by the performance of a light source that supplies power to the optical interconnect OI, The optical signal power required (Pdst) is closely related to the performance of the photodetector. However, the performance of light sources and photodetectors is generally related to silicon photonics technology and has limited direct control. Therefore, in order to minimize the energy consumption in HONoC, it is important to set the routing path so as to minimize the optical signal power loss (Lsrc_to_dst).

This optical signal power loss (Lsrc_to_dst) occurs in the optical router and optical waveguide, which has a direct correlation with the topology of HONoC. Therefore, the HONoC topology design apparatus according to an embodiment of the present invention designs an optimized topology that can minimize the optical signal power loss (Lsrc_to_dst).

Hereinafter, a power loss problem and a path collision problem of an optical signal in a HONoC according to an embodiment of the present invention will be described in more detail with reference to FIG. 1 and FIG.

1 is a diagram showing an example of an optical router of HONoC to which an embodiment of the present invention is applied.

1 shows a detailed structure of a 5-port optical router. As shown in FIG. 1, the optical router of HONoC includes a micro-ring resonator (MR) and an optical waveguide as main components. The optical router performs " drop " or " through " the optical signal while routing a particular MR to the ON or OFF state, thereby performing the routing function for the optical signal. The optical signal power loss (Lsrc_to_dst) in the optical router is generated by waveguide crossing loss, waveguide bending loss, MR insertion loss, and the like. At this time, as the number of ports of the optical router increases, the number of required MRs and the number of optical waveguides increase. Accordingly, optical waveguide crossing loss, optical waveguide bending loss, and insertion loss of MR also increase.

FIG. 2 is a diagram illustrating a relationship between a communication characteristic and a topology of a specific application in the HONoC according to an embodiment of the present invention; FIG.

FIG. 2 (a) shows an application task graph, FIG. 2 (b) shows a topology in which the application is simply mapped to each core, and FIG. 2 (c) shows a topology optimized for mapping.

As shown in FIG. 2 (b), in an unoptimized topology, when a data transmission between V ₂ and V ₄ takes an optical path and data transmission is attempted with V ₀ as V ₁ , a path collision problem occurs, Data transfer between V ₀ and V ₁ should wait until data transfer between V ₂ and V ₄ is completed. In the unoptimized topology as shown in FIG. 2 (b), the communication between V ₆ and V ₇ passes through three routers, but passes through the router R ₃ having a relatively large number of ports, so that optical signal power loss becomes large .

On the other hand, in the optimized topology as shown in FIG. 2 (c), the path conflict problem can be solved through appropriate task mapping, and communication between V ₆ and V ₇ can be performed through two routers, Thereby reducing optical signal power loss.

Accordingly, the topology design apparatus according to an embodiment of the present invention can reduce the optical waveguide crossing loss, optical waveguide bending loss, and MR insertion loss, and design an optimized topology that solves the path collision problem.

Hereinafter, the configuration and operation of the HONoC topology designing apparatus according to one embodiment of the present invention will be described in detail with reference to FIG. 3 and FIG.

3 is a block diagram showing a configuration of a task designing apparatus of the HONoC according to an embodiment of the present invention.

3, the task designing apparatus 100 of the HONoC includes a task characterizing unit 110, a topology characterizing unit 120, and a topology generating unit 130.

The task characterization unit 110 models an application task graph (ATG) based on application communication characteristics information according to communication patterns and characteristics of tasks of an application to be processed.

Specifically, in the application task graph G (V, E), v _i ∈ V represents the task and e _{i , j} ∈ E represents the data communication from task v _i to v _j . In this case, the data communication uses BW (e _{i , j} ) _, which represents the bandwidth of communication that v _i sends to v _j , and CV (e _{i , j} ) _, which represents the maximum amount of data that can be sent in one communication when transmitting data. .

The topology characterization unit 120 models a characterization graph of a NoC (Network-on-Chip) topology (hereinafter referred to as a NoC topology graph).

Specifically, in the NoC topology graph T (U, R, F) u i ∈U denotes a core mapping the tasks of the NoC topology, r _i denotes a ∈R Each router existing in the topology, f _{u, i, j} ∈ F represents the connection between the core and the router (u _i , r _j ), and f _{r , i, j} ∈ F represents the connection between the router and the router (r _i , r _j ). At this time, u _i Wow The routing path connecting u _j is called p _{i , j} , which is a set of {u _i , r _k ), (r _k , r _{k '} ), f _{u , i, j} and f _{r ,} , (u _j , r _{k ''} }.

The NoC topology graph through the topology characterization unit 120 has a relationship of U = V in all the topology sets T _A modeled, and the topology in which the routing path p _{i , j} corresponding to all e _{i , j} EE exists The set T _p (⊂ T _A ) is called the topology candidate.

The topology generation unit 130 generates an optimized topology that minimizes optical signal power loss and optical path collision using the application task graph and the NoC topology graph defined through the task characterization unit 110 and the topology characterization unit 120 Design.

At this time, since the design problem of the topology is NP-hard, the topology generation unit 130 according to an embodiment of the present invention generates a topology using a genetic algorithm (GA).

Before describing a method of designing the optimized topology, the topology generator 130 defines the optical signal power loss value to be applied to an embodiment of the present invention and the response time due to the optical path collision.

First, as described above with reference to FIGS. 1 and 2, in the HONoC, the energy efficiency is affected by optical signal power loss, and the optical signal power loss is related to the MR insertion loss and the optical waveguide cross loss. At this time, the optical signal power loss from u _i to u _j in the HONoC topology graph corresponding to the data communication e _{i , j} can be calculated by the following equation (2).

&Quot; (2) "

As shown in Equation (2), power loss in HONoC is influenced by Lcrossings, which are optical waveguide crossing losses, and MR insertion losses, LMR, drop and LMR, through.

For example, when the figure of merit of the N-port nonblocking optical router is as shown in Table 1, Lcrossings, LMR, drop, MR insertion loss, LMR, through can be calculated.

&Quot; (3) "

&Quot; (4) "

&Quot; (5) "

In the above, n (r _i ) represents the number of ports of each router r _i existing in the routing path of the communication e _{i , j} .

이면 e_{i' , j'}∈S_{i ,j}가 된다. In addition, with respect to the path conflicts in HONoC, map the handle tasks in the topology after the communication e _i, of the routing path of the _j f _{u, i, j} or f _{r, i,} all other e which _j is shared _{i ' , j '} ∈ E is defined as S _{i , j} . In other words,

, Then e _{i ' , j'} ∈S _{i , j} .

According to the above definition, the response time due to the optical path collision can be calculated by the following equation (6).

&Quot; (6) "

는 광학적 연결의 대역폭을 의미하고,

는 경로 충돌 발생 시 중첩된 다른 모든 데이터 전송 작업이 완료된 후 자기 자신의 전송이 완료될 때의 워스트 케이스(worst case) 응답 시간을 의미한다.In Equation (6)

Quot; refers to the bandwidth of the optical connection,

Means a worst case response time when a transmission collision is completed after all other overlapped data transmission operations are completed in case of a path collision.

According to the optical signal power loss value defined above and the response time due to the optical path collision, the topology generation problem through the topology generation unit 130 can be defined as in the following pseudo code.

및

는 광학 대역폭의 요구량을 의미하며, 하기 수학식 7 및 8을 통해 산출할 수 있다.In the pseudocode above,

And

Denotes a required amount of optical bandwidth, and can be calculated through the following equations (7) and (8).

&Quot; (7) "

&Quot; (8) "

The topology generation unit 130 obtains an optimal solution (or a suboptimal solution) by applying a genetic algorithm (GA) technique to the topology generation problem defined above. At this time, the topology generation unit 130 receives a router model in a given HONoC and an application task graph to be processed, and designs a topology according to a genetic algorithm (GA) methodology. For reference, genetic algorithm (GA) is a technique that acquires an optimal solution (or a lane) effectively in a wide search space, but has a high parallelism in search of a design space and thus a search speed is very fast.

Specifically, the topology generation unit 130 according to an embodiment of the present invention includes an initial entity generation module 131, a fitness evaluation module 132, an entity evolution processing module 133, and an optimization entity detection module 134 do.

At this time, the initial entity generation module 131 generates a HONoC initial topology population, the fitness evaluation module 132 evaluates the fitness of the topology entity, processes the selection of the topology with high fitness, The processing module 133 performs a series of processes for evolving and processing a topology population using a cross-over operation and a mutation operation. Here, the entity generated by the topology generation unit 130 means one HONOC topology, and the population includes at least one topology. Then, the above-described series of genetic algorithm application processes are repeated until a predetermined end condition is satisfied.

When the population generated through the initial entity creation module 131 and the entity evolution processing module 133 satisfies a predetermined end condition, the optimized entity detection module 134 terminates the entity creation process, Population). The termination condition can be set to reach the set generation or the population can no longer evolve, and the fittest entity (i.e., the object with the highest fitness) in the final generation is selected and the topology design process is terminated . The fittest entity refers to a HONoC topology that is optimized for both energy efficiency and response time. That is, the topology generation unit 130 may design a topology that optimizes the response time of the application and the energy efficiency of the HONoC.

The initial entity creation module 131 creates an entity representing a certain number of independent topologies in the first stage of the topology design. The process of forming the initial population of HONoC will be described in detail with reference to FIG.

4 is a diagram illustrating an example of a data structure of a topology entity according to an embodiment of the present invention.

In this case, FIG. 4 shows a hierarchical structure of entities indicating the topology.

FIG. 4 shows that one specific topology is composed of three hierarchical structures in order to effectively search the design space of the HONoC topology. Through these three hierarchical structures, the mapping relationship of the topology and the routing path can be independently expressed and manipulated separately.

The first layer of the entity shown in FIG. 4 (a) expresses the number of routers to implement the HONoC architecture as a router selection layer. The router selection layer is a binary array router_str _i = {r ₁ , r ₂ , ... r _MAXROUTER }, MAXROUTER represents the maximum number of routers in the HONoC topology architecture, and can be assumed to be twice the number of cores. All the elements in the first layer are marked as "1" (selected) or "0" (not selected) randomly in the initialization phase, and the number of routers to be included in the topology entity is determined. In FIG. 4 (a), r ₁ , r ₄ , and r ₇ are "1" in the first layer of the entity, and routers 1, 4, and 7 are selected in the corresponding topology, indicating that the total number of routers is three.

The second layer of the entity, shown in FIG. 4 (b), represents a core directly connected to each router as a core mapping layer. At this time, each core must be mapped only to the router selected in the first layer. The core mapping layer is an integer array, core2router_str _i = {c ₁ , c ₂ , ... c _CORENUM }, where CORENUM represents the number of application tasks. In the second layer, each core of the member core2router_str is randomly allocated to the routers selected in the first layer. 4 (b), cores 0 and 1 are mapped to router 1 in the second layer of the entity, cores 2, 4 and 5 are mapped to router 4, cores 3, 6 and 7 are mapped to router 7, respectively.

In addition, the third layer of the entity shown in FIG. 4 (c) represents the routing path of each communication in the application task graph as a communication path layer. At this time, the routing path obtained through the shortest path algorithm is expressed based on the mapping relationship of the second layer. In the communication path layer, the routing path com_stri is expressed as a linked list. For reference, the topology generation unit 130 may initialize the communication path layer by applying the minimum path algorithm to the routing path of each communication when generating the initial population. In FIG. 4C, the routing path information of each communication in the communication path layer is shown through a connection list. In the connection list, the port numbers of routers through each communication are sequentially shown.

Next, the fitness evaluation module 132 evaluates and selects a topology population using a predetermined fitness function in a second step of the topology design.

Specifically, the fitness evaluation module 132 selects the appropriate populations in the current generation to generate a new generation of child populations after generating the initial populations. At this time, the probability of being selected is higher for individuals with higher fitness. For reference, the fitness function evaluates the energy efficiency and response time of each topology based on the optical signal power loss and path collision model described above.

The fitness evaluation module 132 may define a fitness function by the following equation (9), and the fitness function may be set to a weighted linear function associated with the two costs.

&Quot; (9) "

In Equation (9) ,? Is a weight of the power loss cost l and ? Is a weight of the path collision cost t . As the entity generated by the topology generation unit 130 has a high value as the fitness function value, the corresponding entity (i.e., topology) has high energy efficiency and low response time.

The individual evolution processing module 133 generates a more suitable topology population by generating a next generation population through a cross-over and mutation operation in a third step of the topology design. For reference, the topologies included in the next generation population are superior to the previous-generation topology in terms of response time and energy efficiency. In addition, the topology population generation method in the third stage of the topology design can apply the object generation method according to the hierarchical structure described in the first step.

For example, a crossover operation evolves (ie, optimizes) a population by selecting two parents in the previous generation and creating two new child entities. At this time, for a large design space and a reasonable evolutionary interval, the crossover operations can be applied independently at the router selection, core mapping and communication path layer levels, respectively. Then, it is possible to further check whether the correct topology has been generated by checking the suitability of the acquired topology object through the intersection operation.

Variation operations are operations that prevent the whole entity from falling into the local optimum together and achieve topology diversity. In the mutation operation, a single entity is selected at random and the mutation operation is performed. At this time, the mutation operation can be performed in the third layer of the above-described entity as follows. In the router selection layer, router removal and addition of the topology is performed. In the core mapping layer, the router to which the core is connected is changed. In the communication path layer, one communication is randomly selected to change the communication to another possible shortest path. After the variation operation is completed, the process of confirming the fitness can be further performed as in the case of the crossover operation.

The process of designing the optimized topology by the topology generator 130 as described above can be processed as in the following algorithm.

Hereinafter, a topology design method of the HONoC according to an embodiment of the present invention will be described in detail with reference to FIG.

5 is a flowchart illustrating a method of designing a topology of HONoC according to an embodiment of the present invention.

First, the model of the router and the application task graph (ATG) applied to design the topology of HONoC are inputted (S510).

Next, an initial population is generated based on the router model and the application task graph (S520).

At this time, the entity means one topology, and the population includes at least one topology. Specifically, at the time of entity creation, a plurality of routers to implement the HONoC topology are randomly selected, the cores are randomly mapped to the selected routers, and a minimum path (i.e., a routing path) is set in communication between mapped cores do. For reference, cores mapped to routers are mapped application tasks, and each core can be allocated to the selected router using a NoC topology graph in which application tasks are mapped on a core-by-core basis through NoC topology characterization.

Then, the elite population (that is, the object to be evolved) is selected by evaluating the fitness through the fitness function for the generated population (S530).

At this time, the goodness-of-fit function is set based on the path collision cost and the optical signal power loss cost, and the possibility that the path collision cost and the optical signal power loss cost are lower is more likely to be selected.

Next, the next generation population is generated by processing the selected population with the intersection operation and the mutation operation (S540).

Specifically, in the previous generation, a parent is selected and a new child is created to evolve the population. Also, when a single entity is selected in the current generation, router removal and addition are performed in selecting a router, the router to which each core is allocated is changed, and random communication is selected and changed to another possible shortest path.

Then, it is determined whether the evolution step through generation of the next generation population is satisfied with the preset termination condition (S550). If the termination condition is satisfied, the solution set (that is, the last evolved population or entity) (S551).

On the other hand, if the termination condition is not satisfied, the fitness is evaluated to select the elite population (S530), and the procedure is repeated until the termination condition is satisfied (S552).

In this case, the termination condition is a case where the generation reaches a preset generation or the population can not evolve any more, and the optimum entity (the object with the highest fitness) in the end generation can be selected and the topology design process can be terminated.

It will be understood by those skilled in the art that the foregoing description of the present invention is for illustrative purposes only and that those of ordinary skill in the art can readily understand that various changes and modifications may be made without departing from the spirit or essential characteristics of the present invention. will be. It is therefore to be understood that the above-described embodiments are illustrative in all aspects and not restrictive. For example, each component described as a single entity may be distributed and implemented, and components described as being distributed may also be implemented in a combined form.

The scope of the present invention is defined by the appended claims rather than the detailed description and all changes or modifications derived from the meaning and scope of the claims and their equivalents are to be construed as being included within the scope of the present invention do.

100: Topology design device for hybrid optical network on-chip
110: Task Characterization Unit
120: Topology Characterization Unit
130: Topology generator

Claims (11)

In a topology designing apparatus of a hybrid optical network-on-chip (HONoC)
And a topology generation unit configured to generate a plurality of topologies based on a characteristic graph of a router model and an application task, and to detect at least one topology in which energy efficiency and response time are optimized among the plurality of topologies by applying a genetic algorithm technique,
Wherein the genetic algorithm detects the optimized topology through a fitness function based on optical signal power loss cost and path collision cost,
The optical signal power loss cost is calculated on the basis of the cross loss of the optical waveguide included in the HONoC and the insertion loss of the microring resonator,
Wherein the path conflict cost is calculated based on a bandwidth of the optical connection in the HONoC and a worst case response time in the occurrence of an optical path collision. The method according to claim 1,
The topology generator may include:
An initial entity generation module for generating a plurality of topologies as an initial population based on the characteristic graph of the router model and the application task;
A fitness evaluation module for evaluating a fitness through the fitness function for the generated population including the initial population to select an object to be evolved;
An entity evolution processing module for generating a next generation population by processing a crossover operation and a mutation operation on the object to be advanced; And
An optimization object detection module for determining the end of the individual evolution according to whether the generated next generation population satisfies predetermined termination condition and for detecting at least one of the population of the end generation population when the individual evolution is terminated Comprising a hybrid optical network-on-chip topology design apparatus. 3. The method of claim 2,
Wherein the initial entity creation module and the entity evolution processing module each include:
A plurality of routers to implement the HONoC topology are randomly selected, a core is randomly mapped to the selected router, a routing path is set according to a minimum path in communication between the mapped cores for each selected router, ,
Wherein the application task is mapped in advance for each core. 3. The method of claim 2,
The cross-
A hybrid optical network-on-a-chip topology design device that selects multiple parent entities in a previous generation to generate new child entities and evolve the population. The method of claim 3,
The shift operation may include:
A hybrid optical network-on-chip < RTI ID = 0.0 > (CHIP) < / RTI > chip for removing or adding an included router to at least one entity included in the current generation, changing a router to which at least one core of the cores is mapped, Of a topology design apparatus. 3. The method of claim 2,
The termination condition may be,
And when the predetermined generation is reached or when the population is no longer evolving, the hybrid optical network-on-a-chip topology designing apparatus is set. The method according to claim 6,
The optimization object detection module includes:
And detects the best fit object in the end generation with the optimized topology. A topology design method using a topology design apparatus of a hybrid optical network-on-chip (HONOC)
Receiving a characterization graph of a router model and an application task;
Generating a plurality of topologies as an initial population based on the graph of the router model and the application task;
Selecting an object to be evolved by evaluating a fitness through a fitness function predetermined for the initial population; And
And generating a next generation population by processing cross-calculation and mutation operations on the object to be evolved,
Determining whether to repeat the individual evolution and the termination of the individual evolution according to whether or not the predetermined termination condition is satisfied for the next generation population,
When the entity evolution is completed, detecting at least one optimization entity among the population of the end generation as an optimized topology,
Wherein the fitness function comprises:
Based on the optical signal power loss cost calculated based on the cross loss of the optical waveguide included in the HONoC and the insertion loss of the microring resonator, and the bandwidth of the optical connection in the HONoC and the worst case response time in the occurrence of optical path collision Wherein the path cost is set based on the calculated path collision cost. 9. The method of claim 8,
Wherein said initial population and said next generation populations are each,
A plurality of routers to implement the topology of the HONoC are randomly selected,
Randomly mapping a core to the selected router,
And generating a routing path according to a minimum path in communication between mapped cores for each selected router,
Wherein the application task is mapped in advance for each core. 9. The method of claim 8,
The termination condition may be,
Wherein the population is set to reach a preset generation or when the population is no longer evolving. 11. The method of claim 10,
And detecting an object with the highest fitness in the end generation with the optimized topology.

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