KR101541534B1 - Apparatus and method for design of optical router in optical networks-on-chip - Google Patents

Abstract

The present invention relates to a method for designing an optical router of an optical network-on-chip. According to the present invention, a characteristic graph depending on a connectivity relation between an optical switch of the optical router, an optical waveguide, and an optical terminator is created based on topology, a routing algorithm, and a traffic pattern of an optical network-on-chip; a minimization solution of costs of each edge in the characteristic graph and a minimization cost flow problem depending on the amount of data flow through an edge is detected; router connectivity information for the optical switch, the optical waveguide, and the optical terminator depending on the minimization solution is created; a tree graph according to an integer linear programming (ILP) method is created based on the router connectivity information; the minimization solution of crossing costs depending on constitution of the optical waveguide of each tree node in the tree graph and additional crossing costs depending on arrangement of the optical switch is detected through a predetermined crossing cost minimization function; each of the tree nodes is divided into a plurality of tiles, and then the optical switch, the optical waveguide; and the optical terminator are arranged by the tiles based on the minimization solution in order to create a physical layout.

Description

[0001] APPARATUS AND METHOD FOR DESIGN OF OPTICAL ROUTER IN OPTICAL NETWORKS ON CHIP [0002]

The present invention relates to an apparatus and a design method for designing an optical router that handles routing by minimizing signal attenuation in an optical network-on-chip (ONoC) environment.

Multi-Processor System-on-Chip (MPSoC) with multiple cores has been developed due to the limitations of power efficiency versus performance of single-core processors. In such a multiprocessor system-on-chip, when a conventional bus structure is applied, a problem of a bottleneck may occur and the performance of the entire system may be degraded. As a result, Network-on-Chip (NoC), which applies on-chip network (OCN) concepts to advanced SoC structures with integrated core and IP (Intellectual Property) . NoC is emerging as a scalable solution for highly complex communication-centric SoC designs. This NoC paradigm emphasizes the impact on communication capacity in overall system performance, and therefore the bus structure, which is a conventional communication scheme, is being replaced by a distributed switch / router based on on-chip network.

On the other hand, in optical routers that are the core of optical network on chip (OnoC), switching of optical switches and signal attenuation occurs when optical waveguides intersect. Therefore, in a large-scale optical network-on-chip in which a large number of optical switches can be included and frequent optical switching occurs, the resulting signal loss can be a serious problem. In recent years, studies have been actively conducted to minimize insertion loss in optical routers. However, existing optical routers are not easily scalable, so they are mostly optimized for a specific network-on-chip architecture. Also, when the optical router is designed considering the scalability, there is a disadvantage that it causes more signal attenuation than the conventional optical router since the scalability is emphasized.

Therefore, there is a need for an optical router design method capable of supporting scalability to optimize for various network-on-chip architectures and minimizing optical signal loss considering optical router physical layout.

In this regard, Korean Patent Registration No. 714073 (entitled " On-chip Network Automatic Generation Method Without Contention of Communication Resources "), in the SoC design, traffic graphs and communication schedules for communication amounts between modules constituting an on- And automatically generates an optimal on-chip network without contention between communication requests.

SUMMARY OF THE INVENTION In order to solve the problems of the related art described above, an embodiment of the present invention provides an apparatus and method for designing an optical router capable of minimizing signal attenuation in an ONoC environment.

It should be understood, however, that the technical scope of the present invention is not limited to the above-described technical problems, and other technical problems may exist.

According to an aspect of the present invention, there is provided an apparatus for designing an optical network-on-chip (ONoC) optical router including a plurality of optical routers, Generating a characterization graph according to a connection relationship between an optical switch, an optical waveguide, and an optical terminator of an optical router based on a topology, a routing algorithm, and a traffic pattern, calculating a cost of each edge in the characterization graph, A router connection characterization unit for detecting a solution of a minimum cost flow problem according to a data flow amount and generating router connectivity information for the optical switch, optical waveguide and optical terminator according to the minimization solution; And generating a tree graph according to an integer linear programming (ILP) technique based on the router connectivity information, dividing each tree node into a plurality of tiles in the tree graph, A solution for minimizing an intersection cost according to the configuration of the optical waveguide of each of the tree nodes and an additional intersection cost due to the arrangement of the optical switches is detected through the function of the optical switch, the optical waveguide and the optical switch And a router element placement modeling unit for arranging the terminators to generate a physical layout.

According to another aspect of the present invention, there is provided a method of designing an optical router via an optical network-on-chip (ONoC) optical router designing apparatus, comprising the steps of: Generating a characteristic graph according to a connection relationship between the optical switch of the optical router, the optical waveguide, and the optical terminator based on the connection graph; Detecting a solution of a minimum cost flow problem according to the cost of each edge in the characterization graph and the data flow through the edge; Generating router connectivity information for the optical switch, optical waveguide, and optical terminator according to the minimization solution; Generating a tree graph according to an integer linear programming (ILP) scheme based on the router connectivity information; Detecting a solution that minimizes an intersection cost according to the configuration of the optical waveguide of each tree node in the tree graph and an additional intersection cost due to the optical switch arrangement through a predetermined intersection cost minimizing function; And dividing each tree node into a plurality of tiles, and arranging optical switches, optical waveguides, and optical terminators for each of the tiles based on the minimizing solution to generate a physical layout.

According to any of the above-mentioned objects of the present invention, it is possible to design an optical router that optimizes signal attenuation while targeting a specific topology, a routing algorithm, and a traffic pattern to ONoC, thereby enhancing energy efficiency in the system.

According to any one of the tasks of the present invention, the actual elements of the SoC design that are not considered in the existing network-on-chip system can be considered, and the practicality of the ONoC can be enhanced.

Further, according to any one of the tasks of the present invention, it is possible to design a router having the advantages of low insertion loss, small waveguide crossing, small optical switch, and minimum router usage when designing an optical router.

1 is a block diagram showing a configuration of an optical router designing apparatus according to an embodiment of the present invention.
2 is a diagram illustrating a method of transmitting a signal through an optical switch and an optical waveguide in an optical router in an embodiment of the present invention.
3 is a view for explaining signal loss caused by optical waveguides crossed with each other in an embodiment of the present invention.
4 is a diagram illustrating an example of a switching graph according to an embodiment of the present invention.
5 is a diagram illustrating an example of a tree graph for finding an optimal layout of optical router elements according to an embodiment of the present invention.
6 is a view illustrating input and output positions of an optical waveguide in a partition tile according to an embodiment of the present invention.
7 is a view for explaining a relationship between two pairs of optical waveguides in a partition tile according to an embodiment of the present invention.
8 is a diagram for explaining an additional intersection by an optical switch in a partition tile according to an embodiment of the present invention.
9 is a diagram for explaining a process of dividing each node into a plurality of tiles according to an embodiment of the present invention.
10 is a diagram illustrating a configuration of a basic cell constituting a leaf node according to an embodiment of the present invention.
11 is a flowchart illustrating a method of designing an optical router according to an embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings, which will be readily apparent to those skilled in the art. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. In order to clearly illustrate the present invention, parts not related to the description are omitted, and similar parts are denoted by like reference characters throughout the specification.

Throughout the specification, when a part is referred to as being "connected" to another part, it includes not only "directly connected" but also "electrically connected" with another part in between . Also, when an element is referred to as "comprising ", it means that it can include other elements as well, without departing from the other elements unless specifically stated otherwise.

1 is a block diagram showing a configuration of an optical router designing apparatus according to an embodiment of the present invention. 2 is a diagram illustrating a method of transmitting a signal through an optical switch and an optical waveguide in an optical router in an embodiment of the present invention. 3 is a diagram for explaining signal loss caused by optical waveguides crossed with each other in an embodiment of the present invention.

First, referring to FIG. 2, a description will be given of a structure and operation of an optical router design apparatus 10 according to an embodiment of the present invention. Referring to FIG. 2, The signal transmission method through the switch 11 and the optical waveguide 12 will be described.

The optical switch 11 is a switch element that changes the traveling direction of a signal (that is, an optical signal) transmitted through the optical waveguide 12. As shown in FIG. 2, the optical switch 11 converts a signal transmitted in one direction through one optical waveguide 12-1 to another optical waveguide 12-2, thereby changing the traveling direction.

2, the optical switch 11 according to an exemplary embodiment of the present invention may be a micro-ring resonator (MR). The optical switch 11 may be a crossing switch element for switching a signal between optical waveguides crossed with each other and a parallel switch element for switching a signal between optical waveguides parallel to each other.

2 (a) and 2 (b), a crossing switch element 11 for switching the traveling direction of an optical signal between two optical waveguides 12-1 and 12-2 crossed, (On) and off (off) states. As shown in FIG. 2A, when the crossing switch element 11 is turned on while the optical signal proceeds from the input through the first optical waveguide 12-1 in the straight through direction , The optical signal traveling through the first optical waveguide 12-1 is curved by the second optical waveguide 12-2 and proceeds in the drop direction. 2 (b), when the optical signal travels from the input through the first optical waveguide 12-1 in the straight through direction, the crossed switch element 11 is turned off The optical signal continues to travel in the straight-ahead direction.

2 (c) and 2 (d), a parallel switch element 11 for switching the traveling direction of an optical signal between two parallel optical waveguides 12-3 and 12-4 (On) and off (off) states. As shown in FIG. 2 (c), when the parallel switch element 11 is turned on while the optical signal is traveling from the input through the first optical waveguide 12-3 in the straight through direction , The optical signal traveling through the first optical waveguide 12-3 is curved by the second optical waveguide 12-4 and proceeds in the drop direction. That is, since the two waveguides 12-1 and 12-2 are in an intersecting state in FIG. 2 (a), as the crossing switch element 11 is turned on, the optical signal is transmitted through the first optical waveguide 12- 1 to the second optical waveguide 12-2 in the lower vertical direction. In contrast, in FIG. 2C, since the two optical waveguides 12-3 and 12-4 are parallel to each other, as the parallel switch element 11 is turned on, the optical signal is transmitted through the first optical waveguide 12-1 And is switched to the second optical waveguide 12-4. That is, the parallel switch element 11 is switched so as to return toward the direction in which the optical signal is input. 2 (d), when the optical signal travels from the input through the first optical waveguide 12-3 in the straight through direction, the parallel switch element 11 is turned off The optical signal continues to travel in the straight-ahead direction.

2, when the optical switch 11 is turned on, a leakage optical signal is transmitted in the direction in which the signal passes (that is, in a straight line), and the crosstalk Noise may be generated. That is, a certain amount of signal loss occurs every signal turn by the optical switch 11, and the signal loss amount can also be accumulated as the number of times of switching the direction of the signal by the optical switch 11 is increased.

Switching of optical signals between ports in an optical router can be through 'direct connection' with no insertion loss or 'optical switch' with a certain amount of insertion loss. In this case, although the direct connection has a smaller insertion loss than switching through the optical switch, only a pair of input / output ports can be directly connected among the port-port connection pairs within one optical router. Therefore, since the remaining switching functions other than the directly connected port-port connection pair are implemented by the optical switch, the number and arrangement of the switching elements must be optimized.

On the other hand, in addition to the signal loss due to the switching action of the optical switch 11 as described above, additional signal loss may occur when the optical waveguides cross each other as shown in FIG. Although the signal loss due to the intersection between these optical waveguides is smaller than the signal loss due to the switching action of the optical switch, the intersection of the optical waveguide occurs frequently in the optical network on chip of a large scale scale, have.

Thus, the optical router design apparatus 100 according to an embodiment of the present invention can be configured to minimize the crossing of the optical switches and the insertion of such optical switches, so that the elements (i.e., optical switches, optical waveguides, Optical terminator).

Specifically, as shown in FIG. 1, the optical router design apparatus 100 according to an embodiment of the present invention includes a router connection characterization unit 110 and a router element layout modeling unit 120.

The router connection characterization unit 110 is configured to determine, based on the predetermined topology for the optical network-on-chip, the kind of the predetermined use routing algorithm, and the preset traffic pattern, the optical switch, the optical waveguide, Lt; / RTI > in the form of a switching graph.

For reference, a topology is a condition that determines the number of ports, a routing algorithm is a condition that allows to identify the required switching, and a traffic pattern is a condition that allows calculation of the switching activity between input / output port pairs. Accordingly, the optical router design apparatus 100 according to an exemplary embodiment of the present invention may be configured to determine how to connect a plurality of port pairs in an optical router either through a direct connection or an optical switch, The number of optical switches and optical waveguides depending on whether to implement the optical switch with the optical switch can be determined to determine the layout of elements in the optical router.

Specifically, the router connection characterization section 110 characterizes the relationship between the optical switches, optical waveguides, and optical terminators of the optical router to the switching graph G = (V, E). At this time, one port in the optical router is always connected to one of the other ports or is terminated, and the connections between the respective devices (i.e., optical switch, optical waveguide and optical terminator) are each cost.

The minimum cost flow problem formulated by the router connection characterization unit 110 using the switching graph G = (V, E) can be expressed by the following equation (1).

&Quot; (1) "

Where d is the amount of data to send, s, t ∈ V , s is the source and t is the sink. And, when u, v ∈ V ( u, v ) is the edge from vertex u to v, ( u, v ) ∈ E. In addition, a (u, v) denotes the cost of the edge (u, v), f (u, v) is the amount of data flow through the edge (u, v), c (u, v) is an edge (u , v ).

On the other hand, when the optical router port (port) v ∈ V, the input port is v _{in, i,} and the output port v _{out, i,} and an optical terminator v _{term _} and _in and v _{term _ out,} the source is v _s And the sink is v _t .

In addition, the edge e = _k (v, u) as ∈ E, v, u ∈ V days when (v, u) represents the edge goes from vertex u to v. These edges ( v, u ) can be classified into the following four types. The first type is edge to the input port from the source edge from (v _s, v _{in, i)} or a source to an optical terminator (v _s, v _{term _ in),} and the second type to the output port from the input port, edge (v _{in, i,} v _{out, j),} and the third type of edge from the output port to the sink (v _{out, j,} v _t) or edge from the optical terminator to the sink (v _{term _ out,} v _t )to be. In addition, the four edges (v _{in, i,} v _{term _ out)} or edge _{(_} v _{term in,} v _{out, j)} of the output port to the light from the terminator to the light from the terminator second type is an input port.

Each of these edges has a capacity and a cost. The capacity of the edge is used to guarantee a single right of direct port-to-port connection, and the cost is used to indicate the switching activity corresponding to the routing path.

Specifically, the edge capacity in the least cost flow problem means the upper limit of the maximum flow of each edge. For example, to ensure the unity of the direct connection _, the capacity connected to the input port ( v _{in , i} ) or the output port ( v _{out , j} ) is set to one. For reference, the edges associated with the optical terminator _{(term _} v _in), or (v _{term _ out)} is a means that all input / output ports are terminated. Thus, in one embodiment of the present invention, the edge capacity of the least cost flow problem is determined as in the following equation (2).

&Quot; (2) "

In Equation (2), n is the number of output ports and m is the number of input ports.

On the other hand, in the minimum cost flow problem, the edge cost is the lower edge cost if the switching frequency is higher from the input port to the output port, and the cost of the edge existing between the port and the optical terminator is Is lower than the cost.

First, because direct connections are the best choice to avoid insertion loss, they allocate direct connections between pairs of ports with the highest switching activity (ie, frequency). The cost for such a switching activity can be calculated by the following equation (3).

&Quot; (3) "

In Equation (3), T _c is a set of communication traffic in the optical network-on-chip, ρ _i is an input port, and ρ _j is an output port. CS ( ρ _i , ρ _j , t ) represents the switching activity from port ρ _i to ρ _j according to the routing algorithm for the predetermined topology and communication traffic t. Also, D _t is the relative data rate of the communication traffic t.

Next, in order to remove the open-end waveguide, the edge cost is determined according to the following equation (4).

&Quot; (4) "

In Equation (4) ,? A minus value of positive (+) is used to reduce the redundant connection to minimize waveguide crossing.

The edges associated with v _s and v _t are dummies used to ensure unity of direct connections or to tailor the least cost flow problem. Thus, less effective as the flow a (v _{in, i,} v _{out, j),} a (v _{in, i,} v _{term _ out)} and a _{(term _} v _in, v _{out, j).}

Accordingly, the router connection characterization unit 110 detects an effective solution to the above-described formalized least-cost-flow problem.

Specifically, the router connection characterization unit 110 determines one of the following cases as a meaningful solution.

In the first case, the direct connection from the input port ρ _i to the output port ρ _j is chosen to be the highest switching activity when a ( v _{in, i} , v _{out , j} ) = 1. In the second case, the optical switch is _{a (v in, i ',} v out, j') = 0 and _{c (v in, i ',} v out, j') ≠ 0 in port when ρ _{i 'and} the output port rho _{j '} . In the third case, the input port ρ _{i "} Or exit port ρ _{j ''} is a (v _{in, i 'is} connected to _a', v _{term _ out)} or _{a (v term _ in, v} out, j '') optical terminator when any one of the 1st.

The router connection characterization unit 110 generates information on the relationship between elements (optical switches, optical waveguides, and optical terminators) in the optical routers according to the solution as router connectivity information, and transmits the information to the router element layout modeling unit 120 .

For example, FIG. 4 illustrates an example of a switching graph according to an embodiment of the present invention.

FIG. 4 shows an example of a network flow model for creating a router structure. Specifically, FIG. 4 shows a switching graph for an 8x8 mesh topology optical network on chip of an XY routing algorithm with twelve optical switches (e.g., MR) and two optical routers.

In the switching graph shown in FIG. 4, the ports are connected directly to each other in the west-east, east-west, south-north, and north- The injection port and the ejection port are terminated and the rest of the switching functions are implemented by the optical switch.

Returning to Fig. 1, the router element placement modeling unit 120 processes the optical switch arrangement and the optical waveguide routing setting to minimize the number of optical waveguides crossing in the optical router.

The router element placement modeling unit 120 classifies the arrangement of the optical switches based on the router connectivity information determined through the router connection characterization unit 110 and the arrangement of the optical waveguide, Decides whether to route.

Specifically, in the optical waveguide routing, as the optical signal is transmitted through the various optical switches or terminated at the optical terminator, the physical configuration between the optical waveguide pairs becomes complicated, thereby causing the optical waveguide crossing problem. In order to solve this optical waveguide crossing problem, the router element placement modeling unit 120 uses a hierarchical tree-based integer linear programming (ILP) method to set the structure of the optical waveguide, Model the insertion loss minimization problem. The router element placement modeling unit 120 generates the tree graph as shown in FIG. 5 and stores each node 51, 52, 53, and 54 of the space tree in the tree graph as a plurality Tiles < RTI ID = 0.0 > T < / RTI &

5 is a diagram illustrating an example of a tree graph for finding an optimal layout of optical router elements according to an embodiment of the present invention. 5A, when partitioning each tree node into a plurality of tiles spatially, a plurality of actual partition tiles can be obtained as shown in FIG. 5B. have.

The router element placement modeling unit 120 calculates the number of optical waveguide crossings based on the incoming and outgoing positions of the waveguides for each partition tile of each tree node.

이라 정의하고, 광 도파관의 집합인 W를

이라 정의한다. 여기서, n_m과 n_w는 각각 배치되는 광 스위치 및 광 도파관의 수를 나타낸다. 또한, 각각의 광 스위치(m_i∈M)에 관련된 통과(through) 도파관 및 드롭(drop) 도파관은 각각 through(m_i) 및 drop(m_i)로 정의한다.At this time, in each tree node, a set M of optical switches

, And W, which is a set of optical waveguides

. Here, n _m and n _w represent the number of optical switches and optical waveguides arranged, respectively. In addition, the passage associated with each of the optical switches (m _i ∈M) (through) the wave guide and drop (drop) the waveguide is defined as a through (m _i) and drop (m _i), respectively.

In the ILP formulation according to an embodiment of the present invention, a plurality of variables are defined as follows.

로 정의된다.First, MR _{i , j} is a binary variable indicating whether the optical switch MR _mi is located in the partition tile t _j . MR _{i , j} = 1 if MR _mi is placed in T _i , and MR _{i, j} = 0 otherwise. At this time,

.

And WI _{i , j, k} are binary variables indicating whether the incoming position of the optical waveguide w _i in the partition tile t _j is located at the position p _k . If the reception position of optical waveguide w _i is placed at position p _k , WI _{i , j, k} = 1 is set. Otherwise, WI _{i , j, k} = 0 is set.

의 요소로서, P는 하나의 파티션 타일에서 경계 위치들(boundary position)의 집합(set)이다.Also, WO _{i , j, k} is a binary variable indicating whether the outgoing position of the optical waveguide w _i at the partition tile t _j is located at the position p _k . If the originating position of the optical waveguide w _i is located at position p _k , WO _{i , j, k} = 1 is set; otherwise, WO _{i , j, k} = 0 is set. At this time, the position p _k

, Where P is a set of boundary positions in one partition tile.

For example, FIG. 6 illustrates input and output positions of an optical waveguide in a partition tile according to an embodiment of the present invention.

FIG. 6 shows the position values of the input and output waveguides in the ILP sizing when the number of arranged waveguides is three at maximum. At this time, the position of each position p is sequentially mapped to one of the elements of P clockwise starting from the leftmost position. For reference, the number of positions on each side of the partition tile corresponds to the maximum number of disposed waveguides.

As described above, in a state where the ILP setting parameter is defined according to the embodiment of the present invention, the router element placement modeling unit 120 calculates the waveguide crossing value.

At this time, since the configuration between the waveguide pairs can be represented by the following three cases, the waveguide intersection can be predicted by identifying the reception / transmission position of one waveguide pair in the partition tile.

The configuration between the waveguide pairs is such that the waveguide pair travels in the opposite direction without crossing if the first pair of waveguides need not be parallel, the second waveguide pair travels in the same direction without crossing if it is not necessary to be parallel, And the two waveguides intersect as needed to be vertical.

For example, FIG. 7 illustrates a relationship between two pairs of optical waveguides in a partition tile according to an embodiment of the present invention.

(C) and (d) show the case where two waveguides are in the same direction without crossing each other, and (e) and (d) f) shows the crossing of two waveguides.

At this time, the router element modeling unit 120 divides the case of the configuration between each pair of waveguides through crossing check functions defined as follows.

The first cross check function O (w _i , w _j , t _k ), O '(w _i , w _j , t _k ) is a binary value function that identifies whether the waveguides w _i and w _j are routed in the opposite direction without crossing . If two wave guide when the arrangement as shown in (a) of Fig. _{7 O (w i, w j} , t k) = when the arrangement as shown is set to 1, as shown in Fig. 7 (b) O '(w i, w j, set to t _k) = 1, and otherwise it is set to _{O (w i, w j,} t k) = O '(w i, w j, t k) = 0.

The second cross check function S (w _i , w _j , t _k ), S '(w _i , w _j , t _k ) is a binary value function that identifies whether the waveguides w _i and w _j are routed in the same direction without crossing . If both when the waveguides are arranged as shown in (c) of Figure _{7 S (w i, w j} , t k) = when the arrangement as shown is set to 1, (d) in FIG. _{7 S '(w i, w} j, set to t _k) = 1 and otherwise is set to _{S (w i, w j,} t k) = S '(w i, w j, t k) = 0.

The third cross check function C (w _i , w _j , t _k ), C '(w _i , w _j , t _k ) is a binary value function that identifies whether the waveguides w _i and w _j intersect. If two wave guide when the when arranged as shown in (e) of Fig. _{7 C (w i, w j} , t k) = is set to 1, the arrangement as shown in (f) of Fig. 7 C '(w _i, w _j, set to t _k) = 1 and otherwise is set to _{C (w i, w j,} t k) = C '(w i, w j, t k) = 0.

At this time, according to the clockwise ordering rule of the reception / transmission waveguide position, only one of the cross check functions is activated.

The router element placement modeling unit 120 calculates the objective function (i.e., the intersection cost minimization function) defined as Equation (5) to calculate a waveguide crossing value that minimizes the waveguide intersection.

&Quot; (5) "

At this time, since each optical switch must be placed in one of the partition tiles of the tree node, the following conditions are satisfied.

&Quot; (6) "

Since the optical waveguide in one partition tile is not disconnected, each partition tile t _j ∈ T, and when each optical waveguide w _i ∈ W, the condition of Equation (7) is satisfied.

&Quot; (7) "

On the other hand, between partition tiles, when the input port ρ _i is connected to the output port ρ _{i '} , the waveguide w _i must be connected to w _i or w _i' . The optical waveguides w _i and w _{i '} The connection between the optical routers must be unique in each optical router. Further, if the port p _i is connected to one optical terminator, the optical waveguide w _i must be terminated or connected to the optical waveguide w _i .

Under these conditions, the pairs of incoming / outgoing positions through adjacent optical waveguides in two adjacent partition tiles must be geometrically aligned.

The first equation of Equation (8) represents a connection constraint between the waveguides w _i and w _{i '} when the tiles t _j and t _{j '} are adjacent to each other. And in the second and third equations in equation (8), optical waveguide w _i adjacent to the input port of the optical router and optical waveguide w _{i '} adjacent to the output port are respectively connected to the optical terminator.

&Quot; (8) "

In the above, l is an integer between 0 and n _w -1.

In addition, the tile t _j and t _{j 'in} accordance with the positional relationship between d and d' are to be defined as shown in Equation (9).

&Quot; (9) "

That is, if t _j is located at the bottom of t _{j '} , d = 0 and d' = 3n _w , and if t _j is located at the left of t _{j '} , then d = n _w And d '= a 4n _w, t _j is t _j' when located at the upper side of the d = 2n _w and d if located to the right of "a = 2n _w, t _j is t _{j 'd} = 3n _w and d' = n _w .

The optical switch may be placed in a partition tile in which both the pass waveguide and the drop waveguide are disposed. If the optical switch m _i is placed in the partition tile t _j , the pass / drop waveguides associated with m _i must pass through the partition tile t _j for switching. Since one of the crossing switch element and the parallel switch element must be used, it can be expressed by the following equation (10).

&Quot; (10) "

At this time, each optical switch m _i ∈ M , and each partition tile t _j ∈ T.

The waveguides connected to the external input and output ports may not be limited as described above and are handled differently. That is, it has the same constraint as in Equation (11).

Equation (11)

Here, d _i indicating the position of the port ρ _i is defined by the following equation (12).

&Quot; (12) "

That is, if the port ρ _i located above, d _i = 0, and the port ρ _i is when located on the right side, and d _i = 1, port ρ _i is when located at the lower side, and d _i = 2, port ρ _i is left , D _i = 3.

On the other hand, the additional crossing by the optical switch is influenced by the arrangement of the optical switches. Therefore, the objective function (i. E., The cross cost minimization function) for calculating the waveguide crossing value that minimizes the waveguide crossing described above should take into account the physical configuration of the waveguide and the additional crossing caused by the presence and placement of the optical switch.

For example, FIG. 8 is a view for explaining an additional intersection by an optical switch in a partition tile according to an embodiment of the present invention.

와

가 도파관 w_j에 의해 차단되었을 경우 발생한다. 이때, A(m_i,w_j,t_k)는 도파관

가 w_j가 아니고,

가 w_j가 아닐 때, 상기 첫 번째 경우를 나타내는 함수이다. 추가적인 교차가 발생된 경우 A(m_i,w_j,t_k)=1이고, 다른 경우 A(m_i,w_j,t_k)=0 이다.First, in the case of a parallel switch element blocked by a waveguide, as shown in FIG. 8 (a)

Wow

Lt; RTI ID = 0.0 > _wj . ≪ / RTI > At this time, A (m _i , w _j , t _k )

Is not w _j ,

Is not a w _j , it is a function representing the first case. A (m _i , w _j , t _k ) = 1, and A (m _i , w _j , t _k ) = 0 otherwise.

,

,

및

이 배치되었을 때,

및

사이에 w_j 및 w_j'가 배치되면 추가적인 교차가 발생된다. 이때, A'(m _i ,m _i' ,w _j ,w _j' ,t _k )는 하기 수학식 13의 조건들을 만족시킬 때 상기 두 번째 경우를 나타내는 함수이다.Secondly, in the case of two parallel switch elements that are blocked by crossed waveguides and have a shared waveguide, this occurs as in FIG. 8 (b). That is, the waveguide associated with the optical switches m _i and m _{i '}

,

,

And

When deployed,

And

Additional intersections occur when w _j and w _{j '} are disposed. In this case, A '( m _i , m _i' , w _j , w _{j '} , t _k ) is a function indicating the second case when the condition of the following equation (13) is satisfied.

&Quot; (13) "

At this time, when an additional cross-generation _{A '(m i, m i} ', w j, w j ', t k) = 1 , and that other than A' (m _i, m _{i ',} w _j, w _j', t _k ) = 0.

,

,

및

가 도 8(c)와 같이 배치되면 광 스위치들은 서로에 의해 차단되며 추가적인 교차가 발생된다. 이때, A''(m _i ,m _{i '} ,t _j )는 하기 수학식 14와 같은 조건을 만족시킬 때 상기 세 번째 경우를 나타내는 함수이다.Thirdly, in the case of a parallel switching element blocked by another parallel switching element, it occurs in the case as in Fig. 8 (c). That is,

,

,

And

8 (c), the optical switches are blocked by each other and additional crossing occurs. At this time, A '' ( m _i , m _{i '} , t _j ) is a function representing the third case when the following condition is satisfied.

&Quot; (14) "

At this time, when an additional intersection occurs, A '' ( m _i , m _{i '} , t _j ) = 1 and A'' ( m _i , m _i' , t _j )

As described above, the objective function for evaluating the additional crossing cost is modified as shown in the following equation (15).

&Quot; (15) "

,

및

은 앞서 설명한 세 가지 경우(case)에 따른 광 스위치들에 의해 야기된 추가적인 교차 비용을 의미한다.Here, WC _k denotes a crossing cost according to the configuration of the waveguide pair,

,

And

Means the additional crossing cost caused by the optical switches according to the three cases described above.

Each intersection cost shown in Equation (15) is calculated by the following Equation (16).

&Quot; (16) "

According to the result of calculating the waveguide crossing cost by the waveguide and the optical switch, the router element placement modeling unit 120 arranges the optical switch, the optical waveguide and the optical terminator in the tile of each tree node.

The number of partition tiles affects the ILP complexity of the current node and its child nodes in addition to the depth of the tree. That is, as the number of partition tiles increases, ILP complexity at the current node increases, and the depth of the tree increases as the number of partition tiles decreases. In addition, the partitioning of a tree node must be performed in both the vertical and horizontal directions to obtain a leaf node.

For example, the router element placement modeling unit 120 divides each node of the tree into a plurality of tiles as shown in FIG.

9 is a diagram for explaining a process of dividing each node into a plurality of tiles according to an embodiment of the present invention.

In FIG. 9, each node is divided into four tiles in order to generate a 4-way tree. 9 (a) shows a root node, and FIG. 9 (b) shows a child node.

First, the router element placement modeling unit 120 solves the problem of ILP complexity at the root node by dividing tiles by predefining the positions of ports and optical switches.

At this time, the router element modeling unit 120 determines the position of the input / output port of the waveguide. If the input port is located on the left side of 'tile 1' in FIG. 9A, It is determined to be located on the right side. The opposite is true for the reference.

The router element placement modeling unit 120 places the optical switch in the same tile as the input port of the passing waveguide and the output port of the drop waveguide. If there is no tile that meets these conditions, place the optical switch on an adjacent tile with the input port of the pass waveguide. In this way, the optical switch can be arranged in advance using the non-blocking characteristic of the waveguide, thereby reducing the ILP complexity at the root node.

Meanwhile, the router element placement modeling unit 120 solves the ILP complexity problem in the remaining nodes other than the root node through the following process.

Specifically, the router element placement modeling unit 120 can divide the child node into a mesh tile partition structure as shown in FIG. 9 (b). FIG. 9 (b) shows an example in which the mesh is divided into a 2 × 2 mesh tile structure.

On the other hand, the router element placement modeling unit 120 proceeds this partitioning until it reaches a leaf node that can be constructed with a preset basic cell.

10 is a diagram illustrating a configuration of a basic cell constituting a leaf node according to an embodiment of the present invention.

As shown in FIG. 10, the basic cell may be set to a unit structure in which at least one of the optical waveguide and the optical switch included in one tile is disposed. At this time, as shown in FIG. 10, the basic cells are composed of a plurality of kinds so as to respectively represent different device arrangements or different routing structures.

The router element placement modeling unit 120 may represent the elements of the optical router divided up to leaf nodes using a basic cell to generate a full layout of one optical router.

In addition, the router element placement modeling unit 120 combines layouts generated according to procedures as described above for all optical routers included in the optical network-on-chip to generate and provide an overall layout of the optical network- It is also possible.

Hereinafter, a method of designing an optical router according to an embodiment of the present invention will be described in detail with reference to FIG.

11 is a flowchart illustrating a method of designing an optical router according to an embodiment of the present invention.

First, topology structure information of the optical network-on-chip, routing algorithm information set for use, and traffic pattern information are obtained (S110).

Then, based on the information obtained in the previous step, the routing connection relationship between the plurality of types of devices constituting the optical router is characterized in the form of a switching graph (S120).

Then, the optical waveguide connectivity and optical switch information (i.e., router connectivity information) calculated through the characterization are generated (S130).

Next, the arrangement and routing for minimizing the insertion loss are determined based on the optical waveguide connectivity and the optical switch information (S140).

The physical layout of the optical router is then generated and provided based on the placement and routing of the determined optical router elements (S150).

The processes of the steps S110 to S150 are the same as those of the router connection characterization unit 110 and the router element layout modeling unit 120 of the optical router design apparatus 100 described with reference to FIGS. Lt; RTI ID = 0.0 > and / or < / RTI >

One embodiment of the present invention may also be embodied in the form of a recording medium including instructions executable by a computer, such as program modules, being executed by a computer. Computer readable media can be any available media that can be accessed by a computer and includes both volatile and nonvolatile media, removable and non-removable media. In addition, the computer-readable medium may include both computer storage media and communication media. Computer storage media includes both volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data. Communication media typically includes any information delivery media, including computer readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave, or other transport mechanism.

It will be understood by those skilled in the art that the foregoing description of the present invention is for illustrative purposes only and that those of ordinary skill in the art can readily understand that various changes and modifications may be made without departing from the spirit or essential characteristics of the present invention. will be. It is therefore to be understood that the above-described embodiments are illustrative in all aspects and not restrictive. For example, each component described as a single entity may be distributed and implemented, and components described as being distributed may also be implemented in a combined form.

The scope of the present invention is defined by the appended claims rather than the detailed description and all changes or modifications derived from the meaning and scope of the claims and their equivalents are to be construed as being included within the scope of the present invention do.

100: Optical router design device
110: router connection characterization unit
120: Router element placement modeling unit

Claims (12)

1. An optical router design apparatus for an optical network-on-chip (ONoC) including a plurality of optical routers,
A characteristic graph according to a connection relationship between an optical switch, an optical waveguide, and an optical terminator of an optical router is generated based on a topology of the optical network-on-chip, a routing algorithm and a traffic pattern, and a cost of each edge And a router connection characterization unit for detecting a solution of a minimum cost flow problem according to a data flow through the edge and generating router connectivity information for the optical switch, optical waveguide, and optical terminator according to the minimization, ; And
Generating a tree graph according to an integer linear programming (ILP) technique based on the router connectivity information, dividing each tree node into a plurality of tiles in the tree graph, Detecting a solution that minimizes an intersection cost according to the configuration of the optical waveguide of each of the tree nodes and an additional intersection cost due to the arrangement of the optical switches through the optical switch, the optical waveguide and the optical terminator, And a router element placement modeling unit for generating a physical layout by arranging the router element placement modeling unit. The method according to claim 1,
The router connection characterization unit,
Determines the number of ports of the optical router based on the topology,
Identify the required switching based on the routing algorithm,
And calculates switching activity between the input and output port pairs based on the traffic pattern. The method according to claim 1,
Wherein the characterization graph is a switching graph. The method according to claim 1,
The router element placement modeling unit,
An optical router designing apparatus for generating a physical layout according to a solution of the intersection cost minimizing function by using a predetermined plurality of basic cells representing at least one of an optical switch and an optical waveguide included in one tile and a different routing structure . The method according to claim 1,
The router element placement modeling unit,
An optical router design that identifies the type of configuration between optical waveguide pairs through a predetermined cross check function and calculates a crossing cost according to the configuration of the optical waveguide of each tree node based on a predetermined crossing value for each type of the configuration Device. The method according to claim 1,
The router element placement modeling unit,
Calculating a crossing number of the optical waveguide based on the reception and the outgoing position of the optical waveguide,
Wherein the positional relationship of each tile is defined by geometrically aligning the reception and transmission positions through the optical waveguide in adjacent tiles among the tiles. An optical router design method using an optical network-on-chip (ONoC) optical router design apparatus,
Generating a characteristic graph according to a connection relationship between an optical switch, an optical waveguide, and an optical terminator of an optical router based on a topology of the optical network-on-chip, a routing algorithm, and a traffic pattern;
Detecting a solution of a minimum cost flow problem according to the cost of each edge in the characterization graph and the data flow through the edge;
Generating router connectivity information for the optical switch, optical waveguide, and optical terminator according to the minimization solution;
Generating a tree graph according to an integer linear programming (ILP) scheme based on the router connectivity information;
Detecting a solution that minimizes an intersection cost according to the configuration of the optical waveguide of each tree node in the tree graph and an additional intersection cost due to the optical switch arrangement through a predetermined intersection cost minimizing function; And
Dividing each tree node into a plurality of tiles, and arranging optical switches, optical waveguides, and optical terminators for each of the tiles based on the minimizing solution to generate a physical layout. 8. The method of claim 7,
Determines the number of ports of the optical router based on the topology,
Identify the required switching based on the routing algorithm,
And calculating switching activity between the input and output port pairs based on the traffic pattern. 8. The method of claim 7,
Wherein the characterization graph is a switching graph. 8. The method of claim 7,
Wherein the step of generating the physical layout comprises:
An optical router design method for generating a physical layout according to a solution of the intersection cost minimization function using a plurality of basic cells which are predetermined and which represent different arrangements of optical switches and optical waveguides included in one tile and different routing structures . 8. The method of claim 7,
Wherein the detecting the minimizing solution comprises:
An optical router design that identifies the type of configuration between optical waveguide pairs through a predetermined cross check function and calculates a crossing cost according to the configuration of the optical waveguide of each tree node based on a predetermined crossing value for each type of the configuration Way. 8. The method of claim 7,
Calculating a crossing number of the optical waveguide based on the reception and the outgoing position of the optical waveguide,
A method of designing an optical router that defines a positional relationship between tiles by geometrically aligning reception and transmission positions through optical waveguides in adjacent tiles among the tiles.

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