KR101502370B1 - Liquid crystal display - Google Patents

Abstract

The present invention relates to a liquid crystal display device capable of reducing power consumption by reducing the number of transitions by applying a compensation value to current data according to a data inversion signal and data before and after the data inversion.

A liquid crystal display device according to the present invention includes: a liquid crystal panel having sub-pixels for each region defined by intersecting a plurality of gate lines and a plurality of data lines; A data driver for supplying a data voltage to the data lines; A gate driver for supplying a scan signal to the gate lines; A plurality of compensation values predetermined for the N-th data are applied according to the data inversion signal, and the number of transitions between the N-th data to which the plurality of compensation values are applied and the N-1-th data is compared, Values of the Nth data and the (N + 1) th data to which the respective values are applied, selects one compensation value among the plurality of compensation values according to the number of the compared transitions, N-th data is converted and output to the data driver.

According to the present invention, the present invention minimizes the number of transitions by converting the current data within a predetermined range according to the number of transitions in which the data inversion data of the previous data and the current data are compared with the data inversion data of the current data, Power consumption can be reduced.

Data inversion signal, transition, TDDI

Description

[0001] LIQUID CRYSTAL DISPLAY [0002]

The present invention relates to a liquid crystal display, and more particularly, to a liquid crystal display capable of reducing power consumption by applying a compensation value to current data according to a data inversion signal and data before and after the data, thereby reducing the number of transitions.

The development of electronic communication technology has made it possible to drive electronic devices with small energy, high speed and wide bandwidth as well as with minute energy. However, the high integration of such chips causes a malfunction of the system due to sensitivity to minute electromagnetic disturbances caused by natural phenomena.

As such electronic devices have become widespread in various fields of society, the density of electromagnetic waves has increased. This has caused many problems such as deterioration of the electromagnetic wave environment and adverse effects on the human body, which are usually caused by Electro-Magnetic Interference (EMI) .

Accordingly, in recent years, measures for solving the electromagnetic disturbance problem have been progressing actively in various fields, and the LCD field is no exception, and various measures are proposed to solve the problem.

For reference, electromagnetic interference (EMI) occurs in an electronic device that uses a high frequency signal because electric field and magnetic field are mixed around the wire when a high frequency current flows in any wire, which is propagated into the air.

In the case of LCD, as the resolution increases, the operating frequency increases and the EMI emission increases. Considering this, it should be considered when designing the LCD driving circuit.

One is to reduce the electromagnetic interference by using an EMI filter. This is to reduce the electromagnetic interference by inserting an EMI reduction filter suitable for the frequency of use into a conductor such as a clock. The other is to minimize the EMI emissions by optimizing the grounding process using a multilayer PCB to design the PCB. Another is the frequency reduction method, which is based on the fact that the EMI emission is proportional to the frequency of use, so as to reduce the frequency of the clock or data through the divided driving method when driving the driver.

The other is the LVDS interface method. LVDS (Low Voltage Differential Signaling) is a recently developed advanced interface technology that compresses and transmits signals using the coding techniques used in communications, thereby dramatically reducing the number of signal lines and lowering the voltage level of digital signals to less than 1 V Thereby suppressing EMI emission.

In this way, various measures are being sought to reduce EMI in the LCD field, and the most representative method among them is a method of reducing EMI generated from the data transfer signal between the timing controller and the driver IC .

In particular, since the EMI component increases as the number of data inversions increases, EMI decreases as the number of data inversions decreases. In this case, the inversion of the data means the inversion of the digital data to 0011 and 1100.

On the other hand, a TDDI (Transition Dependent Data Inversion) driving method is a kind of LCD driving method which is generally used to reduce EMI. When the number of transitions (0011 or 1100) (That is, 0 is set to 1 and 1 is set to 0), and REV, which is a signal indicating that the data is inverted, is set to 1 to indicate that the data is inverted.

Since notebook PCs and application products are highly portable, it is very important to reduce the power consumption of each component of the product.

In the backlight part, since the power consumption reduction technique is developed, a part of the logic power of the circuit part becomes large, and the necessity of the power consumption reduction technique of this part is emphasized.

The present invention proposes an algorithm that reduces the transition through input data and maintains the image quality as much as possible and reduces power consumption.

The existing TDDI (Transition Dependent Data Inversion) scheme is a basic concept to minimize power consumption and reduce data conversion to reduce EMI.

In the conventional TDDI method, the input A and B data are compared. If the number of A is larger than B, REV = "H ", and the data is inverted. Conversely, if A is less than B, REV = Non-inverted. When the 8-bit data is input, the previous data is compared with the current data. When the REV signal becomes High, the data driver inverts the input data. When the REV signal is Low, the input data is output as it is.

However, in the conventional TDDI scheme, the TDDI scheme is applied in order to compare the previous data with the current data through a comparator and to convert the data to more than half. There is a limit to apply the algorithm because a precondition that always should be more than half is entered, and a new approach is needed.

According to an aspect of the present invention, there is provided a liquid crystal display device capable of reducing power consumption by applying a compensation value to current data according to a data inversion signal and a before and after data, thereby reducing the number of transitions.

A liquid crystal display device according to the present invention includes: a liquid crystal panel having sub pixels in each of a plurality of regions defined by intersecting a plurality of gate lines and a plurality of data lines; A data driver for supplying a data voltage to the data lines; A gate driver for supplying a scan signal to the gate lines; A plurality of compensation values predetermined for the N-th data are applied according to the data inversion signal, and the number of transitions between the N-th data to which the plurality of compensation values are applied and the N-1-th data is compared, Values of the Nth data and the (N + 1) th data to which the respective values are applied, selects one compensation value among the plurality of compensation values according to the number of the compared transitions, N-th data is converted and output to the data driver.

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The data processing unit includes: a data arranging unit for aligning signals of image data from outside in accordance with driving of the liquid crystal panel; A memory unit for storing the input image data; An REV signal generator for outputting the data inversion signal according to whether the number of transitions of N-1th data and Nth data stored in the memory unit exceeds a reference value; A data comparator for comparing the number of transitions after applying the compensation value to the Nth data from the (N-1) th data to the (N + 1) th data according to the data inversion signal and outputting the compensation value; A data converter for converting the Nth data by applying the compensation value to the Nth data; And the data transfer unit for transferring the converted N-th data to the data driver.

And the reference value of the REV signal generator is half the total number of bits of the data.

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If the data inversion signal exceeds the reference value, the data comparator compares the N-th data to which the compensation value is applied and the (N-1) -th data, And outputs a value having the smallest number of transitions as the compensation value.

The liquid crystal display according to the present invention is different from the conventional method of outputting the data inversion signal by comparing the number of transitions of the previous data with the current data and comparing the data inversion signal of the previous data and the current data with the data before and after the current data The power consumption of the liquid crystal display device can be reduced by converting the current data within a predetermined range according to the number of transitions to minimize the number of transitions.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings and embodiments.

1 is a view illustrating a liquid crystal display device according to an embodiment of the present invention.

1, a liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel (not shown) having sub-pixels for each region defined by intersecting a plurality of gate lines GL1 to GLn and a plurality of data lines DL1 to DLm A data driver 108 for supplying a data voltage to the data lines DL1 to DLm; a gate driver 106 for supplying a scan signal to the gate lines GL1 to GLn; Controls the drivers 106 and 108 and compares the number of transitions of the (N-1) th data to the (N + 1) th data according to the data inversion signal REV to convert and output the Nth data according to the compensation value And a timing controller 104.

The liquid crystal panel 102 is composed of a lower substrate and an upper substrate, which display each frame for displaying an image at a first driving frequency and are attached to each other in a facing relationship. At this time, a spacer (not shown) and a liquid crystal layer (not shown) are provided between the lower substrate and the upper substrate to keep the gap therebetween constant.

The lower substrate includes a plurality of data lines DL1 to DLm and a plurality of gate lines GL1 to GLn formed to cross each other and a plurality of data lines DL and GL And a pixel electrode of a liquid crystal cell Clc connected to a thin film transistor (TFT) and a thin film transistor (TFT) formed thereon. At this time, the thin film transistor TFT supplies the image signal from the data line DL to the liquid crystal cell Clc in response to the gate pulse from the gate line GL.

The liquid crystal cell CLc is composed of the common electrode Vcom facing the liquid crystal layer and the pixel electrode connected to the thin film transistor TFT and can equivalently be expressed by a liquid crystal capacitor. The liquid crystal cell also includes a storage capacitor Cst for holding the image signal charged in the liquid crystal capacitor until the next image signal is charged.

The upper substrate includes at least three color filters including red, green, and blue, a black matrix defining a pixel cell along with a separation of each color filter, and a common electrode (Vcom) to which a common voltage is supplied. Here, the common electrode is formed on the upper glass substrate in a vertical electric field driving method such as TN (Twisted Nematic) mode and VA (Vertical Alignment) mode, and is formed by using IPS (In Plane Switching) mode, FFS (Fringe Field Switching) Is formed on the lower glass substrate together with the pixel electrode in the same horizontal electric field driving method. On the upper glass substrate and the lower glass substrate of the liquid crystal panel 102, a polarizing plate orthogonal to the optical axis is attached, and an alignment film for setting the pretilt angle of the liquid crystal on the inner surface in contact with the liquid crystal is formed.

The gate driver 108 sequentially generates scan pulses, that is, gate pulses in response to the gate drive control signals GOE, GSP, and GSC supplied from the timing controller 104, and supplies the scan pulses to the plurality of gate lines GL1 to GLn do. At this time, the power supply voltage Vdd is supplied to the gate driver 108 from the power supply unit. Accordingly, the gate driver 108 generates the gate high voltage VGH and the gate low voltage VGL using the power supply voltage Vdd.

The gate driver 108 includes a level shifter for converting the output signal of the shift register and the shift register into a swing width suitable for driving the thin film transistor (TFT) of the liquid crystal cell, and an output connected between the level shifter and the gate lines GL1 to GLn Buffer. The gate driver 108 sequentially outputs the scan pulses. At this time, the gate driver 108 is mounted on the COF or TCP and is connected to the gate pads formed on the lower substrate of the liquid crystal panel 102 with ACF (anisotropic conductive film).

Further, the gate driver 108 is connected to the plurality of data lines DL1 to DLm, the gate lines GL1 to GLn, and the thin film transistors (TFTs) formed in the pixel array simultaneously using the gate in panel process And may be formed directly on the lower glass substrate of the liquid crystal panel 102. In addition, the gate driver 108 may be directly bonded onto the lower glass substrate of the liquid crystal panel 102 in a Ghip On Galss manner.

The data driver 106 latches the corrected image data R ', G', B 'under the control of the timing controller 104. The data driver 106 converts the corrected image data R ', G', and B 'into an analog positive / negative gamma compensation voltage according to the polarity control signal POL to generate positive / negative analog data And supplies the data voltage to the plurality of data lines DL1 to DLm.

The timing controller 104 controls the gate driver and the data drivers 106 and 108 and compares the number of transitions of the (N-1) th data to (N + 1) th data according to the data inversion signal (REV) And outputs it. The timing controller 104 includes a control signal generator 114 for generating control signals to the gate driver and the data drivers 106 and 108 and a control signal generator 114 for counting the number of transitions of the (N-1) And a data processing unit 112 for comparing and outputting the data.

The control signal generator 114 generates a data control signal DCS and a gate control signal DCS using a main clock DCLK, a data enable signal DE and horizontal and vertical synchronization signals Hsync and Vsync, GCS) to control the driving timings of the data driver 106 and the gate driver 108, respectively. At this time, the data control signal DSC includes a source start pulse SSP, a source shift clock SSC, a source output enable SOE, and the gate control signal GCS includes a gate start pulse (Gate Start Pulse) GSP, a gate output enable signal GOE, and a plurality of gate shift clocks GSC.

Here, the gate start pulse (GSP) indicates a starting horizontal line from which a scan starts in one vertical period in which one screen is displayed. The gate shift clock signal GSC is a timing control signal for sequentially shifting the gate start pulse GSP inputted to the shift register in the gate drive circuit and is a pulse width corresponding to the ON period of the thin film transistor TFT . The gate output signal GOE indicates the output of the gate driver 108.

In addition, the timing control signals include data timing control signals including a source sampling clock (SSC), a source output enable signal (SOE), a polarity control signal (POL), and the like. The source sampling clock SSC indicates the latching operation of the data in the data driver 106 based on the rising or falling edge. A source output enable signal (SOE) indicates an output of the data driver 106. [ The polarity control signal POL indicates the polarity of the data voltage to be supplied to the liquid crystal cells Clc of the liquid crystal panel 102.

The data processing unit 112 arranges the source image data signals R, G, and B input from the driving system (not shown) in accordance with the two port transmission schemes, and supplies the sorted data signals to the data driver 108 do. For example, the timing controller 104 separates the source image data (R, G, B) into odd data signals (RO, GO, BO) and even data signals (RE, GE, BE) And supplies it to the data driver 108. The odd and even data signals RO, GO, BO, RE, GE, and BE are obtained when it is assumed that each of the source image data R, G, and B is composed of 6 bits of data to represent 64 gray. It can be seen that the two ports for transmitting in parallel are constituted by a total of 36 data transmission lines. In this way, the timing controller 104 employs two port transmission schemes to reduce the transmission frequency of the data signal, thereby reducing EMI.

The data processing unit 112 includes a data arranging unit 202 for aligning signals of external video data to be driven by the liquid crystal panel 102, a memory unit 204 for storing input image data, , The N-1th data of the image data stored in the memory unit 204 and the Nth data RO _{n -1} , GO _{n -1} , BO _{n -1} , RE _{n -1} , GE _{n -1} , BE _{n -1} ), (RO _n, and GO _n, BO _n, RE _n, GE _n, BEn) the number of transitions generated REV signal and outputting a data inversion signal (REV), depending on whether more than the reference value 206 of the data inversion (+? /?) Is applied to the Nth data from the N-1th data to the (N + 1) th data of the image data according to the signal REV and then the appropriate compensation value? A data converter 210 for applying the compensation value? To the N-th data and converting the N-th data to the data driver 108, And a data transmission unit 212 for transmitting the data to the mobile station.

The data sorting unit 202 arranges the source image data R, G, and B supplied from the driving system so as to be suitable for driving the liquid crystal panel 102, And the even data signals RO, GO, BO, RE, GE, and BE, and stores them in the memory unit 204.

The memory unit 204 is provided to store the data supplied from the data sorting unit 202. Here, the memory unit 204 may store data for processing the odd and even data signals RO, GO, BO, RE, GE, and BE of the source image data R, G, and B supplied from the data arranging unit 202 And supplies it to the comparator 208 and the REV signal generator 206.

REV signal generation unit 206 is the N-th data supplied from the memory unit (204), (RO _{n, n} GO, BO _{n, n} RE, GE _n, BEn) and N-1-th data, _{(n -1} RO, GO _{n -1} , BO _{n -1} , RE _{n -1} , GE _{n -1} , and BE _{n -1} ), and outputs the data inversion signal REV according to whether the data transition exceeds the reference value . At this time, the reference value may be set to be one-half of the total number of bits of data supplied from the memory unit 204.

The data comparator 208 compares the Nth data RO _n , GO _n , and RO _n in the data sequentially input, according to the data inversion signal REV supplied from the REV signal generator 206, _{BO n, RE n, GE n} , BEn) compensation value (+ α / -α) to apply the compensated N-th data (R'O _n, G'O the _{n, n} B'O, R'E _n, G'E _n, B'En) and n-1-th data and the (n + 1) -th data (RO _{n -1, n -1} GO, BO _{n -1,} RE _{n -1, n -1} GE, BE _{n - 1} ), (RO _{n +1} , GO _{n +1} , BO _{n +1} , RE _{n +1} , GE _{n +1} , BE _{n +1} ) and outputs the optimum compensation value do.

5, when the value of the (N-1) th data is 00111111, the value of the Nth data is 0100 0011, the value of the (N + 1) th data is 1011 1100, the number of transitions between the (N-1) -th data and the (N-1) -th data exceeds the reference value in the REV generator, so that the REV generator generates the REV signal and supplies the REV signal to the data comparator 208. Next, the data comparator 208 lists the compensated N-th data list by applying compensation values (-2, -1, +1, and +2) applicable to the N-th data, To the (N-1) -th data and the (N + 1) -th data. At this time, the compensation value (+ alpha / - alpha) is preferably 4 or less. Then, the data comparator 208 selects (-1, -2) having the smallest number of transitions for the (N-1) th data and the (N + 1) th data and sets a value of -1, (?).

The data converting unit 210 converts the compensated N-th data (RO _n , GO _n , BO _n , RE _n , GE _n , BEn) (RO _n ± β, GO _n ± β, BO _n ± β, RE _n ± β, GE _n ± β, and BE _n ± β) to the data transfer unit 212.

The data transfer unit 212 supplies the data driver 108 with the image data R ', G', and B 'supplied from the data conversion unit 210.

6 is a diagram illustrating an image of a liquid crystal panel to which a compensation value is applied to image data of a liquid crystal display device according to an exemplary embodiment of the present invention. When comparing two images, it can be confirmed that the image quality is maintained even though the compensation value is applied.

Unlike the conventional method of outputting a data inversion signal by comparing the number of transitions of previous data with the number of transitions of the current data, a liquid crystal display The power consumption of the liquid crystal display device can be reduced by converting the current data within a predetermined range according to the number of the transitions to minimize the number of transitions.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Will be clear to those who have knowledge of.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a view illustrating a liquid crystal display device according to an embodiment of the present invention. FIG.

2 is a timing controller of a liquid crystal display according to an embodiment of the present invention.

3 illustrates a data processing unit according to an embodiment of the present invention.

FIG. 4 and FIG. 5 illustrate data transformation of a data processing unit according to an embodiment of the present invention; FIG.

6A and 6B illustrate an image on a conventional liquid crystal panel and a liquid crystal panel according to an embodiment of the present invention

Description of the Related Art

112: data processing unit 202:

204: memory unit 206: REV signal generating unit

208: data comparison unit 210: data conversion unit

212: Data transfer unit

Claims (6)

A liquid crystal panel having sub-pixels for each of a plurality of regions defined by intersecting a plurality of gate lines and a plurality of data lines; A data driver for supplying a data voltage to the data lines; A gate driver for supplying a scan signal to the gate lines; And a data processor for outputting image data to the data driver, The data processing unit A plurality of compensation values predetermined in the N-th data are applied in accordance with the data inversion signal, Comparing the number of transitions between the Nth data and the (N-1) th data to which the plurality of compensation values are applied, and comparing the number of transitions between the Nth data and the (N + 1) and, Selecting one of the plurality of compensation values according to the number of the compared transitions, Converts the Nth data according to the selected compensation value, and outputs the Nth data to the data driver. delete The method according to claim 1, Wherein the data processing unit comprises: A data alignment unit for aligning the signal of the image data from the outside in accordance with the driving of the liquid crystal panel; A memory unit for storing the input image data; An REV signal generator for comparing the number of transitions of N-1th data and Nth data of the video data stored in the memory with a reference value and outputting the data inversion signal; Wherein the compensation value is applied to the Nth data of the image data according to the data inversion signal, and then the number of transitions between the Nth data and the (N-1) th data to which the plurality of compensation values are respectively applied is compared, A data comparison unit for comparing the number of transitions between the Nth data and the (N + 1) th data to which the compensation values are applied, and selecting and outputting one of the plurality of compensation values according to the number of the compared transitions; ; A data converter for applying the compensation value output from the data comparator to the Nth data and inverting the Nth data to which the compensation value is applied; And the data transfer unit for transferring the converted N-th data from the data conversion unit to the data driver. The method of claim 3, Wherein the reference value of the REV signal generator is half the total number of bits of the data. delete 5. The method of claim 4, When the data inversion signal is outputted by comparing the reference value, The data comparing unit compares the Nth data to which the compensation values are applied and the (N-1) th data to compare the Nth data and the (N + 1) th data to which the compensation values are applied, Is output as the compensation value.

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