KR101491145B1 - Display device - Google Patents

Abstract

A display device is disclosed. The display device includes a display panel; And a driving chip disposed on one side of the display panel, wherein the driving chip includes: a first block and a second block for driving the display panel; A first power source input terminal for applying a first power source voltage to the first block and a second power source input terminal for applying a second power source voltage to the second block; A first power output terminal for applying a ground voltage to the first block and a second power output terminal for applying a ground voltage to the second block; And a first electric discharge protection unit electrically connecting the first power output terminal and the second power output terminal and absorbing an electric shock.

Driver, IC, drive, element, electrostatic, ESD, ground, terminal

Description

Display device {DISPLAY DEVICE}

The embodiment relates to a display device.

As information processing technology is developed, flat panel display devices such as LCD, PDP, and AMOLED are widely used. These display devices include blocks, which must be protected from electrical shocks such as static electricity.

The embodiment intends to provide a display device in which blocks for driving the display panel can be better protected from electric shock.

A display device according to an embodiment includes a display panel; And a driving chip disposed on one side of the display panel, wherein the driving chip includes: a first block and a second block for driving the display panel; A first power input terminal for applying a first power supply voltage to the first block and a second power input terminal for applying a second power supply voltage to the second block; A first power output terminal for applying a ground voltage to the first block and a second power output terminal for applying the ground voltage to the second block; And a first electric discharge protection unit electrically connecting the first power output terminal and the second power output terminal and absorbing an electric shock.

Since the display device according to the embodiment includes the electric discharge protection part, when an electric shock such as static electricity is applied to a specific block, the electric shock can be prevented or reduced from being applied to other blocks connected to the block .

That is, through the power output terminals, the electric shock is prevented or reduced from being applied to the other blocks.

Therefore, the display device according to the embodiment can protect the blocks well when viewed from an electric shock.

1 is a perspective view showing a liquid crystal display device according to an embodiment. 2 is a block diagram showing a display device according to an embodiment. 3 is a block diagram showing a part of the display device according to the embodiment. 4 and 5 are circuit diagrams showing examples of the electric discharge protection units according to the embodiment.

1 to 3, the liquid crystal display according to the embodiment includes a liquid crystal panel 100 and a driver IC 200.

The liquid crystal panel 100 displays an image by adjusting the intensity of light passing through the liquid crystal panel 100 for each pixel. The liquid crystal panel 100 includes a color filter substrate, a TFT substrate, and a liquid crystal layer interposed between the two substrates.

The TFT substrate includes a plurality of gate wirings extending in a first direction and a plurality of gate wirings extending in a second direction and intersecting with the gate wirings. Lt; / RTI > data lines.

The driver IC 200 is mounted on the liquid crystal panel 100 in a COG (chip on glass) manner. The driver IC 200 drives the liquid crystal panel 100. The driver IC 200 includes blocks 210, 211, ..., power input terminals 241, 242 ..., power output terminals 251, 252 ..., (260), a second electric discharge protection unit (270), and a third electric discharge protection unit (280).

The blocks 210, 211, ... drive the liquid crystal panel 100. The blocks 210 to 211 receive electrical signals from the interface 300 electrically connected to the connection board 310 and generate signals for driving the liquid crystal panel 100, Wirings, the data lines and the common electrode.

The connection substrate 310 is electrically connected to the liquid crystal panel 100. That is, the interface 300 is electrically connected to the driver IC 200 through the connection substrate 310 and the wirings formed on the liquid crystal panel 100.

The blocks include a controller 210, a gradation voltage generator 211, a memory 212, a data driver 221, a gate driver 222, a voltage boosting unit 231, a common driver 223, and a voltage regulator 230, to be.

The controller 210 receives signals such as a vertical synchronizing signal Vsync, a horizontal synchronizing signal Hsync, a data enable signal DE and an RGB data signal from the interface 300, 211, the memory 212, the data driver 221, the gate driver 222, and the common driver 223.

The gradation voltage generator 211 receives a control signal from the controller 210 to generate an analog gradation signal and applies the analog gradation signal to the data driver 221.

The memory 212 stores and loads RGB data signals transmitted from the interface 300 according to a control signal of the controller 210.

The loaded RGB data signal is latched by a latch circuit or the like and transmitted to the data driver 221.

The data driver 221 receives control signals such as a source start pulse, a source shift clock, a source output enable, and a polarity control signal from the controller 210.

The data signal is received from the memory 212, and the analog gray level signal is received from the gray level voltage generator 211.

The data driver 221 generates data signals based on the control signals received from the controller 210, the RGB data signals, and the analog signals. The data driver 221 applies the data signals to the data lines.

The gate driver 222 receives a control signal such as a gate start pulse, a gate shift clock, and a gate output enable from the controller 210, receives a voltage boosted from the voltage-up unit 231, .

Further, the gate driver 222 applies the gate signals to the gate wirings.

The common driver 223 receives a control signal from the controller 210 and applies a common voltage signal to the common electrode.

At this time, the liquid crystal contained in the liquid crystal layer is aligned by an electric field formed by the data signal and the common voltage signal, and an image is displayed.

The boosting unit 231 amplifies the voltage supplied from the voltage regulator 230 and supplies the amplified voltage to the gate driver 222.

The voltage regulator 230 steps down a supplied voltage Vcc of 2.6 V or 1.8 V through a connection substrate or the like to generate a power source voltage Vdd. The voltage regulator 230 supplies the power source voltage Vdd to the controller 210, the gradation voltage generator 211, the memory 212, the data driver 221, the gate driver 222, Up unit 231 and the common driver 223. [

The power input terminals 241, 242, ... are electrically connected to the blocks 210, 211,. At this time, a plurality of blocks may be electrically connected to one power input terminal 241. That is, one power input terminal 241 may be electrically connected to one driving circuit (Circuit I) in which a plurality of blocks are integrated.

Alternatively, one block may be electrically connected to one power input terminal.

More specifically, the power input terminals 241, 242, ... are electrically connected to the driving circuits (Circuit I, II, III, ...) through the power input wiring lines IL. The power input terminals 241, 242, ... are electrically connected to the voltage regulator 230 and other blocks 210, 211,.

The power source input terminals 241, 242, ... are supplied with the power source voltage Vdd. That is, the voltage regulator 230 supplies power for driving the blocks 210, 211,... Through the power input terminals 241, 242,.

The power output terminals 251, 252, ... are electrically connected to the blocks 210, 211,. At this time, a plurality of blocks may be electrically connected to one power output terminal 251. That is, the driving circuit (Circuit I) is electrically connected to one power output terminal 251.

Alternatively, one block may be electrically connected to one power output terminal.

More specifically, the power output terminals 251, 252,... Are electrically connected to the drive circuits (circuits I, II, III.

At this time, the ground voltage GND is applied to the power output terminals 251, 252,. That is, the power supplied to the driving circuits (Circuit I, II, III, ...) by the voltage regulator 230 is output by the power output terminals 251, 252,.

The first electric discharge protection units 260 connect the power output terminals 251, 252,. That is, each first electric discharge protection unit 260 connects the respective power output terminals. The first electric discharge protection units 260 absorb electric shocks such as static electricity applied from the outside.

The second electric discharge protection units 270 connect the power input terminals 241, 242,. That is, each second electric discharge protection unit 270 connects each power input terminal. The second electric discharge protection parts 270 absorb electric shocks such as static electricity applied from the outside.

The third electric discharge protection units 280 are connected to the power output terminals 251, 252, ... and the power input terminals 241, 242,. That is, the third electric discharge protection unit 280 connects the power output terminal and the power input terminal. The third electric discharge protection units 280 absorb electric shocks such as static electricity applied from the outside.

Referring to FIGS. 4 and 5, the first through third electric discharge protection units include diodes connected in parallel so that current flows in different directions. In addition, the first to third electric discharge protection units include resistors connected in parallel.

In addition, the first to third electric discharge protection units may include a zener diode, a schottky diode, a resistor, and the like.

In addition, the first to third electric discharge protection units may include an SCR and an ESD clamp.

The first to third electric discharge protection units 280 protect the blocks 210, 211, ....

For example, when an electric shock such as static electricity is applied to the power output terminal 251, the electric shock is generated by the first electric discharge protection unit 260 and the third electric discharge protection unit 280 Absorbed.

More specifically, the first electric discharge protection unit 260 prevents the electric shock from being applied to an adjacent driving circuit (Circuit II).

Likewise, when an electric shock is applied to the power input terminal 241, the electric shock is absorbed by the second electric discharge protection unit 270 and the third electric discharge protection unit 280.

Therefore, the drive circuits (Circuit I, II, III), that is, the blocks 210, 211,... Can be protected by the first to third electric discharge protection units 280.

Particularly, when the static electricity is applied to one drive circuit (Circuit II), the first electric discharge protection units 260 can reduce the static electricity that is transmitted to the adjacent drive circuits Cuircuit I and III.

Therefore, the liquid crystal display device according to the embodiment can protect the blocks 210, 211, ..., and is stronger against electric shock such as static electricity.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, It will be understood that various modifications and applications are possible. For example, each component specifically shown in the embodiments can be modified and implemented. It is to be understood that all changes and modifications that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

1 is a perspective view showing a display device according to an embodiment.

2 is a block diagram showing a display device according to an embodiment.

3 is a block diagram showing a part of the display device according to the embodiment.

4 and 5 are circuit diagrams showing examples of the electric discharge protection units according to the embodiment.

Claims (8)

Display panel; And And a driving chip disposed on one side of the display panel, The drive chip A first block and a second block for driving the display panel; A first power input terminal for applying a first power supply voltage to the first block and a second power input terminal for applying a second power supply voltage to the second block; A first power output terminal for applying a ground voltage to the first block and a second power output terminal for applying the ground voltage to the second block; A first electric discharge protection unit electrically connecting the first power output terminal and the second power output terminal and absorbing an electric shock; A second electric discharge protection unit electrically connecting the first power input terminal and the second power input terminal and absorbing an electric shock; And A third electric discharge protection unit electrically connecting the first electric discharge protection unit and the second electric discharge protection unit; . The method of claim 1, wherein the one block or the second block A gate driver for generating a gate signal applied to the display panel; A data driver for generating a data signal to be applied to the display panel; A timing controller for controlling the gate driver and the data driver; A memory for performing a write operation and a read operation under the control of the timing controller; A common driver for generating a common voltage signal to be applied to the display panel; And And a step-up section for supplying the gate driver with the boosted power, Wherein the first block and the second block are different from each other. 2. The display device according to claim 1, wherein the first electric discharge protection portion includes at least one of a Zener diode, a Schottky diode and a resistor. delete The display device of claim 1, wherein the third electric discharge protection unit is electrically connected between the one power input terminal and the first power output terminal, and absorbs an electric shock. The display device according to claim 1, wherein the driving chip is mounted on the display panel. The display device of claim 1, further comprising a voltage regulator for generating the first power supply voltage and the second power supply voltage and applying the first power supply voltage and the second power supply voltage to the first power supply input terminal and the second power supply input terminal, respectively. The display device according to claim 1, further comprising: an interface for applying a signal for driving the display panel to the driving chip; And And a connection substrate electrically connecting the interface and the display panel.

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