CN117935703A - Control circuit and control method of display panel and display device - Google Patents

Abstract

The application discloses a control circuit and a control method of a display panel and a display device, wherein the control circuit comprises the following components: the first detection sub-circuit is used for detecting a first voltage value of the first voltage signal end and generating a first control signal based on a detection result; the second detection sub-circuit is used for detecting a second voltage value of the second voltage signal end and generating a second control signal based on a detection result; the public voltage detection sub-circuit is used for detecting the public voltage value of the public voltage signal end based on the first voltage value of the first voltage signal end and the second voltage value of the second voltage signal end, and generating a third control signal based on the detection result; and the first switch sub-circuit is used for controlling the output of the switch voltage based on the first control signal, the second control signal and the third control signal.

Description

Control circuit and control method of display panel and display device

Technical Field

The application relates to the technical field of display, in particular to a control circuit and a control method of a display panel and a display device.

Background

As a display device, TFT-LCD (Thin Film Transistor Liquid CRYSTAL DISPLAY, thin film transistor-liquid crystal display) is increasingly used in the field of high performance display due to its small size, low power consumption, no radiation, and relatively low manufacturing cost.

In the prior art, because of the connector and the COF (chip on film) wiring arrangement on the display device, foreign matters in the production process, or ESD (electro-static discharge) and other reasons when the whole machine is assembled, when the gamma binding point voltage) and the VCOM (common voltage) signals are short-circuited with the side wiring, the voltage amplitude of the VCOM (common voltage) signals can change, so that the display picture is abnormal when the panel is lighted, including full-screen whitening, full-screen blackening, uneven gradation, noise existence of part gray scales and the like.

Disclosure of Invention

In view of the above-described drawbacks or shortcomings of the related art, it is desirable to provide a control circuit and control method of a display panel, and a display device, which can improve the panel protection effect and prevent display failure.

In a first aspect, the present application provides a control circuit of a display panel, including:

The first detection sub-circuit is used for detecting a first voltage value of the first voltage signal end and generating a first control signal based on a detection result;

The second detection sub-circuit is used for detecting a second voltage value of the second voltage signal end and generating a second control signal based on a detection result;

The public voltage detection sub-circuit is used for detecting the public voltage value of the public voltage signal end based on the first voltage value of the first voltage signal end and the second voltage value of the second voltage signal end, and generating a third control signal based on the detection result;

And the first switch sub-circuit is used for controlling the output of the switch voltage based on the first control signal, the second control signal and the third control signal.

Optionally, the first voltage value is positive voltage, the first detection sub-circuit includes a first comparator, a positive input end of the first comparator is electrically connected with the first voltage signal end, a negative input end of the first comparator is electrically connected with the first comparison voltage end, an output end of the first comparator is electrically connected with the first switch sub-circuit, a power end of the first comparator is electrically connected with the power signal end, and a ground of the first comparator is grounded.

Optionally, the second voltage value is negative voltage, the second detection sub-circuit includes a second comparator, a negative input end of the second comparator is electrically connected with the second voltage signal end, a positive input end of the second comparator is electrically connected with the second comparison voltage end, an output end of the second comparator is electrically connected with the first switch sub-circuit, a power end of the second comparator is electrically connected with the power signal end, and a ground of the second comparator is grounded.

Optionally, the common voltage detection sub-circuit includes a third comparator, a positive input end of the third comparator is electrically connected with the common voltage signal end, a negative input end of the third comparator is electrically connected with the first voltage signal end, an output end of the third comparator is electrically connected with the first switch sub-circuit, a power end of the third comparator is electrically connected with the power signal end, and a ground of the third comparator is grounded.

Optionally, the common voltage detection sub-circuit includes a fourth comparator, a positive input end of the fourth comparator is electrically connected with the second voltage signal end, a negative input end of the fourth comparator is electrically connected with the common voltage signal end, an output end of the fourth comparator is electrically connected with the first switch sub-circuit, a power supply end of the fourth comparator is electrically connected with the power supply signal end, and a ground connection of the fourth comparator is grounded.

Optionally, the first switching sub-circuit includes a switching transistor, and a control end of the switching transistor is electrically connected with an output end of the first comparator, an output end of the second comparator, an output end of the third comparator, and an output end of the fourth comparator;

the first end of the switching transistor is electrically connected with the switching voltage end, and the second end of the switching transistor is grounded.

Optionally, the output end of the first comparator is electrically connected with the control end of the switching transistor through a first diode; the output end of the second comparator is electrically connected with the control end of the switching transistor through a second diode; the output end of the third comparator is electrically connected with the control end of the switching transistor through a third diode; the output end of the fourth comparator is electrically connected with the control end of the switching transistor through a fourth diode.

Optionally, the switching device further comprises a time sequence controller and a driving controller, wherein the time sequence controller is electrically connected with the driving controller through a second switch sub-circuit, and the second switch sub-circuit is used for controlling the connection and disconnection between the time sequence controller and the driving controller based on the switch voltage provided by the switch voltage terminal.

In a second aspect, the present application provides a control method of a display panel, using a control circuit of the display panel as described above, the method comprising:

the first detection sub-circuit detects a first voltage value of the first voltage signal end and generates a first control signal based on a detection result;

The second detection sub-circuit detects a second voltage value of the second voltage signal end and generates a second control signal based on a detection result;

The public voltage detection sub-circuit detects a public voltage value of the public voltage signal end based on a first voltage value of the first voltage signal end and a second voltage value of the second voltage signal end, and generates a third control signal based on a detection result;

The first switch sub-circuit controls the output of the switch voltage based on the first control signal, the second control signal and the third control signal.

In a third aspect, the present application provides a display device comprising a control circuit of a display panel as described in any one of the above.

The technical scheme provided by the embodiment of the application can comprise the following beneficial effects:

The display panel control circuit provided by the embodiment of the application can detect positive polarity signals, negative polarity signals and public voltage signals, judge abnormal signals when the signals are abnormal, and control the first switch sub-circuit to execute display panel protection when the signals causing abnormal display are abnormal, thereby improving the panel protection effect and preventing poor display; the application can also effectively avoid the problems of white lighting, abnormal jitter of pictures and the like caused by the abnormal VCOM voltage.

Drawings

Other features, objects and advantages of the present application will become more apparent upon reading of the detailed description of non-limiting embodiments, made with reference to the accompanying drawings in which:

Fig. 1 is a schematic structural diagram of a control circuit of a display panel according to an embodiment of the present application;

fig. 2 is a schematic connection diagram of a control circuit of a display panel according to an embodiment of the application;

Fig. 3 is a schematic connection diagram of a control circuit of a display panel according to an embodiment of the application;

Fig. 4 is a schematic diagram of a control method of a display panel according to an embodiment of the present application;

FIG. 5 is a schematic waveform diagram of a first control signal output of a first detection sub-circuit according to an embodiment of the present application;

Fig. 6 is a schematic waveform diagram of a third control signal output of the common voltage detection sub-circuit according to an embodiment of the present application.

Detailed Description

The application is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the application and are not limiting of the application. It should be noted that, for convenience of description, only the portions related to the application are shown in the drawings.

It should be noted that, without conflict, the embodiments of the present application and features of the embodiments may be combined with each other. The application will be described in detail below with reference to the drawings in connection with embodiments.

Referring to fig. 1 in detail, the present application provides a control circuit of a display panel, including:

The first detection sub-circuit 100 is configured to detect a first voltage value of the first voltage signal terminal VG1, and generate a first control signal based on a detection result;

the second detection sub-circuit 200 is configured to detect a second voltage value of the second voltage signal terminal VG2, and generate a second control signal based on a detection result;

a common voltage detection sub-circuit 300, wherein the common voltage detection sub-circuit 300 is configured to detect a common voltage value of the common voltage signal terminal VCOM based on the first voltage value of the first voltage signal terminal VG1 and the second voltage value of the second voltage signal terminal VG2, and generate a third control signal based on a detection result;

the first switch sub-circuit 400 is used for controlling the output of the switch voltage LK based on the first control signal, the second control signal and the third control signal.

The type of the display panel is not limited in the embodiment of the present application, and the display panel may be a liquid crystal display panel (LCD), an organic light emitting display panel (OLED), an electronic paper display panel (E-paper), or the like. Here, an LCD panel is taken as an example, and other types of panels and so on.

The TFT-LCD driving circuit may include a power management chip, a timing control circuit (TCON), a gray scale circuit, a Source Driver IC, a gate Driver GATE DRIVER IC, and the like. The control circuit provided in the embodiment of the application is applied to different driving circuits, and the application is not limited to this.

It should be noted that, in the embodiment of the present application, the signal types of the first voltage signal terminal VG1 and the second voltage signal terminal VG2 are not limited, and the first voltage signal terminal VG1 and the second voltage signal terminal VG2 may be both binding point voltages, data voltages, and the like, and are set according to application scenarios and the like in different embodiments.

For example, the source driver further includes a gamma binding point voltage generating circuit for generating a plurality of gamma binding point voltages and a data voltage generating circuit; the data voltage generating circuit is electrically connected with the gamma binding point voltage generating circuit and is used for obtaining data voltages corresponding to preset gray scales according to the gamma binding point voltage and providing the data voltages to the data voltage providing display panel.

The control circuit provided by the embodiment of the application can be electrically connected with the gamma binding point voltage generation circuit, is used for detecting the voltage of the gamma binding point generated by the gamma binding point voltage generation circuit, and can also be electrically connected with the data voltage generation circuit, and is used for detecting the voltage of the data voltage generated by the data voltage generation circuit.

In addition, in the embodiment of the present application, the number of the first detection sub-circuit 100 and the second detection sub-circuit 200 is not limited, and the number of the signal lines to be detected may be adjusted according to the need in different embodiments.

In order to improve the display effect of the display panel, it is required that the driving voltages of the adjacent pixels keep opposite polarities, and the driving method of the opposite polarities of the adjacent pixels can be mainly implemented as dot inversion, 2H1V inversion, 1H2V inversion, column inversion, row inversion, and the like, which is not limited in the embodiment of the present application, and is adjusted as needed in different embodiments.

For example, with the row inversion driving method, in the current frame, when the nth row and mth column data voltages corresponding to the nth row and mth column pixel circuits and the (n+1) th row and mth column data voltages corresponding to the (n+1) th row and mth column pixel circuits have different polarities.

In an embodiment of the present invention, the polarity of the data voltage may be positive or negative, and the data voltage may be positive or negative. When the data voltage is a positive polarity data voltage, a voltage difference between the positive polarity data voltage and the common electrode voltage Vcom is greater than 0, that is, the positive polarity data voltage is greater than the common electrode voltage Vcom; when the data voltage is a negative polarity data voltage, a voltage difference between the negative polarity data voltage and the common electrode voltage Vcom is less than 0, that is, the negative polarity data voltage is less than the common electrode voltage Vcom.

In addition, it should be noted that, in the embodiment of the present application, the reference voltage values of the first comparison voltage terminal Vref1 and the second comparison voltage terminal Vref2 are not limited, and are adjusted according to the needs in different embodiments, and the reference voltages of the first comparison voltage terminal Vref1 and the second comparison voltage terminal Vref2 in different embodiments may be provided by separately adding signal lines, and in this embodiment, the first comparison voltage terminal Vref1 and the second comparison voltage terminal Vref2 may be set in a homologous manner with the first voltage signal terminal VG1 and the second voltage signal terminal VG 2.

Illustratively, the gamma binding point voltage generating circuit is configured to generate a plurality of gamma binding point voltages including signals GMA1, GMA2, GMA6, GMA7, GMA8, GMA9, GMA13, GMA14. Wherein, GMA1, GMA2 are positive polarity, because the wiring mode of arranging, GMA7 receives other signal interference easily, and GMA6 signal is comparatively stable and is difficult to receive the interference, and wherein, first voltage signal end VG1 can be GMA7 signal, and first comparison voltage end Vref1 can be GMA6 signal. The second voltage signal terminal VG2 may be a GMA8 signal, and the second comparison voltage terminal Vref2 may be a GMA9 signal.

In other embodiments, the first comparison voltage terminal Vref1 and the second comparison voltage terminal Vref2 may be normal voltage signals, for example, HAVDD signals, so that when the positive GMA voltage is lower than HAVDD, the voltage HAVDD is directly output, and when the negative GMA voltage is higher than HAVDD, the voltage HAVDD is also output. The application is not limited in this regard.

In the embodiment of the present application, the voltage of the first voltage signal terminal VG1 is positive, and the voltage of the second voltage signal terminal VG2 is negative.

The first voltage value is a positive voltage, the first detection sub-circuit 100 includes a first comparator T1, a positive input terminal+ of the first comparator T1 is electrically connected to the first voltage signal terminal VG1, a negative input terminal-of the first comparator T1 is electrically connected to the first comparison voltage terminal Vref1, an output terminal Vout of the first comparator T1 is electrically connected to the first switch sub-circuit 400, a power supply terminal of the first comparator T1 is electrically connected to the power signal terminal AVDD, and a ground terminal GND of the first comparator T1 is grounded.

The second voltage value is a negative voltage, the second detection sub-circuit 200 includes a second comparator T2, a negative input end-of the second comparator T2 is electrically connected to the second voltage signal end VG2, a positive input end + of the second comparator T2 is electrically connected to the second comparison voltage end Vref2, an output end Vout of the second comparator T2 is electrically connected to the first switch sub-circuit 400, a power supply end of the second comparator T2 is electrically connected to the power signal end AVDD, and a ground end GND of the second comparator T2 is grounded.

The common voltage detection sub-circuit 300 includes a third comparator T3, a positive input terminal+ of the third comparator T3 is electrically connected to the common voltage signal terminal VCOM, a negative input terminal-of the third comparator T3 is electrically connected to the first voltage signal terminal VG1, an output terminal Vout of the third comparator T3 is electrically connected to the first switch sub-circuit 400, a power supply terminal of the third comparator T3 is electrically connected to the power supply signal terminal AVDD, and a ground terminal GND of the third comparator T3 is grounded.

The common voltage detection sub-circuit 300 includes a fourth comparator T4, a positive input terminal+ of the fourth comparator T4 is electrically connected to the second voltage signal terminal VG2, a negative input terminal-of the fourth comparator T4 is electrically connected to the common voltage signal terminal VCOM, an output terminal Vout of the fourth comparator T4 is electrically connected to the first switch sub-circuit 400, a power supply terminal of the fourth comparator T4 is electrically connected to the power supply signal terminal AVDD, and a ground terminal GND of the fourth comparator T4 is grounded.

It should be noted that the power management chip PMIC is used to generate multiple analog reference voltages, such as an analog voltage for outputting the power signal terminal AVDD and an analog voltage for outputting the ground terminal GND. In the embodiment of the application, the power supply end of each comparator can be connected with the power management chip, and the power supply ends are arranged according to the needs in different embodiments.

As shown in fig. 2, the first switch sub-circuit 400 includes a switch transistor DT, where a control end of the switch transistor DT is electrically connected to an output end Vout of the first comparator T1, an output end Vout of the second comparator T2, an output end Vout of the third comparator T3, and an output end Vout of the fourth comparator T4; the first terminal of the switching transistor DT is electrically connected to the switching voltage LK terminal, and the second terminal of the switching transistor DT is grounded.

The output terminal Vout of the first comparator T1 is electrically connected to the control terminal of the switching transistor DT through a first diode D1, and the power supply terminal of the first comparator T1 is electrically connected to the output terminal Vout through a first resistor R1.

The "control terminal" refers specifically to the gate of the transistor, the "first terminal" refers specifically to the source of the transistor, and the "second terminal" refers specifically to the drain of the transistor. Of course, it will be appreciated by those skilled in the art that the "first end" and "second end" are interchangeable, i.e., the "first end" refers specifically to the drain of the transistor and the "second end" refers specifically to the source of the transistor.

In the embodiment of the present application, the type of the switching transistor DT is not limited, for example, the switching transistor DT may be a transistor, a thin film switching transistor DT, a field effect transistor, or other devices with the same characteristics. Transistors can be classified into N-type transistors and P-type transistors according to the semiconductor characteristics of the transistors. When the transistor is used as the switching transistor DT, the N-type transistor is controlled by a high-level switching control signal to be turned on and is controlled by a low-level switching control signal to be turned off; the P-type transistor is controlled by a low-level switch control signal to be turned on, and is controlled by a high-level switch control signal to be turned off.

Based on this, in the embodiment of the present application, the effective level of the output of the first control signal, the second control signal, and the third control signal may be the high level H or the low level L. The application is not limited to this, and the embodiment of the application is exemplified by the N-type switching transistor DT.

In the embodiment of the present application, the control signal (the effective signal of the switch transistor DT) output by each detection sub-circuit may be a high level or a low level, for example, the switch transistor DT is an N-type switch transistor DT, when each control signal is a high level signal, the switch transistor DT is turned on to output a signal, and when any one of each control signal is a low level signal, the switch transistor DT is turned off to stop outputting a signal.

In addition, in the embodiment of the present application, the output terminal Vout of the second comparator T2 is electrically connected to the control terminal of the switching transistor DT through a second diode D2, and the power supply terminal of the second comparator T2 is electrically connected to the output terminal Vout through a second resistor R2.

The output terminal Vout of the third comparator T3 is electrically connected to the control terminal of the switching transistor DT through a third diode D3, and the power supply terminal of the third comparator T3 is electrically connected to the output terminal Vout through a third resistor R3.

The output terminal Vout of the fourth comparator T4 is electrically connected to the control terminal of the switching transistor DT through a fourth diode D4, and the power supply terminal of the fourth comparator T4 is electrically connected to the output terminal Vout through a fourth resistor R4.

The control terminal of the switching transistor DT is electrically connected to the ground terminal GND through a fifth resistor R5.

In addition, in the embodiment of the present application, the third comparator T3 and the fourth comparator T4 may alternatively use a double-limit comparator (window comparator), in which the third diode D3 and the fourth diode D4 may share the same diode, and the third resistor R3 and the fourth resistor R4 may also share the same resistor and be disposed between the power signal terminal AVDD and the output terminal Vout, which is not limited in the present application.

In this embodiment, a diode is provided between the output terminal Vout of each comparator and the control terminal of the switching transistor DT, so that current flowing backward can be prevented, and detection accuracy can be improved.

As shown in fig. 3, in another embodiment of the present application, the control circuit further includes a timing controller 500 and a driving controller 600, where the timing controller 500 is electrically connected to the driving controller 600 through a second switch sub-circuit 700, and the second switch sub-circuit 700 is used for controlling the connection and disconnection between the timing controller 500 and the driving controller 600 based on the switch voltage LK provided by the switch voltage LK terminal.

It should be noted that, in the embodiment of the present application, the driving controller 600 may be a source driver. The timing controller 500 is used to output a timing signal to the driving controller 600 to generate a gamma binding point voltage and a data voltage.

In the embodiment of the present application, the second switch sub-circuit 700 is used for controlling the connection between the timing controller 500 and the driving controller 600, and the switch voltage LK is a handshake signal between the timing controller 500 and the driving controller 600, however, in other embodiments, the second switch sub-circuit 700 may also be used for controlling the connection between the power management chip and the driving controller 600, where the power management chip is used for providing a power signal to the driving controller 600, and is set according to needs in different embodiments.

In other embodiments of the present application, the number of the first detection sub-circuit 100 and the second detection sub-circuit 200 may be plural according to the difference in the number of the detection voltage signals, and the control circuit further includes:

The first detection sub-circuit 100 includes a fifth comparator T5 for detecting a positive voltage, a positive input terminal+ of the fifth comparator T5 is electrically connected to the fifth voltage signal terminal VG5, a negative input terminal-of the fifth comparator T5 is electrically connected to the fifth comparison voltage terminal Vref5, an output terminal Vout of the fifth comparator T5 is electrically connected to the fifth switching sub-circuit, a power supply terminal of the fifth comparator T5 is electrically connected to the power supply signal terminal AVDD, and a ground terminal GND of the fifth comparator T5 is grounded.

The second detection sub-circuit 200 includes a sixth comparator T6, a negative input terminal of the sixth comparator T6 is electrically connected to the sixth voltage signal terminal VG6, a positive input terminal+ of the sixth comparator T6 is electrically connected to the sixth comparison voltage terminal Vref6, an output terminal Vout of the sixth comparator T6 is electrically connected to the first switch sub-circuit 400, a power supply terminal of the sixth comparator T6 is electrically connected to the power supply signal terminal AVDD, and a ground terminal GND of the sixth comparator T6 is grounded.

The number of comparators can be increased or decreased according to the number of signal lines to be detected in different embodiments, which is not limited by the present application. Illustratively, the fifth voltage signal terminal VG5 may be a GMA14 signal, the fifth comparison voltage terminal Vref5 may be a GMA13 signal, the sixth voltage signal terminal VG6 may be a GMA1 signal, and the fifth comparison voltage terminal Vref5 may be a GMA2 signal.

Based on the same inventive concept, as shown in fig. 4-6, the present application provides a control method of a display panel, using a control circuit of the display panel as described above, the method comprising:

the first detection sub-circuit 100 detects a first voltage value of the first voltage signal terminal VG1, and generates a first control signal based on the detection result;

the second detection sub-circuit 200 detects a second voltage value of the second voltage signal terminal VG2, and generates a second control signal based on the detection result;

The common voltage detection sub-circuit 300 detects a common voltage value of the common voltage signal terminal VCOM based on the first voltage value of the first voltage signal terminal VG1 and the second voltage value of the second voltage signal terminal VG2, and generates a third control signal based on the detection result;

The first switching sub-circuit 400 controls the output of the switching voltage LK based on the first, second, and third control signals.

During signal detection, the voltage of the first voltage signal end VG1 on the first comparator T1 is compared with the voltage of the first comparison voltage end Vref1 of the first comparator T1, when the voltage is lower than Vref1, the first comparator T1 outputs L, and when the voltage is higher than Vref1, the first comparator T1 outputs H; the voltage comparison between the second voltage signal end VG2 on the second comparator T2 and the second comparison voltage end Vref2 of the second comparator T2 is that the output L of the second comparator T2 is higher than Vref2, and the output H of the second comparator T2 is lower than Vref 2; the voltage comparison between the first voltage signal end VG1 on the third comparator T3 and the common voltage signal end VCOM of the third comparator T3 is carried out, when VCOM is lower than VG1, the fourth comparator T4 outputs L, and when VCOM is higher than VG1, the third comparator T3 outputs H; the voltage of the second voltage signal end VG2 on the fourth comparator T4 is compared with the voltage of the common voltage signal end VCOM of the fourth comparator T4, when VCOM is higher than VG1, the fourth comparator T4 outputs L, and when VCOM is lower than VG1, the fourth comparator T4 outputs H.

It can be understood that in the embodiment of the present application, the high level signal H output by each comparator is the voltage VAVDD of the power signal terminal AVDD, the low level signal L is the voltage 0V of the ground terminal GND, and other setting manners may be adopted according to needs in different embodiments, which is not limited by the present application.

It should be noted that, in the embodiment of the present application, the first voltage signal of the first voltage signal terminal VG1 is a positive voltage, and when the first voltage signal terminal VG1 is abnormal to a line smaller than the normal voltage, the first voltage signal terminal VG1 is not significantly affected and no significant abnormality occurs; when the first voltage signal terminal VG1 is abnormal to a voltage greater than the normal voltage, obvious problems such as abnormal display brightness, uneven gradation, noise and the like occur.

The second voltage signal of the second voltage signal end VG2 is negative voltage, when the second voltage signal end VG2 is abnormal to a line with a larger voltage than the normal voltage, the second voltage signal end VG2 is not obviously affected, and obvious abnormality can not occur; when the second voltage signal terminal VG2 is abnormal to a voltage smaller than the normal voltage, obvious problems of abnormal display brightness, uneven gradation, noise, etc. occur.

The VCOM signal needs to be compared with the first voltage signal and the second voltage signal at the same time, and the VCOM signal is normally displayed only when VG1 is more than VCOM and more than VG2, so that the display effect is not obviously affected, and the problems of obvious display brightness abnormality, gradual change unevenness, noise point and the like can be caused in display when other voltages are abnormal.

In addition, in the embodiment of the present application, the output terminal Vout of each comparator is connected in parallel to the control terminal of the switching transistor DT, and when the output terminal Vout of any comparator is at the high level H (i.e., when the display is abnormal), the switching transistor DT is turned on, the switching voltage LK terminal is grounded, and the switching voltage LK at the switching voltage LK terminal is output as a low level signal.

In the embodiment of the present application, when the display abnormality protection is performed, by providing the second switch sub-circuit 700 between the timing controller 500 and the driving controller 600, the second switch sub-circuit 700 turns on the electrical connection between the timing controller 500 and the driving controller 600 based on the normal switching voltage LK (high level signal) provided by the switching voltage LK terminal, and the timing controller 500 normally provides the timing signal to the driving controller 600, and the display panel normally displays. The second switching sub-circuit 700 disconnects the electrical connection between the timing controller 500 and the driving controller 600 based on the low level switching voltage LK provided from the switching voltage LK terminal, thereby turning off the display operation of the display panel.

The application also provides a display device comprising a control circuit of the display panel as described above. The display device can be applied to any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like.

It is to be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like are merely for convenience in describing and simplifying the description based on the orientation or positional relationship shown in the drawings, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus are not to be construed as limiting the invention.

Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present invention, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.

Unless defined otherwise, technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein is for the purpose of describing particular implementations only and is not intended to be limiting of the invention. Terms such as "disposed" or the like as used herein may refer to either one element being directly attached to another element or one element being attached to another element through an intermediate member. Features described herein in one embodiment may be applied to another embodiment alone or in combination with other features unless the features are not applicable or otherwise indicated in the other embodiment.

The present invention has been described in terms of the above embodiments, but it should be understood that the above embodiments are for purposes of illustration and description only and are not intended to limit the invention to the embodiments described. Those skilled in the art will appreciate that many variations and modifications are possible in light of the teachings of the invention, which variations and modifications are within the scope of the invention as claimed.

Claims (10)

1. A control circuit of a display panel, comprising:

The first detection sub-circuit is used for detecting a first voltage value of the first voltage signal end and generating a first control signal based on a detection result;

The second detection sub-circuit is used for detecting a second voltage value of the second voltage signal end and generating a second control signal based on a detection result;

The public voltage detection sub-circuit is used for detecting the public voltage value of the public voltage signal end based on the first voltage value of the first voltage signal end and the second voltage value of the second voltage signal end, and generating a third control signal based on the detection result;

And the first switch sub-circuit is used for controlling the output of the switch voltage based on the first control signal, the second control signal and the third control signal.

2. The control circuit of claim 1, wherein the first voltage value is a positive polarity voltage, the first detection sub-circuit comprises a first comparator, a positive input terminal of the first comparator is electrically connected to the first voltage signal terminal, a negative input terminal of the first comparator is electrically connected to the first comparison voltage terminal, an output terminal of the first comparator is electrically connected to the first switching sub-circuit, a power supply terminal of the first comparator is electrically connected to the power supply signal terminal, and a ground terminal of the first comparator is grounded.

3. The control circuit of claim 2, wherein the second voltage value is a negative polarity voltage, the second detection sub-circuit includes a second comparator, a negative input terminal of the second comparator is electrically connected to the second voltage signal terminal, a positive input terminal of the second comparator is electrically connected to the second comparison voltage terminal, an output terminal of the second comparator is electrically connected to the first switching sub-circuit, a power supply terminal of the second comparator is electrically connected to the power supply signal terminal, and a ground terminal of the second comparator is grounded.

4. The control circuit of a display panel according to claim 3, wherein the common voltage detection sub-circuit includes a third comparator, a positive input terminal of the third comparator is electrically connected to the common voltage signal terminal, a negative input terminal of the third comparator is electrically connected to the first voltage signal terminal, an output terminal of the third comparator is electrically connected to the first switch sub-circuit, a power supply terminal of the third comparator is electrically connected to the power supply signal terminal, and a ground terminal of the third comparator is grounded.

5. The control circuit of a display panel according to claim 4, wherein the common voltage detection sub-circuit includes a fourth comparator, a positive input terminal of the fourth comparator is electrically connected to the second voltage signal terminal, a negative input terminal of the fourth comparator is electrically connected to the common voltage signal terminal, an output terminal of the fourth comparator is electrically connected to the first switch sub-circuit, a power supply terminal of the fourth comparator is electrically connected to the power supply signal terminal, and a ground terminal of the fourth comparator is grounded.

6. The control circuit of the display panel according to claim 5, wherein the first switching sub-circuit includes a switching transistor, and a control terminal of the switching transistor is electrically connected to an output terminal of the first comparator, an output terminal of the second comparator, an output terminal of the third comparator, and an output terminal of the fourth comparator;

the first end of the switching transistor is electrically connected with the switching voltage end, and the second end of the switching transistor is grounded.

7. The control circuit of the display panel according to claim 6, wherein an output terminal of the first comparator is electrically connected to a control terminal of the switching transistor through a first diode; the output end of the second comparator is electrically connected with the control end of the switching transistor through a second diode; the output end of the third comparator is electrically connected with the control end of the switching transistor through a third diode; the output end of the fourth comparator is electrically connected with the control end of the switching transistor through a fourth diode.

8. The control circuit of claim 6, further comprising a timing controller and a drive controller, the timing controller electrically connected to the drive controller through a second switch sub-circuit for controlling on and off between the timing controller and the drive controller based on the switching voltage provided by the switching voltage terminal.

9. A control method of a display panel, characterized in that a control circuit of a display panel according to any one of claims 1 to 8 is used, the method comprising:

the first detection sub-circuit detects a first voltage value of the first voltage signal end and generates a first control signal based on a detection result;

The second detection sub-circuit detects a second voltage value of the second voltage signal end and generates a second control signal based on a detection result;

The public voltage detection sub-circuit detects a public voltage value of the public voltage signal end based on a first voltage value of the first voltage signal end and a second voltage value of the second voltage signal end, and generates a third control signal based on a detection result;

The first switch sub-circuit controls the output of the switch voltage based on the first control signal, the second control signal and the third control signal.

10. A display device comprising a control circuit of a display panel according to any one of claims 1-8.