KR101464445B1 - Pulse Detector and Apparatus for Generating Plasma Including Pulse Detector - Google Patents

Abstract

Provided is a plasma generating apparatus capable of selectively detecting only a target pulse from an input signal with nanosecond pulses. According to an embodiment of the present invention, the plasma generating apparatus comprises a magnetic pulse compression tank which includes a first magnetic switch to transfer energy charged in a first capacitor to a second capacitor and a second magnetic switch to output the energy charged in the second capacitor into a pulse signal; a plasma reactor which generates plasma using the pulse signal; and a pulse detector which compares an input signal including at least one among the pulse signal, a first current signal flowing the first capacitor, and a second current signal flowing the second capacitor with a reference signal, and detects a target pulse by discharging the other pulses apart from the target pulse among multiple pulses included in a square wave during a preset period, which is generated as a result of the comparison.

Description

BACKGROUND OF THE INVENTION Field of the Invention [0001] The present invention relates to a pulse detector and a plasma generator including the pulse detector.

The present invention relates to a pulse detector, and more particularly, to a pulse detector capable of detecting a pulse of a current output from a plasma generator.

A low temperature plasma generator applied to a desulfurization denitration processing system for flue gas processing compresses and outputs a microsecond high voltage pulse current to a pulse current of nanoseconds by pulse compression of a magnetic switch and outputs a pulse current of nanoseconds to a discharge electrode of a plasma reactor and a discharge electrode To generate a plasma.

The low-temperature plasma generator includes a pulse generator for generating a high-voltage compressed pulse current, a plasma reactor for generating a plasma reaction using a high-voltage compressed pulse current, and a plasma reactor disposed between the pulse generator and the plasma reactor for storing and outputting a high- .

The switching unit uses a magnetic switch having a magnetizing inductor characteristic to output a high-voltage compressed pulse current. When the current greater than the set saturation current suitable for saturating the magnetic switch flows, the magnetic switch becomes faster than the on-state timing when the set saturation current is applied, and the on-state timing is delayed when the set saturation current is smaller than the set saturation current. As a result, there is a problem that the energy is not completely transferred between the capacitors for charging and discharging the high-voltage compressed pulse current and the plasma reactor, or the efficiency is lowered due to recharging.

In order to solve this problem, a magnetic switch is configured in a multi-stage, and a switching timing of a magnetic switch is controlled so that a pulse current transmitted through a multi-stage magnetic switch flows at an optimum timing, A method has been proposed.

In order to control the switching timing of the magnetic switch, it is required to detect the pulse current flowing through the capacitors and the pulse current delivered to the plasma reactor. As shown in FIG. 1, the pulse current flowing in the capacitors and the pulse current Since the pulse current is damped by the load characteristic of the plasma reactor several times, it is necessary to detect the pulse generated in the pulse current flowing through the capacitors and the pulse current delivered to the plasma reactor.

However, since the pulse current flowing through the capacitors and the pulse current delivered to the plasma reactor are narrowed to at least 500 ns, the pulse current flowing through the capacitors and the pulse current delivered to the plasma reactor can accurately detect only the initial pulse There is a problem that it is difficult.

The present invention provides a pulse detector capable of selectively detecting only a target pulse in an input signal having nanosecond pulses, and a plasma generator including the pulse detector.

Another object of the present invention is to provide a pulse detector capable of converting a detected target pulse into an optical signal and transmitting the same to an upper controller, and a plasma generating device including the pulse detector.

According to an aspect of the present invention, there is provided a plasma generator including a first magnetic switch for transferring energy charged in a first capacitor to a second capacitor, and a second magnetic switch for transferring energy charged in the second capacitor to a pulse signal A magnetic pulse compression tank including a second magnetic switch for outputting a magnetic signal; A plasma reactor for generating a plasma using the pulse signal; And an input signal including at least one of the pulse signal, the first current signal flowing to the first capacitor, and the second current signal flowing to the second capacitor, with a reference signal, And a pulse detector for detecting the target pulse by discharging pulses other than the target pulse among a plurality of pulses included in the pulse signal.

According to another aspect of the present invention, there is provided a pulse detector that outputs a high level if an input signal is greater than a reference signal and outputs a low level when the input signal is not greater than the reference signal, A comparator for outputting the result as a square wave; A signal inverting unit for inverting the square wave; When the pulse is turned off, a target pulse is outputted from among a plurality of pulses included in a predetermined section of the rectangular wave. When the pulse is turned on, the output terminal of the comparator is grounded and pulses excluding the target pulse, A pulse discharger for discharging the target pulse to detect the target pulse; And a controller for outputting a control signal having a high level to maintain the pulse discharge unit in an ON state for a predetermined time when a rising edge of the target pulse is detected in a square wave inverted by the signal inverting unit, And a pulse delay unit for outputting a control signal having a low level to maintain the pulse discharge unit in an off state for a period of time other than a predetermined time.

According to the present invention, it is possible to precisely control the switching timing of the magnetic switch of the plasma generator by accurately detecting only the first pulse having the nanosecond magnitude from the pulse current flowing through the capacitors of the plasma generator and the pulse current transmitted to the plasma reactor, This has the effect of maximizing the efficiency of energy transfer to the plasma reactor.

Further, according to the present invention, since a digital controller having a high-speed computation processing speed is not required for detecting a target pulse having a nanosecond size, it is not only economically efficient, but also requires no separate detection routine for target pulse detection, So that the burden can be minimized.

In addition, according to the present invention, the detected pulses are converted into optical signals and transmitted to the host controller to prevent waveform distortion caused by high-voltage conduction noise and external noise, and to improve the transmission rate of the detected pulses .

1 is a view showing damping of a current generated in a plasma generating apparatus;
FIG. 2 is a block diagram schematically showing a configuration of a plasma generating apparatus according to an embodiment of the present invention; FIG.
3 is a circuit diagram showing a configuration of the plasma generating apparatus shown in FIG. 2. FIG.
Figure 4 is a voltage and current waveform diagram in the magnetic pulse compression tank shown in Figure 2;
FIGS. 5A to 5E are diagrams for explaining the operation mechanism of the plasma generator in the section T1 to the section T5 shown in FIG. 4. FIG.
FIG. 6 is a block diagram schematically showing the configuration of the pulse detector shown in FIG. 2. FIG.
Fig. 7 is a circuit diagram showing an example of the voltage dividing portion shown in Fig. 2; Fig.
FIG. 8A is a view showing a bistable multivibrator included in the pulse delay unit shown in FIG. 6; FIG.
8B is a view showing a waveform of a control signal generated by the pulse delay unit;
9A is a diagram showing waveforms of an input signal and a reference signal input to a comparator;
9B is a view showing a waveform of a signal generated by the comparator;
FIG. 9C shows a waveform of a signal input to the first signal inversion section; FIG.
FIG. 9D shows a waveform of an output signal of the first signal inversion section; FIG.
FIG. 9E shows a waveform of a control signal output from the pulse delay unit; FIG.
FIG. 9F shows a waveform of a signal discharged through the pulse discharge portion; FIG.
FIG. 9G shows a waveform of a signal output through the second signal inversion section; FIG.
10 is a circuit diagram showing a circuit configuration of an optical signal converting unit according to an embodiment of the present invention.
11 is a view showing a logic gate configuration applied to the U1 element shown in Fig. 10. Fig.
12 is a circuit diagram exemplarily showing the configuration of the pulse detector shown in Fig. 6;

The meaning of the terms described herein should be understood as follows.

The word " first, "" second," and the like, used to distinguish one element from another, are to be understood to include plural representations unless the context clearly dictates otherwise. The scope of the right should not be limited by these terms.

It should be understood that the terms "comprises" or "having" does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or combinations thereof.

It should be understood that the term "at least one" includes all possible combinations from one or more related items. For example, the meaning of "at least one of the first item, the second item and the third item" means not only the first item, the second item or the third item, but also the second item and the second item among the first item, Means any combination of items that can be presented from more than one.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 is a block diagram schematically illustrating a configuration of a plasma generating apparatus according to an embodiment of the present invention. 2, a plasma generating apparatus 200 according to an exemplary embodiment of the present invention includes a capacitor charging unit 210, a magnetic pulse compression tank 220, a magnetic switch control unit 230, a plasma reactor 240, And a pulse detector (250). Hereinafter, for convenience of explanation, the current and the current signals are used in the same meaning and the voltage and voltage signals are used in the same meaning. Therefore, in the following description, current and current signals are used in combination, and a voltage and a voltage signal are used in combination.

First, the capacitor charging unit 210 charges the capacitor by transmitting energy to the capacitor included in the magnetic pulse compression tank 220.

The magnetic pulse compression tank 220 compresses the energy output from the capacitor charging unit 210 by using a magnetic switch to generate a pulse signal having a pulse of a nanosecond size (for example, an output current signal, hereinafter, Output. In one embodiment, the magnetic pulse compression tank 220 includes a first magnetic switch for transferring the energy stored in the first capacitor to the second capacitor, and a second magnetic switch for transferring the energy charged in the second capacitor to an output current having a nanosecond- And a second magnetic switch for outputting the second magnetic switch.

The magnetic switch control unit 230 controls the magnetic switch included in the magnetic pulse compression tank 220 to maximize the energy transfer efficiency to the plasma reactor 240. In one embodiment, the magnetic switch control unit 230 includes a first magnetic switch control unit for controlling the first magnetic switch and a second magnetic switch control unit for controlling the second magnetic switch.

In one embodiment, the magnetic switch control unit 230 can control the magnetic switch by using the rise time and the fall time of the pulses detected from the pulse detector 250.

The plasma reactor 240 generates plasma by applying an output current delivered from the magnetic pulse compression tank 220 between the discharge electrode and the discharge electrode included therein.

The specific configuration and operation mechanism of the capacitor charging unit 210, the magnetic pulse compression tank 220, the magnetic switch control unit 230, and the plasma reactor 240 will be described in more detail with reference to FIGS. 3 to 5 do.

3 is a circuit diagram specifically showing the configuration of the capacitor charging unit 210, the magnetic pulse compression tank 220, the magnetic switch control unit 230, and the plasma reactor 240 shown in FIG. 2. FIG. 5A to 5E are views for explaining the operation mechanism of the plasma generating apparatus 200 in the period T1 to the period T5 shown in FIG. 4. FIG.

(1) T1 section

When the output current iCL flows to the energy storage capacitor CL by the switching operation of the capacitor charging unit 210 and the energy is charged by the predetermined set voltage VCL, the capacitor charging unit 210 stops the switching operation, iCL) will no longer flow.

(2) T2 section

When the energy storage capacitor CL is charged with energy and then the pulse switch Psw is turned on, the energy stored in the energy storage capacitor CL is charged to the transformer secondary side first capacitor C1 through the pulse switch Psw do. That is, the first capacitor C1 is charged by the first current i1 until the first magnetic switch MS1 is saturated.

(3) T3 section

When the first magnetic switch MS1 is saturated by the first control current i2 'of the first magnetic switch control unit 232, the second capacitor C2 is connected to the first capacitor MS1 via the first magnetic switch MS1 C1.

(4) T4 section

The second magnetic switch MS2 is saturated by the second control current iout 'of the second magnetic switch control unit 234 and the second control current iout' is supplied to the second capacitor C2 at the moment the charging of the second capacitor C2 is completed The charged energy is discharged through the second magnetic switch MS2 in the plasma reactor 240, C3. Here, since the saturation inductance of the second magnetic switch MS2 is set to be much smaller than the saturation inductance of the first magnetic switch MS1, the second capacitor C2 can be charged much faster than the first capacitor C1 have. Also, the capacitances of the two capacitors have the same value so that the first capacitor C1 can be completely discharged when the second capacitor C2 is fully charged.

(5) T5 section

Surplus energy remaining in the plasma reactor 240, C3 is discharged through the discharge resistor RR and the discharge inductor LR. According to an embodiment of the present invention, the T5 section may be included and controlled in the T1 section. Since the pulse width of the output current iout supplied to the plasma reactors 2430 and C3 is very short, the switching timing of the pulse switch Psw, the first magnetic switch MS1, and the second magnetic switch MS2 is It is very difficult to control properly.

Therefore, according to the present invention, the first current i1 flowing through the first capacitor C1, the second current i2 flowing through the second capacitor C2, and the second current i2 flowing through the pulse detector 250 shown in Fig. And the pulse of the output current iout flowing to the plasma reactor 240, C3. Thereafter, the switching timing of the pulse switch Psw, the first magnetic switch MS1, and the second magnetic switch MS2 is controlled by using the rise time tr and the fall time tf of each detected pulse.

In one embodiment, the magnetic switch control unit 230 determines a falling time of a pulse (hereinafter, referred to as a 'first pulse') detected in the first current i1 and a falling time of a pulse (Hereinafter referred to as " output pulse ") of the first pulse coincide with the rise time of the second pulse and the rise time of the pulse detected at the output current It is possible to control the switching timing of the magnetic switch MS1 and the second magnetic switch MS2.

More specifically, the magnetic switch controller 230 controls the pulse width between the rising time of the first pulse and the rising time of the second pulse (hereinafter referred to as the 'first pulse width') and the rising time of the second pulse (Hereinafter referred to as a second pulse width) between the rising times of the output pulses.

When the first pulse width is smaller than the first pulse width lower limit command value, the first switch control unit 230 determines that the first control current i2 'flowing through the first magnetic switch MS1 is smaller than the first control current instruction value iref2' , The first control current command value iref2 'of the first magnetic switch MS1 is decreased by the current value corresponding to the time earlier than the fall time lower limit command value of the first pulse.

If the first pulse width is larger than the first pulse width upper limit command value, the first control current i2 'flowing through the first magnetic switch MS1 is smaller than the first control current instruction value iref2' , The first control current command value iref2 'of the first magnetic switch MS1 is increased by the current value corresponding to the time lag behind the fall time upper limit command value of the first pulse.

If the second pulse width is smaller than the second pulse width lower limit value, the second control current iout 'flowing through the second magnetic switch MS2 is smaller than the second control current instruction value irefout '), The second control current command value irefout' of the second magnetic switch MS2 is increased by a current value corresponding to a time earlier than the fall time lower limit command value of the second pulse.

If the second pulse width is larger than the second pulse width upper limit command value, the second control current iout 'flowing to the second magnetic switch MS2 is smaller than the second control current instruction value irefout' ), The second control current command value irefout 'of the second magnetic switch MS2 is reduced by the current value corresponding to the time earlier than the fall time upper limit command value of the second pulse.

Here, increasing / decreasing the first control current command value iref2 'in the first magnetic switch MS1 and the second control current instruction value irefout' in the second magnetic switch MS2 inversely increases / This is because the power source in the switch control unit 232 and the power source in the second magnetic switch control unit 234 are coupled to each other in the reverse direction to provide a control current.

Referring again to FIG. 2, the pulse detector 250 includes a first capacitor (not shown) for controlling the switching timing of the pulse switch Psw, the first magnetic switch MS1, and the second magnetic switch MS2, The first current i1 flowing through the first capacitor C1 and the second current i2 flowing through the second capacitor C2 and the output current iout flowing through the plasma reactor 240 and C3 are detected. Further, the pulse detector 250 transmits the detected pulse to the magnetic switch control unit 230.

Since the first current i1, the second current i2 and the output current iout are damped a plurality of times as shown in FIG. 1, the pulse detector 250 according to the present invention generates pulses Only the first pulse (hereinafter referred to as a 'target pulse') among the pulses generated during the time period in which the switch is kept on is detected.

Hereinafter, the configuration of the pulse detector according to the present invention will be described more specifically with reference to FIG.

FIG. 6 is a block diagram schematically illustrating the configuration of a pulse detector according to an embodiment of the present invention. Referring to FIG. 6, the pulse detector 250 according to an embodiment of the present invention includes a current-voltage converting unit 610, a voltage dividing unit 620, a comparing unit 630, a first signal inverting unit 640 A pulse delay unit 650, a pulse discharger 660, a second signal inverting unit 670, and an optical signal converting unit 680.

First, the current-voltage converting unit 610 converts the first current i1, the second current i2, and the output current iout into voltage signals. In one embodiment, when the maximum size of the first current i1, the second current i2, and the output current iout is 10KA and the minimum width is 500nsec, the current- 1 ratio of current transformers (CT), and according to this embodiment, each current is converted into a voltage signal having a maximum amplitude of 100 V and a minimum width of 500 nsec.

The voltage divider 620 converts the voltage signal converted by the current-voltage converter 610 into a voltage signal of a size that can be processed by the comparator 630. In one embodiment, in order to cause the comparison unit 630 to input a signal that only reduces the magnitude of the voltage signal output from the current-voltage conversion unit 610 without distortion of the current waveform, A voltage dividing circuit composed of a resistor as shown or a voltage dividing circuit composed of a capacitor as shown in FIG. 7B.

According to this embodiment, the resistor shown in Fig. 7A or the capacitor shown in Fig. 7B can withstand a voltage withstand voltage and can be realized as an element having a value without impedance change even at a high frequency of 1 MHz or more. In the case of a device that does not satisfy these conditions, the device may be destroyed when a high voltage signal of 100 V is applied. When a pulse signal having a width of 500 nsec is applied, the waveform distortion and the voltage The partial pressure ratio may be distorted.

In the above-described embodiment, the first current i1, the second current i2, and the output current iout are converted into voltage signals, and the magnitude of the voltage signals is reduced and input to the comparator 630 In the modified embodiment, the first current i1, the second current i2, and the output current iout may be directly input to the comparator 630 without being converted into the voltage signal. According to this embodiment, the current-voltage converting unit 610 and the voltage dividing unit 620 may be omitted.

Hereinafter, for convenience of description, signals output from the voltage division unit 610 will be defined as input signals.

Referring again to FIG. 6, the comparator 630 compares the input signal output from the voltage divider 610 with a reference signal, and outputs the comparison result in the form of a square wave. Specifically, the comparator 630 compares the input signal with the reference signal and outputs a high level when the input signal is greater than the reference signal and outputs a low level when the input signal is larger than the reference signal So that the comparison result between the input signal and the reference signal is outputted in the form of a square wave.

The comparator 630 may be implemented as a comparator, wherein the input signal is input to the non-inverting input terminal of the comparator and the reference signal is input to the inverting input terminal of the comparator.

The first signal inverting unit 640 serves to invert the square wave output from the comparing unit 630. In one embodiment, the first signal inverting unit 640 may be implemented as a Not Gate.

Next, the pulse delay unit 650 outputs a control signal for controlling the operation of the pulse discharger 660 by using the rising edge of the target pulse in the square wave inverted by the first signal inverter 640 .

To this end, the pulse delay unit 650 detects the rising edge of the target pulse in the square wave inverted by the first signal inverting unit 640. In one embodiment, the target pulse means the first generated pulse of the plurality of pulses generated during the time that the pulse switch Psw included in the magnetic pulse compression tank 220 shown in FIG. 3 is kept on. do.

When the rising edge of the target pulse is detected, the pulse delay unit 650 outputs a control signal having a high level to hold the pulse discharger 660 in the ON state for a predetermined time, And outputs a control signal having a low level to keep the entire portion 660 in an off state.

In one embodiment, such a pulse delay unit 650 may include a bistable multivibrator as shown in FIG. 8A, and according to this embodiment, the predetermined time during which the high level of the control signal is output is bistable It is set by Rx and Cx included in the multivibrator.

That is, as shown in FIG. 8B, when the signal of the (1) form is input to the first signal inverting unit 640 and the signal of the (2) form is outputted from the first signal inverting unit 640 , The pulse delay unit 650 detects the rising edge of the target pulse in the signal of the (2) type and outputs a control signal of a high level for a predetermined time after the rising edge of the target pulse is detected.

Referring again to FIG. 6, the pulse discharger 660 discharges the signal output from the comparator 630 to the ground through the on / off operation or inputs the signal to the first signal inverter 640.

More specifically, the pulse discharger 660 is turned on when a control signal having a high level is input from the pulse delay unit 650 and grounds the output terminal of the comparator 630 so that the output signal of the comparator 630 is Discharge. The pulse discharger 660 is turned off when a control signal having a low level is input from the pulse delay unit 650 so that the output terminal of the comparator 630 is connected to the first signal inverting unit 640 So that the output of the comparator 630 is input to the first signal inverting unit 640.

Accordingly, only the target pulse among the plurality of pulses included in the signal output from the comparison unit 630 is input to the first signal inverting unit 640, and all remaining pulses except for the target pulse are discharged, Is detected.

In one embodiment, such a pulse discharger 660 may include a transistor. According to this embodiment, the control signal generated by the pulse delay unit 650 becomes a gate control signal applied to the gate of the transistor included in the pulse discharger 660.

Next, the second signal inverting unit 670 inverts the signal output from the first signal inverting unit 660 again to generate a final output signal. In one embodiment, the function of the second signal inverting unit 670 may be selectively performed since the function of the second signal inverting unit 670 may be performed in the optical signal converting unit 680 or the host controller.

The operation of the comparator 630, the first signal inverting unit 640, the pulse delay unit 650, the pulse discharger 660, and the second signal inverting unit 670 as described above is shown in Fig. 9 Will be described in more detail with reference to the waveform diagram of Fig. In the following description, it is assumed that the input signal and the reference signal are as shown in FIG. 9A. 9A shows a waveform of an input signal and a reference signal input to the comparator 630, FIG. 9B shows a waveform of a signal generated by the comparator 630, FIG. 9C shows a waveform of a signal generated by the first signal inverter 640, 9D shows the waveform of the output signal of the first signal inverting unit 640, FIG. 9E shows the waveform of the control signal output from the pulse delaying unit 650, and FIG. 9G shows a waveform of a signal to be discharged through the second signal inverting unit 670. The waveform of the signal discharged through the second signal inverting unit 670 is shown in Fig.

9A, the comparator 630 outputs a high level signal as shown in FIG. 9B because the input signal is larger than the reference signal in the P1 section. Since the pulse discharger 660 is off, the output signal of the comparator 630 is input to the first signal inverting unit 640, as shown in FIG. 9C, And is inverted by the signal inverting unit 640.

At this time, the pulse delay unit 650 detects the rising edge 900 of the pulse shown in FIG. 9D. When the rising edge is detected, as shown in FIG. 9E, And outputs a control signal. 9E, when the pulse discharger 660 is turned on according to the control signal as shown in FIG. 9E, the comparator 630 outputs the high level control signal during the period from P2 to P5, The signals are all discharged through the pulse discharging unit 660 and are not inputted to the first signal inverting unit 640.

9D is input to the second signal inverting unit 670. As a result, a signal having a waveform as shown in FIG. 9G is output from the second signal inverting unit 670 do.

As described above, the pulse detector 250 according to the present invention eliminates the pulses except for the pulse originally generated from the continuously generated input signal by using the pulse delay unit 650 and the pulse discharge unit 660, Only the target pulse which is a pulse is detected.

6, the optical signal converting unit 680 converts the final output signal output from the second signal inverting unit 670 into an optical signal, and transmits the optical signal to the host controller. At this time, the host controller may be the magnetic switch controller 230 as shown in FIG.

Hereinafter, an example of the optical signal converter 680 will be described in detail with reference to FIG.

FIG. 10 is a diagram illustrating a circuit configuration of an optical signal converter 680 according to an embodiment of the present invention. Referring to FIG. 10, the optical signal converting unit 680 is connected to a light receiving unit 684 included in the host controller through the optical cable 682. [

The optical signal converting unit 680 includes a U1 element and a PH1 element as shown in FIG.

The U1 element reduces the distortion of the target pulse due to the external electrical noise and prevents an erroneous output from occurring by using the AND logic gate. The logic gate configuration applied to the U1 device is shown in FIG. As shown in Fig. 11, the first terminal 1A and the sixth terminal 1B of the U1 element are always kept at the "High" state at 5 V, 1Y) can be inverted from the "High" signal to the "Low" signal. With this configuration, the probability of a circuit malfunction due to the distortion of only one target pulse of the U1 element can be greatly reduced.

Next, the PH1 element is constituted by a photodiode element by converting a target pulse in the form of an electrical signal into an optical signal. Since the PH1 device requires a driving current for generating light, a power source to which a driving voltage (5V) is applied is connected in series with the resistance device R2. The light generation intensity can be adjusted according to the size of the resistance element R2. As the length of the optical cable 682 shown in FIG. 10 is increased, the value of the resistance element R2 is decreased and the driving current is increased to increase the light generation intensity. Therefore, it is necessary to appropriately select the value of the resistance element R2 in order to prevent the light from being generated, or the light generation intensity to be lowered to cause the delay of the output signal.

The operation of the optical signal converting unit 680 shown in FIG. 10 will be briefly described below. Since the output terminal of the U1 element is connected to the terminal No. 1 and the terminals No. 2, 6 and 7 of the PH1 element are connected together, if the output of the U1 is in the "High" state, ) Flows into the photodiode of the PH1 element, so that the optical output becomes the "Low" state. Conversely, when the output of the U1 element is in the "Low" state, the input current of the PH1 element connected to the 5V power supply and the resistor element R2 flows to the output side ground terminal (GND) of the U1 element, Quot; High "state.

Meanwhile, the optical cable 682 shown in FIG. 10 may be made of glass fiber to prevent interference with external electrical noise and to prevent signal delay.

The optical receiving unit 684 included in the host controller can be located at an input terminal of the host controller and performs a role of converting a target pulse in the form of an optical signal transmitted from the optical cable 682 into an electrical signal.

As described above, according to the present invention, the target pulse is converted into an optical signal through the optical signal converting unit 680 and transmitted, thereby preventing the waveform distortion caused by the high-voltage conduction noise and the external noise. .

6, the pulse detector according to the present invention may further include a reference signal generator 690.

The reference signal generator 690 generates a reference signal corresponding to the first current i1, the second current i2 and the output current iout as a voltage signal and outputs the generated reference signal to the comparator 630 ). Since the reference signals required for the first current i1, the second current i2, and the output current iout are different from each other, the reference signal generator 690 generates a reference signal having a different magnitude for each current And may be supplied to the comparison unit 630. [

In one embodiment, the reference signal generator 690 may be implemented as a voltage dividing circuit implemented by a resistance element, and may vary the magnitude of the reference signal by dividing the reference potential input from the outside according to the value of the resistance element.

In one embodiment, the pulse detector 250 having the above-described configuration can be implemented with a circuit configuration as shown in FIG.

In FIG. 12, drawing numbers 1003 and 1004 are resistances for limiting the values of the input signal and the reference signal. The drawing numbers 1001 and 1002 denote the resistors constituting the reference signal generator 690. The reference voltages inputted from the outside are varied by using the division ratios according to the resistance values so that the reference signals having different sizes are output .

The drawing number 1005 is a comparator constituting the comparator 630, and outputs 'HIGH' when the input signal is larger than the reference signal, and outputs 'LOW' when the input signal is greater than the reference signal. The drawing number 1006 is a pull-up resistor to ensure that the HIGH output of the comparator 1005 is maintained.

The drawing number 3001 inverts the output of the comparator 1005 as a NOT gate constituting the first signal inverting unit 640. The drawing number 3006 is a jumper that connects the comparator 1005 and the pulse delay unit 650, and connects or disconnects the pulse delay unit 650 according to a user's request.

The drawing number 3005 is a resistor for limiting an input signal of the bistable multivibrator 3002, and the output times of the bistable multivibrator 3002 are controlled by the rate of application of the elements 3004 and 3003 as capacitors and resistors, respectively. The drawing number 3002 is a bistable multi-vibrator that outputs a gate signal for operation of the pulse discharger 660 for a predetermined time.

The figure number 2001 is a switching element constituting the pulse discharger 660 and is composed of a transistor or FET. The figure number 2002 is a resistor for generating a driving current of the switching element, the figure 2003 is a resistor for maintaining the bias of the switching element, and 2004 is a capacitor for preventing malfunction due to chattering of the switching element. The drawing number 2005 is a resistance for limiting the conduction current of the switching element.

The drawing number 4001 is a NOT gate constituting the second signal inverting unit 670 and is an element for inverting a signal output from the first signal inverting unit 640 to generate a final output signal. As described above, the NOT gate constituting the second signal inverting unit 670 can be omitted according to the request of the host controller. The drawing number 4002 allows the final output signal to be outputted as it is as an AND gate, or the output signal is generated by interlocking the external trigger signal with the final output signal. The drawing number 4003 is an AND gate input signal jumper for selecting whether to output the final output signal as it is, or whether to connect the external trigger signal with the final output signal.

Those skilled in the art will appreciate that the invention described above may be embodied in other specific forms without departing from the spirit or essential characteristics thereof.

For example, in the above-described embodiment, the signal inputted to the pulse detector is one of the first current, the second current, and the output current in the plasma generator. However, the present invention is not limited to this, Any signal including a plurality of pulses may be applied regardless of the signal. For example, if a particular input signal is mixed with noise due to sparks, the above-described pulse detector may be used to detect only pulses caused by sparks in the input signal.

In the above-described embodiment, the pulse detector is described as being included in the plasma generator. However, in a modified embodiment, the pulse detector may be implemented as a separate device physically separated from the plasma generator.

It is therefore to be understood that the above-described embodiments are illustrative in all aspects and not restrictive. The scope of the present invention is defined by the appended claims rather than the detailed description and all changes or modifications derived from the meaning and scope of the claims and their equivalents are to be construed as being included within the scope of the present invention do.

200: Plasma generator 210: Capacitor charging part
220: magnetic pulse compression tank 230: magnetic switch control unit
240: plasma reactor 250: pulse detector
610: current-voltage conversion unit 620:
630: comparing unit 640: first signal inverting unit
650: Pulse delay unit 660: Pulse discharge unit
670: second signal inverting unit 680: optical signal converting unit
690: Reference signal generator

Claims (7)

A magnetic pulse compression tank including a first magnetic switch for transferring the energy charged in the first capacitor to the second capacitor and a second magnetic switch for outputting the energy charged in the second capacitor as a pulse signal;
A plasma reactor for generating a plasma using the pulse signal; And
And an input signal including at least one of the pulse signal, the first current signal flowing to the first capacitor, and the second current signal flowing to the second capacitor, with a reference signal, And a pulse detector for detecting the target pulse by discharging other pulses except for the target pulse among the plurality of pulses included. The method according to claim 1,
The pulse detector comprises:
A comparison unit for outputting a comparison result between the input signal and the reference signal to the square wave;
A signal inverting unit for inverting the square wave;
A pulse discharging unit for causing the target pulse to be outputted from among the plurality of pulses when turned off and connecting the output terminal of the comparing unit to ground when the pulse is turned on; And
Wherein when the rising edge of the target pulse is detected in the square wave inverted by the signal inverting unit, the pulse discharge unit is maintained in the ON state for a predetermined time, and the pulse discharge unit is turned off And a pulse delay unit for outputting a control signal for maintaining the control signal. The method according to claim 1,
The pulse detector comprises:
And an optical signal converter for converting the detected target pulse into an optical signal and transmitting the optical signal to an upper controller. The method according to claim 1,
A first magnetic switch control unit for controlling the first magnetic switch by using a width between a target pulse detected in the first current signal and a target pulse detected in a second current signal;
Further comprising a second magnetic switch control unit for controlling the second magnetic switch using a width between a target pulse detected in the second current signal and a target pulse detected in the pulse signal. A comparator for outputting a comparison result between the input signal and the reference signal as a rectangular wave by outputting a high level if the input signal is larger than the reference signal and outputting a low level when the input signal is not larger than the reference signal;
A signal inverting unit for inverting the square wave;
When the pulse is turned off, a target pulse is outputted from among a plurality of pulses included in a predetermined section of the rectangular wave. When the pulse is turned on, the output terminal of the comparator is grounded and pulses excluding the target pulse, A pulse discharger for discharging the target pulse to detect the target pulse; And
And outputs a control signal having a high level to maintain the pulse discharger in an ON state for a predetermined time when a rising edge of the target pulse is detected in a square wave inverted by the signal inverting unit, And a pulse delay unit for outputting a control signal having a low level in order to maintain the pulse discharge unit in an off state during the excluded time. 6. The method of claim 5,
Wherein the input signal comprises a first current signal flowing in a first capacitor of a plasma generation system generating a low temperature plasma, a second current signal flowing in a second capacitor of the plasma generation system, and a second current signal flowing into a plasma reactor of the plasma generation system 3 < / RTI > current signal. The method according to claim 6,
A current-voltage converter converting the first current signal, the second current signal, and the third current signal into a first voltage signal, a second voltage signal, and a third voltage signal, respectively; And
And converting the first voltage signal, the second voltage signal, and the third voltage signal into a fourth voltage signal, a fifth voltage signal, and a sixth voltage signal that are voltages that can be processed by the comparator through voltage division, Further comprising: a voltage dividing unit for dividing the pulse signal into a first voltage and a second voltage;

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