KR101463028B1 - Method of fabricating oxide thin film transistor - Google Patents

Abstract

The method for fabricating an oxide thin film transistor according to the present invention is characterized in that when a thin film transistor is fabricated by using an amorphous zinc oxide (ZnO) based semiconductor as an active layer, a diffraction mask having a diffraction pattern applied to a source / The method comprising: forming a gate electrode on a substrate in order to reduce a number of masks and to reduce a manufacturing process and a cost by preventing a change in a carrier concentration of a channel layer due to plasma in a later process; Forming a gate insulating layer on the entire surface of the substrate on which the gate electrode is formed; Forming an amorphous zinc oxide based semiconductor layer and an insulating layer over the entire surface of the substrate on which the gate insulating layer is formed; Forming a first photoresist pattern of a first thickness and a second photoresist pattern and a third photoresist pattern of a second thickness on the substrate using a diffraction mask having a diffraction pattern applied to a source / drain region of the active layer; Selectively patterning the amorphous zinc oxide based semiconductor layer using the first photoresist pattern to the third photoresist pattern as a mask to form an active layer made of amorphous zinc oxide based semiconductor on the gate electrode; Removing the second photoresist pattern and the third photoresist pattern and removing a portion of the thickness of the first photoresist pattern to form a fourth photoresist pattern having a third thickness; Forming a channel protection layer on the channel region of the active layer by selectively patterning the insulating layer using the fourth photoresist pattern as a mask; And forming a source electrode and a drain electrode electrically connected to the source region and the drain region on the active layer.

Oxide thin film transistor, amorphous zinc oxide system, diffraction mask, channel protection layer

Description

TECHNICAL FIELD [0001] The present invention relates to an oxide thin film transistor,

The present invention relates to a method of manufacturing an oxide thin film transistor, and more particularly, to a method of manufacturing an oxide thin film transistor using an amorphous zinc oxide based semiconductor as an active layer.

Recently, interest in information display has increased, and a demand for using portable information media has increased, and a light-weight flat panel display (FPD) that replaces a cathode ray tube (CRT) And research and commercialization are being carried out. Particularly, among such flat panel display devices, a liquid crystal display (LCD) is an apparatus for displaying an image using the optical anisotropy of a liquid crystal, and is excellent in resolution, color display and picture quality and is actively applied to a notebook or a desktop monitor have.

The liquid crystal display comprises a color filter substrate, an array substrate, and a liquid crystal layer formed between the color filter substrate and the array substrate.

An active matrix (AM) method, which is a driving method mainly used in the liquid crystal display, is a method of driving a liquid crystal of a pixel portion by using an amorphous silicon thin film transistor (a-Si TFT) to be.

Hereinafter, the structure of a typical liquid crystal display device will be described in detail with reference to FIG.

1 is an exploded perspective view schematically showing a general liquid crystal display device.

As shown in the figure, the liquid crystal display comprises a color filter substrate 5, an array substrate 10, and a liquid crystal layer (not shown) formed between the color filter substrate 5 and the array substrate 10 30).

The color filter substrate 5 includes a color filter C composed of a plurality of sub-color filters 7 implementing colors of red (R), green (G) and blue (B) A black matrix 6 for separating the sub-color filters 7 from each other and shielding light transmitted through the liquid crystal layer 30 and a transparent common electrode for applying a voltage to the liquid crystal layer 30 8).

The array substrate 10 includes a plurality of gate lines 16 and data lines 17 arranged vertically and horizontally to define a plurality of pixel regions P and a plurality of gate lines 16 and data lines 17 A thin film transistor T which is a switching element formed in the intersection region and a pixel electrode 18 formed on the pixel region P. [

The color filter substrate 5 and the array substrate 10 are bonded together to face each other by a sealant (not shown) formed on the periphery of the image display area to constitute a liquid crystal display panel. The color filter substrate 5 (Not shown) formed on the color filter substrate 5 or the array substrate 10 are bonded to each other.

However, since the liquid crystal display device is not a light emitting device but a light receiving device and has technical limitations such as brightness, contrast ratio, and viewing angle, the liquid crystal display device Development of a new display device capable of overcoming the disadvantages has been actively developed.

OLED (Organic Light Emitting Diode), which is one of the new flat panel display devices, has excellent viewing angle and contrast ratio compared to liquid crystal displays because it is a self-luminous type. Lightweight thin type can be used because it does not need backlight And is also advantageous in terms of power consumption. In addition, it has the advantage of being able to drive a DC low voltage and has a high response speed, and is particularly advantageous in terms of manufacturing cost.

In recent years, studies have been actively made on the enlargement of an organic electroluminescent display. In order to achieve this, development of a transistor ensuring stable operation and durability by securing a constant current characteristic as a driving transistor of an organic electroluminescent device is required.

The amorphous silicon thin film transistor used in the above-described liquid crystal display device can be manufactured in a low temperature process, but has a very small mobility and does not satisfy a constant current bias condition. On the other hand, the polycrystalline silicon thin film transistor has a high mobility and a satisfactory constant current test condition, but it is difficult to obtain a uniform characteristic, so it is difficult to make a large area and a high temperature process is required.

An object of the present invention is to provide a method of manufacturing an oxide thin film transistor using an amorphous zinc oxide-based semiconductor as an active layer.

It is another object of the present invention to provide a method of manufacturing an oxide thin film transistor in which a channel protective layer is formed without an additional mask process to prevent a change in carrier concentration of a channel layer due to a plasma gas as a post-process.

Other objects and features of the present invention will be described in the following description of the invention and claims.

According to an aspect of the present invention, there is provided a method of fabricating an oxide thin film transistor including: forming a gate electrode on a substrate; Forming a gate insulating layer on the entire surface of the substrate on which the gate electrode is formed; Forming an amorphous zinc oxide based semiconductor layer and an insulating layer over the entire surface of the substrate on which the gate insulating layer is formed; Forming a first photoresist pattern of a first thickness and a second photoresist pattern and a third photoresist pattern of a second thickness on the substrate using a diffraction mask having a diffraction pattern applied to a source / drain region of the active layer; Selectively patterning the amorphous zinc oxide based semiconductor layer using the first photoresist pattern to the third photoresist pattern as a mask to form an active layer made of amorphous zinc oxide based semiconductor on the gate electrode; Removing the second photoresist pattern and the third photoresist pattern and removing a portion of the thickness of the first photoresist pattern to form a fourth photoresist pattern having a third thickness; Forming a channel protection layer on the channel region of the active layer by selectively patterning the insulating layer using the fourth photoresist pattern as a mask; And forming a source electrode and a drain electrode electrically connected to the source region and the drain region on the active layer.

As described above, the method of manufacturing an oxide thin film transistor according to the present invention has an excellent uniformity due to the use of an amorphous zinc oxide-based semiconductor as an active layer, thereby providing an effect applicable to a large area display.

At this time, the amorphous zinc oxide-based semiconductor reacts with the plasma in a later process to change the carrier concentration of the channel layer. In the method of manufacturing an oxide thin film transistor according to the present invention, The channel protection layer is formed on the active layer simultaneously with the active layer, thereby reducing the number of masks and reducing the manufacturing process and cost.

Hereinafter, preferred embodiments of an oxide thin film transistor and a manufacturing method thereof according to the present invention will be described in detail with reference to the accompanying drawings.

FIG. 2 is a cross-sectional view schematically showing the structure of an oxide thin film transistor according to the present invention, and schematically shows the structure of an oxide thin film transistor using an amorphous zinc oxide-based semiconductor as an active layer.

The oxide thin film transistor according to the present invention includes a gate electrode 121 formed on a substrate 110, a gate insulating layer 115 formed on the gate electrode 121, a gate electrode 121, An active layer 124 formed of an amorphous zinc oxide based semiconductor and source / drain electrodes 122 and 123 electrically connected to a source / drain region of the active layer 124. The source /

At this time, since the oxide thin film transistor according to the present invention is formed using the amorphous zinc oxide-based semiconductor to form the active layer 124, it is possible to satisfy the high mobility and constant current test conditions, It has advantages.

The zinc oxide (ZnO) is a material that can realize all three properties of conductivity, semiconductivity, and resistance according to oxygen content. An oxide thin film transistor in which an amorphous zinc oxide based semiconductor material is applied as an active layer is a liquid crystal display device, Can be applied to a large area display including a light emitting display.

In recent years, a great deal of attention and activity have been concentrated on transparent electronic circuits. Since an oxide thin film transistor using the amorphous zinc oxide based semiconductor material as an active layer has high mobility and can be manufactured at a low temperature, There is an advantage that can be used.

In particular, the oxide thin film transistor according to the present invention is characterized in that an active layer is formed of a-IGZO semiconductor containing heavy metals such as indium (In) and gallium (Ga) in the ZnO.

The a-IGZO semiconductor is transparent because it can transmit visible light, and the oxide thin film transistor fabricated from the a-IGZO semiconductor has a mobility of 1 to 100 cm ² / Vs, and has a higher mobility characteristic than the amorphous silicon thin film transistor .

In addition, the a-IGZO semiconductor can produce UV light emitting diode (LED), white LED and other components having a wide band gap and high color purity and can be processed at a low temperature, It has the characteristics to produce.

Moreover, since the oxide thin film transistor fabricated from the a-IGZO semiconductor exhibits a uniform characteristic similar to that of an amorphous silicon thin film transistor, the structure of the oxide thin film transistor is as simple as an amorphous silicon thin film transistor and has advantages of being applicable to a large area display.

The oxide thin film transistor according to the present invention having such a characteristic is formed between the source electrode 122 and the drain electrode 123 above the channel region of the active layer 124 by using a channel protective layer 135 The channel protective layer 135 serves to prevent the carrier concentration of the channel layer from being changed by a plasma process in a later process.

That is, the a-IGZO semiconductor reacts with a plasma gas in a subsequent process to change the carrier concentration. Therefore, in order to solve such a problem, a channel protection layer 135 made of an insulating material is formed on the channel region of the active layer 124. In the present invention, a diffraction mask having a diffraction pattern applied to the source / (Hereinafter, referred to as a half-tone mask when referring to a diffraction mask), the active layer 124 and the channel protection layer 135 are simultaneously patterned to reduce the number of masks, thereby reducing the manufacturing process and cost This will be described in detail through the following method of manufacturing an oxide thin film transistor.

FIGS. 3A to 3C are cross-sectional views sequentially illustrating the manufacturing process of the oxide thin film transistor shown in FIG.

As shown in FIG. 3A, a predetermined gate electrode 121 is formed on a substrate 110 made of a transparent insulating material.

At this time, the amorphous zinc oxide-based composite semiconductor to be applied to the oxide thin film transistor of the present invention can be used for low-temperature deposition such as a plastic substrate and a soda lime glass. In addition, since the amorphous characteristics are exhibited, it is possible to use the substrate 110 for a large area display.

The gate electrode 121 is formed by depositing a first conductive film on the entire surface of the substrate 110 and selectively patterning the conductive film by a photolithography process (first mask process).

Here, the first conductive layer may be formed of one selected from the group consisting of aluminum (Al), aluminum alloy (Al alloy), tungsten (W), copper (Cu), nickel (Ni), chromium A low resistance opaque conductive material such as molybdenum (Mo), titanium (Ti), platinum (Pt), tantalum (Ta) The first conductive layer may be formed of an opaque conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), or the like. Or may be formed as a laminated multilayer structure.

Next, as shown in FIG. 3B, a gate insulating layer 115 is formed on the entire surface of the substrate 110 so as to cover the gate electrode 121.

After the amorphous zinc oxide based semiconductor layer and the predetermined insulating layer are formed on the entire surface of the substrate 110 on which the gate insulating layer 115 is formed, a diffraction mask (second mask process) according to an embodiment of the present invention is formed An active layer 124 made of the amorphous zinc oxide based semiconductor is formed on the gate electrode 121 and a channel protective layer 135 made of the insulating layer is formed on the active layer 124 .

In the second mask process, an active layer is first formed using a diffraction mask having a diffraction pattern applied to a source / drain region, and then a photoresist layer of the source / drain region is removed through an ashing process. The second mask process will be described in detail with reference to the drawings.

4A to 4F are cross-sectional views illustrating a second mask process according to the first embodiment of the present invention shown in FIG. 3B.

4A, an inorganic insulating film such as a silicon nitride film (SiNx), a silicon oxide film (SiO ₂ ), hafnium (Hf) oxide, aluminum oxide and the like are formed on the entire surface of the substrate 110 on which the gate electrode 121 is formed A gate insulating layer 115 made of the same high dielectric oxide film is formed.

At this time, the gate insulating layer 115 may be formed by chemical vapor deposition (CVD) or plasma enhanced chemical vapor deposition (PECVD).

The amorphous zinc oxide based semiconductor layer 120 is formed by depositing an amorphous zinc oxide based semiconductor on the entire surface of the substrate 110 on which the gate insulating layer 115 is formed. A predetermined insulating layer 130 made of an inorganic insulating film such as a silicon nitride film or a silicon oxide film is formed on the amorphous zinc oxide based semiconductor layer 120.

At this time, the amorphous zinc oxide based composite semiconductor, particularly a-IGZO semiconductor, is formed by a sputtering method using a composite target of gallium oxide (Ga ₂ O ₃ ), indium oxide (In ₂ O ₃ ) and zinc oxide (ZnO) Alternatively, a chemical vapor deposition method such as chemical vapor deposition or atomic layer deposition (ALD) may be used.

In the case of the first embodiment of the present invention, a composite oxide target having atomic ratios of gallium, indium and zinc of 1: 1: 1, 2: 2: 1, 3: 2: 1 and 4: 2: An amorphous zinc oxide based semiconductor layer 120 can be formed. In this case, when a complex oxide target having an atomic ratio of gallium, indium and zinc of 2: 2: 1 is used, the equivalent weight of gallium, indium, Ratio is about 2.8: 2.8: 1.

4B, a photoresist layer 170 made of a photosensitive material such as photoresist is formed on the entire surface of the substrate 110, and then the photoresist layer 170 is formed on the photoresist layer 170 through the diffraction mask 180 of the present invention. And selectively irradiates light.

At this time, the diffraction mask 180 is provided with a first transmission region I through which all the irradiated light is transmitted and a second transmission region II through which a diffraction pattern is applied to partially transmit only a part of light, And only the light transmitted through the diffraction mask 180 is irradiated to the photoresist layer 170. [0050]

4C, after the photoresist layer 170 is exposed through the diffraction mask 180, light is blocked through the blocking region III and the second transmissive region II, The first photosensitive film pattern 170a to the third photosensitive film pattern 170c having a predetermined thickness remain in the partially shielded area and the photosensitive film is completely removed in the first transmission region I through which all the light is transmitted, Thereby exposing the surface of the insulating layer 130.

The first photoresist pattern 170a formed in the blocking region III is thicker than the second photoresist pattern 170b and the third photoresist pattern 170c formed through the second transmissive region II. In addition, the photoresist layer is completely removed from the region through which the light is completely transmitted through the first transmissive region I because the positive type photoresist is used. The present invention is not limited to this, May be used.

Particularly, in the case of the present invention, the second transmission region II of the diffraction mask of the present invention is applied to the source region and the drain region of the active layer to be patterned later, and the blocking region III is formed in the channel region of the active layer Is applied.

Next, as shown in FIG. 4D, using the first photoresist pattern 170a to the third photoresist pattern 170c formed as described above as a mask, the amorphous zinc oxide-based semiconductor layer and the insulating layer formed thereunder are selectively The active layer 124 made of the amorphous zinc oxide-based semiconductor is formed on the gate electrode 121 of the substrate 110. At this time, the insulating layer pattern 130 ', which is formed of the insulating layer and is substantially the same as the active layer 124, is formed on the active layer 124.

As shown in FIG. 4E, when the ashing process for removing a portion of the first photoresist pattern 170a through the third photoresist pattern 170c is performed, the second photoresist pattern 170a, The pattern and the third photoresist pattern are completely removed.

At this time, the first photoresist pattern is a fourth photoresist pattern 170a 'that is removed by the thickness of the second photoresist pattern and the third photoresist pattern, and remains only in the channel region corresponding to the blocking region III.

4F, a part of the insulating film pattern is selectively removed using the remaining fourth photoresist pattern 170a 'as a mask, thereby forming a channel protection layer (not shown) made of the insulating layer on the substrate 110 135 are formed.

As described above, in the first embodiment of the present invention, the active layer and the channel protective layer are formed through a single mask process using a diffraction mask having a diffraction pattern applied to the source / drain regions, thereby forming a channel layer It is possible to prevent a change in carrier concentration.

Next, as shown in FIG. 3C, a second conductive layer is formed on the entire surface of the substrate 110 on which the active layer 124 and the channel protective layer 135 are formed.

The second conductive layer may be formed of a low resistance opaque conductive material such as aluminum, aluminum alloy, tungsten, copper, nickel, chromium, molybdenum, titanium, platinum or tantalum to form a source electrode and a drain electrode. The second conductive layer may be formed of an opaque conductive material such as indium-tin-oxide or indium-zinc-oxide, and may be formed of a multilayer structure in which two or more conductive materials are stacked.

The source electrode 122 and the drain electrode 123 are electrically connected to the source region and the drain region of the active layer 124 by selectively patterning the second conductive film through a photolithography process (a third mask process) .

Meanwhile, a photosensitive organic material such as polyvinyl alcohol (PVA), polyvinyl pyrrolidone (PVP), photo acryl, or the like is used as the insulating layer forming the channel protective layer. Or the like is used, the process is simplified by using the organic material itself as a photoresist, which will be described in detail through the following second embodiment of the present invention.

5A to 5E are cross-sectional views illustrating a second mask process according to a second embodiment of the present invention.

An inorganic insulating layer such as a silicon nitride layer or a silicon oxide layer or a gate insulating layer 215 formed of a high dielectric oxide layer such as hafnium oxide or aluminum oxide may be formed on the entire surface of the substrate 210 on which the gate electrode 221 is formed, .

The amorphous zinc oxide based semiconductor layer 220 is formed by depositing an amorphous zinc oxide based semiconductor on the entire surface of the substrate 210 on which the gate insulating layer 215 is formed. A predetermined insulating layer 230 made of an organic material such as polyvinyl alcohol, polyvinyl pyrrolidone, or photoacryl is formed on the amorphous zinc oxide based semiconductor layer 220.

At this time, the amorphous zinc oxide-based composite semiconductor, particularly a-IGZO semiconductor, may be formed by a sputtering method using a composite target of gallium oxide, indium oxide and zinc oxide. In addition, the amorphous zinc oxide based composite semiconductor may be formed by chemical vapor deposition It is also possible to use a deposition method.

As shown in FIG. 5B, light is selectively irradiated through a diffraction mask 280 of the present invention to a predetermined insulating layer 230 made of an organic material having photosensitivity.

In this case, as described above, the diffraction mask 280 is provided with a first transmission region I for transmitting all the irradiated light and a second transmission region II for transmitting only a part of light and blocking a part of the light by applying a diffraction pattern, And only the light transmitted through the diffraction mask 280 is irradiated to the insulating layer 230. The light emitted from the diffraction mask 280 is incident on the insulating layer 230,

Then, after the insulating layer 230 exposed through the diffraction mask 280 is developed, light is blocked through the blocking region III and the second transmitting region II, as shown in FIG. 5C. The first insulating layer pattern 270a to the third insulating layer pattern 270c are left in the region where the light is blocked or only partially blocked, and the insulating layer is completely removed in the first light transmitting region I, The surface of the amorphous zinc oxide based semiconductor layer 220 is exposed.

At this time, the first insulating layer pattern 270a formed in the blocking region III is formed thicker than the second insulating layer pattern 270b formed through the second transmitting region II and the third insulating layer pattern 270c. In addition, the insulating layer is completely removed in the region through which the light is completely transmitted through the first transmission region I because the positive type photoresist is used, and the present invention is not limited to this, A resist may be used.

Particularly, in the case of the present invention, the second transmission region II of the diffraction mask of the present invention is applied to the source region and the drain region of the active layer to be patterned later, and the blocking region III is formed in the channel region of the active layer Is applied.

Next, as shown in FIG. 5D, using the first insulating film pattern 270a to the third insulating film pattern 270c formed as described above as a mask, the amorphous zinc oxide based semiconductor layer formed thereunder is selectively removed An active layer 224 made of the amorphous zinc oxide based semiconductor is formed on the gate electrode 221 of the substrate 210.

5E, when the ashing process for removing a portion of the first insulating layer pattern 270a to the third insulating layer pattern 270c is performed, The pattern and the third insulating film pattern are completely removed.

At this time, the first insulating film pattern is left in the channel region corresponding to the blocking region III as the channel protective layer 235 removed by the thickness of the second insulating film pattern and the third insulating film pattern.

As described above, the present invention can be applied not only to liquid crystal display devices but also to other display devices manufactured using thin film transistors, for example, organic electroluminescent display devices in which organic electroluminescent devices are connected to driving transistors.

Further, the present invention has an advantage that it can be used in a transparent electronic circuit or a flexible display by applying an amorphous zinc oxide-based semiconductor material having high mobility and being processable at a low temperature as an active layer.

While a great many are described in the foregoing description, it should be construed as an example of preferred embodiments rather than limiting the scope of the invention. Therefore, the invention should not be construed as limited to the embodiments described, but should be determined by equivalents to the appended claims and the claims.

1 is an exploded perspective view schematically showing a general liquid crystal display device.

2 is a cross-sectional view schematically showing the structure of an oxide thin film transistor according to the present invention.

FIGS. 3A to 3C are cross-sectional views sequentially showing the manufacturing process of the oxide thin film transistor shown in FIG. 2. FIG.

4A to 4F are cross-sectional views illustrating a second mask process according to the first embodiment of the present invention.

5A to 5E are cross-sectional views illustrating a second mask process according to a second embodiment of the present invention.

DESCRIPTION OF REFERENCE NUMERALS

110, 210: array substrate 121, 221: gate electrode

122, 222: source electrode 123, 223: drain electrode

124,224 active layer 135,235 channel protective layer

Claims (11)

Forming a gate electrode on the substrate; Forming a gate insulating layer on the entire surface of the substrate on which the gate electrode is formed; Forming an amorphous zinc oxide based semiconductor layer and an insulating layer over the entire surface of the substrate on which the gate insulating layer is formed; Forming a first photoresist pattern of a first thickness and a second photoresist pattern and a third photoresist pattern of a second thickness on the substrate using a diffraction mask having a diffraction pattern applied to a source / drain region of the active layer; Selectively patterning the amorphous zinc oxide based semiconductor layer using the first photoresist pattern to the third photoresist pattern as a mask to form an active layer made of amorphous zinc oxide based semiconductor on the gate electrode; Removing the second photoresist pattern and the third photoresist pattern and removing a portion of the thickness of the first photoresist pattern to form a fourth photoresist pattern having a third thickness; Forming a channel protection layer on the channel region of the active layer by selectively patterning the insulating layer using the fourth photoresist pattern as a mask; And And forming a source electrode and a drain electrode electrically connected to the source region and the drain region on the active layer. delete The method of claim 1, wherein the amorphous zinc oxide based semiconductor layer is formed of a-IGZO semiconductor. The amorphous zinc oxide based semiconductor layer according to claim 3, wherein the amorphous zinc oxide based semiconductor layer has a composition ratio of gallium, indium and zinc of 2: 2: 1 so that the equivalent weight ratio of gallium, indium and zinc is 2.8: 2.8: Wherein the oxide thin film is formed by a sputtering method using an oxide target. delete delete delete The method of claim 1, wherein the insulating layer is formed of an inorganic material such as silicon nitride or silicon oxide. delete The method of claim 1, wherein the insulating layer is formed of an organic material of polyvinyl alcohol, polyvinyl pyrrolidone, or photoacryl. 11. The method of claim 10, wherein the fourth photoresist pattern forms a channel protection layer.

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