KR101407996B1 - System for synchronous serial interface using serial peripheral interface microcontroller and method thereof - Google Patents

Abstract

Disclosed is a synchronous serial interface system using a microcontroller for SPI communication and a method thereof for enabling SSI encoder reading with a SPI communication microcontroller.
The synchronous serial interface system using the microcontroller for SPI communication generates an encoder selection signal, generates an SPI clock corresponding to a set data size, and outputs the input signal to the input terminal (SPI MISO terminal) in synchronization with the generated serial peripheral interface A microcontroller for converting a value input into a data into a data value of a synchronous serial interface (SSI) encoder in a buffer; A transceiver unit for converting an SPI clock generated by the microcontroller into a clock of a line drive type and outputting the clock to an encoder unit and converting the data output from the encoder unit into a line drive system data into an open collector system; And a data selector for selecting one of a plurality of SSI data output from the transceiver unit according to an encoder selection signal output from the microcontroller and inputting the selected SSI data to the input terminal of the microcontroller.

Description

Technical Field [0001] The present invention relates to a synchronous serial interface system using a microcontroller for SPI communication and a synchronous serial interface system using the same,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a synchronous serial interface (SSI) using a microcontroller for SPI (serial peripheral interface) communication, and more particularly, to a SPI communication micro- To a synchronous serial interface system using a controller and a method thereof.

Generally, inside a microcontroller is a serial interface for serial communication between a core and an external peripheral device, which is synchronous and asynchronous.

A typical example of an asynchronous interface is a Universal Asynchronous Receiver Transmitter (UART), and a synchronous interface is a synchronous serial interface (SSI).

Among them, the synchronous serial interface converts a signal received in synchronization with a clock into a byte unit, without requiring a frame signal for distinguishing between bytes (8 bits) in communication with an external peripheral device, And serially transmitted.

A prior art for a synchronous serial interface device is disclosed in Korean Patent Application Publication No. 1999-027046 (titled Synchronous Serial Interface).

The disclosed prior art implements a synchronous serial interface using a small number of gates and has a FIFO in the microcontroller to reduce the load of the main memory in the microcontroller. Therefore, there is an advantage that the number of gates is reduced by eliminating the buffer, the clock is generated only during the transmission, power consumption is reduced, and the transmission and reception are always performed at the same time.

1. Korean Patent Application Publication No. 1999-027046 (published on April 15, 1999) (Synchronous Serial Interface)

However, since the above-mentioned prior art uses a standardized protocol of an absolute encoder, it has a disadvantage that it can not be applied to a microcontroller which has been released recently.

For example, in recent microcontrollers, the above-mentioned SSI communication interface IC is not mounted and an SPI communication interface device is mounted. Therefore, in order to read the SSI encoder in the recently released microcontroller, the core needs to make the pulse necessary for SSI communication and control the operation of reading the data directly. This causes most of the microcontroller's resources to be used to read data from the SSI encoder, which increases the load on the microcontroller. Here, SSI encoders use pulse signals of several Mhz.

Accordingly, the present invention has been made to solve the above problems occurring in the conventional SSI microcontroller and the related art,

SUMMARY OF THE INVENTION The present invention provides a synchronous serial interface system using a SPI communication microcontroller capable of reading SSI encoders with a microcontroller for serial peripheral interface (SPI) communication, and a method thereof.

Another object of the present invention is to provide a synchronous serial interface system using a SPI communication microcontroller capable of reading a SSI encoder with a small load in a microcontroller for SPI (serial peripheral interface) communication, Method.

According to an aspect of the present invention, there is provided a synchronous serial interface system using a microcontroller for SPI communication,

Generates an encoder selection signal, generates an SPI clock corresponding to the set data size, converts a value input to an input terminal (SPI MISO terminal) in synchronization with the generated SPI clock into data in the SSI encoder as a data value Microcontroller;

A transceiver unit for converting an SPI clock generated by the microcontroller into a clock of a line drive type and outputting the clock to an encoder unit and converting the data output from the encoder unit into a line drive system data into an open collector system;

And a data selector for selecting one of a plurality of SSI data output from the transceiver unit according to an encoder selection signal output from the microcontroller and inputting the selected SSI data to the input terminal of the microcontroller.

The microcontroller includes:

When a dummy value is written in the SSI data storage buffer, an SPI clock corresponding to the set SPI data size is generated, and the value input to the input terminal is synchronized with the SPI clock generated and stored in the buffer with SSI data And an SPI communication module.

The microcontroller includes:

And a digital output module for generating and transmitting an encoder selection signal to the data selector.

The microcontroller includes:

A dummy value is written in the buffer of the SPI communication module, and the data stored in the buffer is read out, and the SSI encoder And a core used as a data value of the data.

The transceiver unit may include a plurality of 422 transceivers.

In the above,

And a multiplexer for selecting one of a plurality of SSI data output from the 422 transceiver according to an encoder selection signal output from the microcontroller and inputting the selected SSI data to the input terminal of the microcontroller.

According to an aspect of the present invention, there is provided a synchronous serial interface method using a microcontroller for SPI communication,

(a) setting a serial peripheral interface (SPI) data size;

(b) selecting a synchronous serial interface (SSI) encoder to interface with;

(c) generating an SPI clock;

(d) converting the SPI clock into a line drive type clock and transmitting it to the SSI encoder;

(e) converting data generated in the SSI encoder into data in an open collector system;

(f) storing the data of the open collector system in the buffer with SSI data.

In the step (a), the size of the SPI data is set to be larger than the size of the SSI data to be interfaced.

In the step (c), an SPI clock corresponding to the set SPI data size is generated.

According to the present invention, there is an advantage that SSI encoder data can be easily read by using only a 422 transceiver and a multiplexer, which are chip (IC) standardized with the SPI communication module in the SPI communication controller.

In addition, according to the present invention, since the SPI communication microcontroller can read the value of the SSI encoder only by writing and reading the value in the buffer of the SPI communication module, there is an advantage that the load of the microcontroller can be drastically reduced.

In addition, according to the present invention, a plurality of SSI encoders can be interfaced with one SPI communication module, and the cost for reading SSI encoders and the spatial cost for system configuration can be reduced.

1 is a block diagram of a synchronous serial interface system using a microcontroller for SPI communication according to the present invention,
2 is a flowchart illustrating a synchronous serial interface method using a microcontroller for SPI communication according to the present invention.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail.

≪ Example 1 >

FIG. 1 is a block diagram of a synchronous serial interface system using a microcontroller for SPI communication according to the present invention, and includes a microcontroller 110, a transceiver unit 120, an encoder unit 130, and a data selector 140.

The microcontroller 110 generates an encoder selection signal, generates an SPI clock corresponding to the set data size, and converts the data input to the input terminal (SPI MISO terminal) in synchronization with the generated SPI clock into data of the SSI encoder Value in the buffer.

When a dummy value is written into the SSI data storage buffer, the micro controller 110 generates an SPI clock corresponding to the set SPI data size. The micro controller 110 converts the value input to the input terminal in synchronization with the generated SPI clock, An SPI communication module 113 for storing data in the buffer; A digital output module (D / O module) 112 for generating and transmitting an encoder selection signal to the data selector 140; Sets an SPI data size equal to or larger than the SSI data size to the SPI communication module 113, provides an encoder selection signal to the digital output module 112, records a dummy value in the buffer of the SPI communication module 113, And a core 111 for reading the data stored in the buffer and using the data as a data value of the SSI encoder.

Here, the SPI communication module 113 may include a data storage buffer, an SPI clock generator, and a data storage device as a typical SPI communication module.

The transceiver unit 120 converts the SPI clock generated by the microcontroller 110 into a clock of a line drive type and outputs the clock to the encoder unit 130. The encoder unit 130 then outputs data Collector-type data. The transceiver unit 120 includes a plurality of 422 transceivers 121 to 124. Here, it is preferable that the number of 422 transceivers is implemented corresponding to the number of SSI encoders.

The encoder unit 130 functions to interface data with the SSI communication system, and includes a plurality of SSI encoders 131 to 134. In the present invention, a case where the number of SSI encoders is four will be described. If the number of SSI encoders is increased or decreased, the number of 422 transceivers may be increased or decreased, and only an encoder selection signal generated in the microcontroller may be changed.

The data selector 140 selects one of a plurality of SSI data output from the transceiver unit 120 according to an encoder selection signal output from the microcontroller 110 and outputs the selected one of the SSI data to the input terminal SPI MISO), and is preferably implemented by a multiplexer.

In the synchronous serial interface system using the microcontroller for SPI communication according to the present invention configured as described above, in the SPI initialization process of the microcontroller 110, the core 111 sets the data size of the SPI to be equal to or larger than the SSI data size, 113, and also records a dummy value in the buffer, and at the same time transfers an interface target encoder selection signal to the digital output module 112. [

In this case, the encoder selection signal is set differently according to the number of SSI encoders to be interfaced. For example, when the number of SSI encoders is 4, 2 bits are used to set the encoder selection signal. That is, 00 = SSI encoders # 0 and 01 = SSI Encoder # 1, 10 = SSI Encoder # 2, and 11 = SSI Encoder # 3.

The digital output module 112 converts an encoder selection signal for selecting an encoder to be read out from the core 111 into a digital signal corresponding to the encoder selection signal and transmits the encoder selection signal to the data selector 140.

In addition, when the dummy value is written in the buffer, the SPI communication module 113 generates an SPI clock corresponding to the data size of the predetermined SPI through the clock generator, and transmits the SPI clock to the transceiver unit 120. Here, the data size of the SPI is more than the size of the SSI data.

Each of the 422 transceivers 121 to 124 in the transceiver unit 120 converts the SPI clock of the open collector system output from the SPI communication module 113 into a clock (Clock +, Clock-) of a line drive system, To the corresponding SSI encoder of the base station (130). That is, the line drive type clock output from the 422 transceiver 121 is output to the SSI encoder 131, the line drive type clock output from the 422 transceiver 122 is output to the SSI encoder 132, and the 422 transceiver 123 outputs The output of the line drive type clock output from the 422 transceiver 124 is transmitted to the SSI encoder 133 and the clock of the line drive type output from the 422 transceiver 124 is respectively transmitted to the SSI encoder 134.

Each of the SSI encoders 131 to 134 of the encoder unit 130 sequentially outputs encoder data in a line drive manner in synchronization with an input line drive type clock and transmits the encoder data to a corresponding 422 transceiver.

Each of the 422 transceivers 121 to 124 in the transceiver unit 120 converts encoder data (data +, data-) input in a line drive manner into open collector type data (SSI DATA) send.

The data selector 140 selects four SSI data (SSI # 0 DATA, SSI # 1 DATA, and SSI # 2 DATA) input according to an encoder selection signal output from the digital output module 112 in the microcontroller 110, SSI # 3 DATA) to the input terminal (SPI MISO (Master In, Slave Out) terminal of the SPI communication module 113 in the microcontroller 110).

Then, the SPI communication module 113 converts the value input to the input terminal (SPI MISO terminal) into data in synchronization with the generated SPI clock and stores the data in the internal buffer.

In this process, data of the SSI encoder is read through the SPI communication module 113, and then the core 111 reads the value of the buffer of the SPI communication module 113 and uses it as data of the SSI encoder.

The present invention can easily read the data of the SSI encoder by using only the conventional 422 transceiver and the multiplexer in the SPI communication microcontroller. In addition, by using the multiplexer, a plurality of SSI encoders can be interfaced It will be possible to do.

≪ Example 2 >

FIG. 2 is a flowchart illustrating a synchronous serial interface method using a microcontroller for SPI communication according to the present invention. (b) selecting a synchronous serial interface (SSI) encoder to interface with (S102); (c) generating an SPI clock (S103 to S104); (d) converting the SPI clock into a line drive type clock and transmitting the clock to the SSI encoder (S105); (e) converting data generated in the SSI encoder into data in an open collector system (S106 to S107); (f) storing data of the open collector system in a buffer with SSI data (S108 to S109); (g) reading the data stored in the buffer and using the data as SSI encoder data (S110).

In the synchronous serial interface method using the SPI communication microcontroller according to the present invention, in step S101, the core 111 sets the data size of the SPI to be equal to or larger than the size of the SSI data in the SPI initialization process of the microcontroller 110, To the clock generator of the communication module 113, and at the same time transfers the interface target encoder selection signal to the digital output module 112.

In step S102, the digital output module 112 converts the encoder selection signal for selecting the encoder to be read out from the core 111 into a digital signal corresponding thereto, and outputs the encoder selection signal to the data selector 140 .

In step S103, the core 111 records a dummy value in the buffer of the SPI communication module 113. If a dummy value is recorded in the buffer, the SPI communication module 113 transmits the internal clock generator And transmits the generated SPI clock to the transceiver unit 120. The SPI clock is transmitted to the transceiver unit 120 through the SPI clock. Here, the data size of the SPI is more than the size of the SSI data.

In step S105, each of the 422 transceivers 121 to 124 in the transceiver unit 120 converts the SPI clock of the open collector system output from the SPI communication module 113 into a clock (Clock +, Clock-) of a line drive system And transmits it to the corresponding SSI encoder of the encoder unit 130.

In step S106, each of the SSI encoders 131 to 134 of the encoder unit 130 sequentially outputs the encoder data in a line drive manner in synchronization with the input line drive type clock, and transmits the encoder data to the corresponding 422 transceiver.

Then, in step S107, each of the 422 transceivers 121 to 124 in the transceiver unit 120 converts the encoder data (data +, data-) input in a line drive manner into open collector type data (SSI DATA) (140).

In step S108, the data selector 140 selects one of the four SSI data (SSI # 0 DATA, SSI # 1 DATA, and SSI #) input according to the encoder selection signal output from the digital output module 112 in the microcontroller 110, 2 DATA and SSI # 3 DATA) to the input terminal (SPI MISO (Master In, Slave Out) terminal of the SPI communication module 113 in the microcontroller 110).

In step S109, the SPI communication module 113 converts the value input to the input terminal (SPI MISO terminal) into data in synchronization with the generated SPI clock, and stores the data in an internal buffer.

In this process, data of the SSI encoder is read through the SPI communication module 113. In step S110, the core 111 reads the value of the buffer of the SPI communication module 113 and uses it as data of the SSI encoder .

The present invention can easily read the data of the SSI encoder by using only the conventional 422 transceiver and the multiplexer in the SPI communication microcontroller. In addition, by using the multiplexer, a plurality of SSI encoders can be interfaced It will be possible to do.

It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined in the appended claims and their equivalents. Of course, such modifications are within the scope of the claims.

110 ... Microcontroller
111 ... core
112 ... Digital Output Module
113 ... SPI communication module
120 ... The transceiver unit
121 to 124 ... 422 Transceiver # 0 ~ 422 Transceiver # 3
130 ... Encoder section
131 to 134 ... SSI Encoder # 0 to SSI Encoder # 3
140 ... Data selector

Claims (9)

Generates an encoder selection signal, generates an SPI clock corresponding to a set data size, synchronizes a serial peripheral interface (SPI) clock with a synchronous serial interface (SSI) ) A microcontroller that stores the data value of the encoder in a buffer;
A transceiver unit for converting an SPI clock generated by the microcontroller into a clock of a line drive type and outputting the clock to an encoder unit and converting the data output from the encoder unit into a line drive system data into an open collector system;
And a data selector for selecting one of a plurality of SSI data output from the transceiver unit according to an encoder selection signal output from the microcontroller and inputting the selected data to the input terminal of the microcontroller, Using synchronous serial interface system.
The microcontroller according to claim 1,
When a dummy value is written in the SSI data storage buffer, an SPI clock corresponding to the set SPI data size is generated, and the value input to the input terminal is synchronized with the SPI clock generated and stored in the buffer with SSI data And an SPI communication module. The synchronous serial interface system using the SPI communication microcontroller.
The microcontroller according to claim 2,
And a digital output module for generating and transmitting an encoder selection signal to the data selector.
4. The microcontroller according to claim 3,
A dummy value is written in the buffer of the SPI communication module, and the data stored in the buffer is read out, and the SSI encoder And a core used as a data value of the SPI communication.
The synchronous serial interface system of claim 1, wherein the transceiver unit comprises a plurality of 422 transceivers.
The data selector of claim 5,
And a multiplexer for selecting one of a plurality of SSI data output from the plurality of 422 transceivers according to an encoder selection signal output from the microcontroller and inputting the selected SSI data to the input terminal of the microcontroller. Using synchronous serial interface system.
(a) setting a serial peripheral interface (SPI) data size;
(b) selecting a synchronous serial interface (SSI) encoder to interface with;
(c) generating an SPI clock;
(d) converting the SPI clock into a line drive type clock and transmitting it to the SSI encoder;
(e) converting data generated in the SSI encoder into data in an open collector system;
(f) storing the open collector type data in a buffer in the form of SSI data. The synchronous serial interface method using a microcontroller for SPI communication.
[8] The method of claim 7, wherein the step (a) sets the size of the SPI data to be larger than the size of the SSI data to be interfaced.
The synchronous serial interface method of claim 7, wherein the step (c) generates an SPI clock corresponding to the SPI data size.

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