KR101405561B1 - MEMS sensor packaging method - Google Patents

Abstract

The present invention relates to a method of packaging a MEMS sensor, and more particularly, to a method of packaging a MEMS sensor that overcomes spatial limitations and maximizes electrical connection in forming an electrode.
To this end, the present invention provides a method of manufacturing a semiconductor device, comprising: forming a lower electrode layer 100; Forming a sensor structure layer (200); The metal layer of the lower electrode layer and the metal layer of the sensor structure layer; Processing the sensor structure layer; Forming an upper electrode layer (300); And eutectic bonding the upper electrode layer on the fabricated sensor structure layer.

Description

[0001] MEMS sensor packaging method [0002]

The present invention relates to a method of packaging a MEMS sensor, and more particularly, to a method of packaging a MEMS sensor that overcomes spatial limitations and maximizes electrical connection in forming an electrode.

Recently, as the necessity of high-capacity communication for the broadband service such as the Internet and IMT-2000 is emphasized, the optical communication system is rapidly becoming standardized. (MEMS: Micro Electro-Mechanical Systems, hereinafter referred to as " MEMS ") having optically transparent characteristics without depending on a wavelength, a data rate and a signal format, (MEMS) technology has been introduced as a system miniaturization technology that will lead to postelectronics.

The MEMS device is formed as a microstructure on a substrate, and is an element electrically and mechanically coupling a driving body for outputting a driving force, which is a mechanical characteristic, and a semiconductor integrated circuit having an electric characteristic for controlling the driving body. The basic feature of the MEMS device is that a driving body constructed as a mechanical structure is assembled as a component of the element, and driving of the driving body is performed electrically by applying a coulomb force between the electrodes and the like.

Conventionally, there are an accelerometer, a pressure sensor, an ink jet head, a head for a hard disk, a projection display, a scanner, and the like, which are commercialized using such a MEMS technology or a MEMS device. Recently, The interest in optical communication component technology is increasing more and more.

For stable and reliable product performance of the MEMS device, the movement of the actuator must be protected from mechanical and chemical external factors, and the influence from the factors affecting the surface energy should be minimized. Therefore, hermetic sealing is required to block moisture and dust from the outside. Airtight sealing is essential to ensure product performance and reliability.

Korean Unexamined Patent Application Publication No. 2007-0040471 (MEMS device package and packaging method) and Korean Unexamined Patent Publication No. 2007-0111608 (MEMS package and its manufacturing method) have been disclosed as packaging techniques related to such MEMS devices.

Korean Unexamined Patent Publication No. 2007-0040471 discloses a method of manufacturing a MEMS device, comprising: mounting a MEMS device on a substrate; Applying a photosensitive photocurable epoxy at a location where the sealing cap is attached; Irradiating the retardation photo-curable epoxy with predetermined light; Attaching the sealing cap onto the substrate; And fully curing the retardant photo-curable epoxy at ambient temperature.

Korean Unexamined Patent Application Publication No. 2007-0111608 relates to a MEMS package that effectively shields a MEMS element from an external environment and a method of manufacturing the MEMS package. The MEMS package includes a MEMS element that performs a mechanical operation corresponding to an applied driving signal, A base substrate on which the MEMS element is mounted by flip-chip bonding on one surface of which a pattern for transmitting a signal is formed, a thin film that shields the MEMS element from the outside, and a light-curable sealing And a method of manufacturing the MEMS package.

However, Korean Unexamined Patent Application Publication No. 2007-0040471 and Korean Unexamined Patent Publication No. 2007-0111608 can not form an electrode on the ceiling of a cavity surrounding a three-dimensional MEMS structure, and in order to maintain the seal, There is a problem in that the process cost is increased. Also, since the photo-curable epoxy is used, there is a risk of cracking of the sealed package due to thermal deformation.

It is an object of the present invention to provide a MEMS sensor packaging method that overcomes spatial limitations and maximizes electrical connection in forming electrodes of a sensor.

According to an aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: forming a lower electrode layer; Forming a sensor structure layer; The metal layer of the lower electrode layer and the metal layer of the sensor structure layer; Processing the sensor structure layer; Forming an upper electrode layer; And eutectic bonding the upper electrode layer on the fabricated sensor structure layer.

Preferably, the forming the lower electrode layer comprises: forming an insulating layer on an upper portion of the lower wafer made of silicon; Forming a pattern layer on the insulating layer; Forming a metal layer on the insulating layer on which the pattern layer is formed; And removing the pattern layer from the insulating layer.

Preferably, the step of forming the sensor structure layer includes: forming a pattern layer on the lower surface of the silicon sensor structure; and partially etching the lower surface of the sensor structure using the pattern layer; Removing the pattern layer; Forming a pattern layer on the sensor structure and forming a metal layer on the sensor structure; And removing the pattern layer from the sensor structure.

Also preferably, the step of fabricating the sensor structure layer comprises: forming a pattern layer for etching on the top surface of the sensor structure; Partially etching the upper surface of the sensor structure using the pattern layer; Forming an oxide layer on the etched sensor structure after removing the pattern layer; Forming a pattern layer on the oxide layer and partially etching the oxide layer using the pattern layer; Forming a pattern layer on the etched portion of the sensor structure after removing the pattern layer; Forming a metal layer on the sensor structure on which the pattern layer is formed, and removing the pattern layer from the sensor structure; Partially etching the sensor structure using a partially etched oxide layer, and removing the oxide layer.

The forming of the upper electrode layer may include forming a pattern layer on the lower surface of the upper wafer made of silicon and forming a via hole in the lower surface of the upper wafer using the pattern layer; Removing the pattern layer from the upper wafer; Forming an insulating layer on a lower surface of the upper wafer and filling the via hole with a metal to form a metal plating portion; Removing the metal plating portion to the surface of the insulating layer; Forming a pattern layer on the insulating layer, and then forming a metal layer on the insulating layer, the metal layer being connected to the metal plating portion; And removing the pattern layer on the insulating layer.

Preferably, the step of eutectic bonding the upper electrode layer on the fabricated sensor structure layer includes: eutectic bonding the metal layer of the upper electrode layer and the processed metal layer of the sensor structure layer; Polishing the upper surface of the upper wafer to the surface of the insulating layer, and then forming an outer insulating layer on the upper surface of the polished upper wafer; Forming a pattern layer on the external insulating layer, and partially etching the external insulating layer using the pattern layer so that a surface of the metal plating part is exposed; Forming a metal electrode layer on the outer insulating layer, the metal electrode layer being connected to the metal plating portion after removing the pattern layer; Forming a pattern layer on the metal electrode layer, and partially etching the metal electrode layer using the pattern layer; And removing the pattern layer.

According to the present invention, thermal expansion due to temperature, which is one of the biggest problems in manufacturing a vehicle sensor, can be solved, thereby keeping the environment inside the packaging sensor maintaining constant temperature and humidity, and securing airtightness.

In addition, by forming an electrode using a small via hole of an upper wafer made of silicon that is easy to process, it is possible to secure the electrical connection between the inside and the outside of the cavity where the MEMS sensor structure is located, Can be improved.

1 is a flowchart schematically showing a method of packaging a MEMS sensor according to the present invention,
2 is a view illustrating a method of packaging a MEMS sensor according to the present invention,
FIG. 3 is a view illustrating a method of packaging a MEMS sensor according to the present invention,
FIG. 4 is a view illustrating a method of packaging a MEMS sensor according to the present invention, and is a flowchart showing the steps of eutectic bonding a lower electrode layer and a sensor structure layer,
5A to 5C are views showing a method of packaging a MEMS sensor according to the present invention,
6A to 6C are views showing a method of packaging a MEMS sensor according to the present invention,
7A to 7C are diagrams illustrating a method of packaging a MEMS sensor according to the present invention, and are diagrams showing a step of eutectic bonding an upper electrode layer onto a processed sensor structure layer,
8 is a sectional view showing a MEMS sensor package manufactured by the method of packaging a MEMS sensor according to the present invention.

Hereinafter, the present invention will be described with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings are provided by way of illustration and may be exaggerated for clarity to illustrate the principles of the invention.

As is known, when glass is used for electrical insulation as a wafer material in manufacturing a MEMS sensor package, when the temperature is changed from -40 ° C to 120 ° C, which is required in AEC-Q100 of a vehicle sensor, the problem of thermal expansion .

Accordingly, the present invention aims to overcome the limitations of thermal expansion caused by the difference in physical properties between the MEMS sensor structure and the substrate made of silicon by using silicon for both the top plate and the bottom plate. Further, .

In the present invention, a wafer level package (wafer level package) is fabricated using a damascene processing process and eutectic bonding, which are plating techniques, for an effective manufacturing process and mounting of a MEMS sensor requiring a hermetic package. , WLP) method.

Accordingly, the MEMS sensor package manufactured by the method according to the present invention maintains the airtightness of the package, and the electrical connection between the inside and the outside of the cavity where the MEMS sensor structure is located is excellent.

1, a method of packaging a MEMS sensor according to the present invention includes forming a lower electrode layer 100, forming a sensor structure layer 200, forming a lower electrode layer 100, (S30), a step (S40) of forming the sensor structure layer (200), a step (S60) of forming an upper electrode layer (300), and a step And a step (S70) of eutectic bonding the upper electrode layer (300) on the sensor structure layer.

The step (S10) of forming the lower electrode layer 100 may include forming an insulating layer 120 on the upper surface of the lower wafer 110 made of silicon (S11) as shown in FIG. 2; Forming a negative photo resist pattern layer 130 on the insulating layer 120; (S13) forming a metal layer 140 on the insulating layer 120 on which the negative PR pattern layer 130 is formed; And removing the negative PR pattern layer 130 from the insulating layer 120 (S14).

In the step S11 of forming the insulating layer 120, the insulating layer 120 is formed on the lower wafer 110 through a thermal oxidation process or a wet oxidation process.

The thermal oxidation process oxidizes one surface of the lower wafer 110 at a high temperature of 850 to 1000 ° C. to form an insulating layer. The wet oxidation process is performed under a pressure condition of 30 to 250 Pa, The insulating layer 120 is formed.

In step S12 of forming the negative PR pattern layer 130, a negative PR is uniformly applied on the insulating layer 120 to a thickness of 3 to 5 mu m, preferably 3.5 mu m, by spin coating And then soft baking is carried out at a temperature of 60 to 80 DEG C for 3 to 6 minutes (preferably for 5 minutes). Thereafter, ultraviolet rays are irradiated to expose only the desired portion of the negative PR to light, and then unexposed portions are removed to leave only a desired pattern of negative PR on the insulating layer 120, thereby forming a negative PR pattern layer for lift- (130).

In the step of forming the metal layer 140, a metal material is deposited on the insulating layer 120 coated with the negative PR pattern layer 130 by using an evaporation method to form the metal layer 140 .

Although not shown, the metal layer 140 is formed by laminating a first metal layer formed as a lower electrode and a second metal layer formed as a junction layer for eutectic bonding.

The metal material of the metal layer 140 may include Cr for forming an adhesion layer, Ni or Pt for forming a diffusion barrier, an electrode layer (Au) is used for forming the first conductive layer.

The first metal layer is composed of a chromium-based adhesive layer and a gold electrode layer. The chromium is deposited to a thickness of 20 to 40 nm (preferably 30 nm), and gold is deposited to a thickness of 300 to 500 nm 400 nm).

The second metal layer is formed of chromium deposited at a thickness of 20 to 40 nm (preferably 30 nm) as a pressure-sensitive adhesive layer, and gold deposited at a thickness of 200 to 500 nm (preferably 400 nm) as a bonding layer, A diffusion barrier layer made of nickel or platinum is deposited between the first metal layer and the second metal layer.

In step S14 of removing the negative PR pattern layer 130, the negative PR pattern layer 130 is removed on the insulating layer 120 using acetone as a solvent. Then, the negative PR pattern layer 130 is removed at 300 to 500 ° C The surface of the lower electrode layer 100 from which the negative PR pattern layer 130 is removed is subjected to heat treatment.

In the step of forming the lower electrode layer 100, a negative PR pattern is formed on the insulating layer 120 using a photolithography method and then etched by a deep reactive ion etching (DRIE) process Next, an electrode is formed by the following deposition method. At this time, a pattern is formed with a negative PR for the lift-off process, a metal layer 140 is evaporated by an evaporation method, and a negative PR is removed.

The lower electrode layer 100 thus formed has a total thickness of 550 to 650 μm, preferably 600 μm.

The step S20 of forming the sensor structure layer 200 may include forming a positive PR pattern layer (hereinafter referred to as a " sensor structure ") 210 on the lower surface of a silicon- 220) (S21); Partially etching the lower surface of the sensor structure 210 (S22); Removing the positive PR pattern layer 220 (S23); (S24) forming a negative PR pattern layer 240 on the etched sensor structure region; A step (S25) of forming a metal layer 250 on the sensor structure 210 on which the negative PR pattern layer 240 is formed; And removing the negative PR pattern layer 240 from the sensor structure 210 (S26).

In step S21 of forming the positive PR pattern layer 220, positive PR is uniformly deposited on the lower surface of the sensor structure 210 to a thickness of 10 to 30 mu m, preferably 20 mu m, by spin coating After the application, soft baking is performed at a temperature of 60 to 80 캜 for 3 to 10 minutes (preferably for 5 minutes). Thereafter, the positive PR is exposed to ultraviolet rays except for a desired portion, and is then subjected to hard baking for 5 to 20 minutes (preferably for 10 minutes) at a temperature of 120 to 180 ° C. Thereafter, the positive PR portion exposed to ultraviolet rays is removed to leave a positive PR of a desired pattern on the sensor structure 210, thereby forming a positive PR pattern layer 220 for DRIE.

In the step S22 of partially etching the sensor structure 210, the sensor structure 210 surrounding the sensor structure 210 is dry etched except the portion where the positive PR pattern layer 220 is formed. To form a capacitive gap 230. For example, a DRIE method can be used for the dry etching.

In step S23 of removing the positive PR pattern layer 220, the positive PR pattern layer 220 is removed by oxygen plasma treatment using a plasma asher. At this time, the rim side PR of the sensor structure 210 is completely removed for the eutectic bonding.

Next, in step S24 of forming the negative PR pattern layer 240, a negative PR pattern layer 240 is formed on the etched portion of the sensor structure 210, that is, the lower gap 230, A negative PR is uniformly applied on the lower gap of the sensor structure 210 to a thickness of 10 to 30 탆, preferably 20 탆, at a temperature of 60 to 80 캜 for 3 to 10 minutes (Preferably for 5 minutes) to perform soft baking. Thereafter, the negative PR is irradiated with ultraviolet rays to expose only the desired portion of the negative to the light, and then the unexposed portions are removed to leave only the negative PR of the desired pattern, thereby forming a negative PR pattern layer 240 for lift- .

In the step of forming the metal layer 250, a metal layer 250 for a eutectic bonding process is formed on the sensor structure 210 on which the negative PR pattern layer 240 is formed, A first gold layer made of gold, a tin layer made of tin (Sn), and a second gold layer made of gold are sequentially stacked on the sensor structure.

The chromium layer is formed to a thickness of 20 to 40 nm (preferably, 30 nm thick), and the first gold layer is formed to have a thickness of 300 to 300 nm. The metal layer 250 is formed by evaporation through a metal deposition process, (Preferably 400 nm thick), the tin layer is formed to a thickness of 300 to 500 nm (preferably 400 nm thick), and the second gold layer is formed to a thickness of 50 to 100 nm Preferably 80 nm thick).

The second gold layer is used as a passivation for preventing oxidation of the tin layer.

In the step S26 of removing the negative PR pattern layer 240, the negative PR pattern layer 240 is removed on the sensor structure 210 using acetone as a solvent. Then, the negative PR pattern layer 240 is removed at 300 to 500 ° C The surface of the sensor structure layer 200 from which the negative PR pattern layer 240 is removed is heat-treated in a nitrogen (N2) atmosphere.

The eutectic bonding step S30 includes joining the lower electrode layer 100 and the sensor structure layer 200 through the eutectic bonding as shown in FIG. 4, a step S31 of bonding the lower electrode layer 100 and the sensor structure layer 200, Polishing the upper end of the sensor structure layer 200 joined to the sensor structure layer 100 (S32).

In step S31 of joining the lower electrode layer 100 and the sensor structure layer 200, an eutectic bonder is used to heat the electrode structure at a temperature of 250 to 300 ° C, Lt; RTI ID = 0.0 > 280 C < / RTI > and 8000 N / m < 2 > for 5 to 15 minutes (preferably 10 minutes).

In the polishing step S32, the upper end of the sensor structure layer 200 bonded to the lower electrode layer 100, that is, the upper end of the sensor structure 210, is polished to have a thickness of 50 to 55 mu m And the thickness including the gap, the thickness of the structure is 50 m).

The step S40 of machining the sensor structure layer 200 may be performed as shown in Figures 5A through 5C for a dry etch process on the upper surface of the sensor structure 210 (opposite the lower surface where the lower gap 230 is formed) Forming a positive PR pattern layer 260 (S41); Partially etching the upper surface of the sensor structure 210 to form an upper gap 265 (S42); Removing the positive PR pattern layer 260 (S43); Forming an oxide layer 270 over the etched sensor structure 210 (S44); Forming a positive PR pattern layer 280 for etching the oxide layer 270 on the oxide layer 270; Etching the oxide layer 270 except for the portion of the positive PR pattern layer 280 (S46); Removing the positive PR pattern layer 280 (S47); A step (S48) of forming a negative PR pattern layer (285) on the portion of the upper gap (265); A step (S49) of forming a metal layer (290) on the sensor structure (210) on which the negative PR pattern layer (285) is formed; Removing (S50) the negative PR pattern layer (285) from the sensor structure (210); Etching and processing the sensor structure 210 (S51); And removing the oxide layer 270 and the titanium (Ti) layer 293 (S52).

In step S41 of forming the positive PR pattern layer 260, a positive PR pattern layer 260 for dry etching is formed. On the upper surface of the sensor structure 210, Uniformly applied to a thickness of 30 mu m, preferably 20 mu m, and then soft baking is performed at a temperature of 60 to 80 DEG C for 3 to 10 minutes (preferably for 5 minutes). Thereafter, the positive PR is exposed to ultraviolet rays except for a desired portion, and then hard baking is performed at a temperature of 120 to 180 ° C for 5 to 20 minutes (preferably for 10 minutes). Thereafter, the positive PR portion exposed to ultraviolet rays is removed to leave a positive PR of a desired pattern on the sensor structure 210, thereby forming a positive PR pattern layer 260 for DRIE.

In step S42 of partially etching the sensor structure 210, a positive PR pattern layer 260 is formed on the upper surface of the sensor structure 210 to form an upper gap 265 on the upper surface of the sensor structure 210 A portion of the sensor structure 210 surrounding the sensor structure 210 is dry etched to form a capacitive gap 265. For example, in the dry etching, a DRIE method may be used to etch the sensor structure 210 with a mass / spring structure.

In step S43 of removing the positive PR pattern layer 260, the positive PR pattern layer 260 is removed by oxygen plasma treatment using a plasma asher. At this time, the rim side PR of the sensor structure 210 is completely removed for the eutectic bonding.

In the step of forming the oxide layer 270, an oxide layer 270 having a thickness of 2 탆 is deposited on the etched sensor structure 210 using a CVD (chemical vapor deposition) . The oxide layer 270 thus formed is used as a mask in processing the sensor structure 210 in the future.

In step S45 of forming a positive PR pattern layer 280 for etching the oxide layer 270, a positive PR is deposited on the oxide layer 270 by a spin coating method to a thickness of 1 to 3 占 퐉, And then soft baking is performed for 3 to 10 minutes (preferably for 5 minutes) at a temperature condition of 60 to 80 ° C. Subsequently, the positive PR is exposed to ultraviolet rays except for a desired portion, developed and then subjected to hard baking at a temperature of 120 to 180 ° C for 5 to 20 minutes (preferably for 10 minutes) Remove. Thereafter, the positive PR portion exposed to ultraviolet rays is removed to leave only the positive PR of the desired pattern on the oxide layer 270, thereby forming the positive PR pattern layer 280. [

In the step of etching the oxide layer 270 (S46), all the remaining portions except for the oxide portion laminated on the lower end of the positive PR pattern layer 280 are removed by etching. More specifically, the oxide layer 270 is etched by wet etching or dry etching using HF (hydrogen fluoride).

In step S47 of removing the positive PR pattern layer 280, the positive PR pattern layer 280 formed for the oxide layer etching is removed, and a positive PR pattern layer 280 is formed using a plasma asher. Is removed by oxygen plasma treatment. At this time, the rim side PR of the sensor structure 210 is completely removed for the eutectic bonding.

In step S48 of forming a negative PR pattern layer 285 on the upper gap 265, a negative PR is deposited on the upper gap 265 of the sensor structure 210 by spin coating to a thickness of 10 to 30 占 퐉 And preferably 20 占 퐉, and then soft baking is performed for 3 to 10 minutes (preferably for 5 minutes) at a temperature condition of 60 to 80 占 폚. Thereafter, the negative PR is irradiated with ultraviolet rays to expose only the desired portion of the negative to the light, and then the unexposed portion is removed to leave a negative PR of a desired pattern, thereby forming a negative PR pattern layer 285 for lift- .

In step S49 of forming the metal layer 290, a metal material is deposited on the sensor structure 210 coated with the negative PR pattern layer 285 for lift-off to form a metal layer 290 for the eutectic bonding process Although not shown in the drawing, the metal layer 290 includes a chromium layer made of chromium, a first gold layer made of gold, a tin layer made of tin (Sn), and a second gold layer made of gold are sequentially formed on the sensor structure 210 As shown in FIG.

The metal layer 290 is formed by vapor deposition using a vapor deposition method. The chromium layer is formed to a thickness of 20 to 40 nm (preferably 30 nm thick) (Preferably 400 nm thick), the tin layer is formed to a thickness of 300 to 500 nm (preferably 400 nm thick), and the second gold layer is formed to a thickness of 50 to 100 nm Preferably 80 nm thick).

The second gold layer is used as a passivation for preventing the oxidation of the tin layer and is used as a top layer for protecting the metal layer 290 in the subsequent DRIE process and includes a metal protective layer 295 made of titanium on the second gold layer, That is, a titanium layer is deposited.

In step S50 of removing the negative PR pattern layer 285, a negative PR pattern layer 285 for lift-off is removed on the sensor structure 210 using acetone as a solvent, The surface of the sensor structure 210 from which the negative PR pattern layer 285 is removed is subjected to heat treatment.

In the step S51 of etching the sensor structure 210, the sensor structure 210 is partially etched using the oxide layer 270 located in the upper gap 265 as a mask, A mass / spring structure is formed at the center of the sensor structure 210 by etching and removing the remaining portions except for the sensor structure 210 which is stacked on the lower portion.

In this case, the mass-spring structure formed on the sensor structure 210 has a thickness of 45 to 55 μm, preferably 50 μm, and a mass / spring structure is formed on the sensor structure 210. The DRIE method can be used as the etching method.

In step S52 of removing the oxide layer 270 and the titanium layer 295, the titanium layer 295 is removed on the oxide layer 270 and the metal layer 290 on the sensor structure 210 using HF.

6A and 6B, forming the upper electrode layer 300 may include forming a positive PR pattern layer 320 on the lower surface of the upper wafer 310 made of silicon (S61) ; A step (S62) of forming a via hole (311) on a lower surface of the upper wafer (310) on which the positive PR pattern layer (320) is formed; A step (S63) of removing the positive PR pattern layer 320 from the upper wafer 310 on which the via hole 311 is formed; Forming an insulating layer 330 on the lower surface of the upper wafer 310 (S64); (S65) filling the via hole (311) on the insulating layer (330) by a copper (Cu) plating method; Removing the copper plating portion 340 to the surface of the insulating layer 330 (S66); A step (S67) of forming a negative PR pattern layer (350) on the insulating layer (330); A step (S68) of forming a metal layer 360 on the insulating layer 330 on which the negative PR pattern layer 350 is formed; And removing the negative PR pattern layer 350 on the insulating layer 330 (S69).

A positive PR pattern layer 320 for forming the via hole 311 is formed in the step of forming the positive PR pattern layer 320. The positive PR pattern layer 320 is formed on the lower surface of the upper wafer 310 by using a spin coating method, PR is uniformly applied to a thickness of 1 to 3 mu m, preferably 2 mu m, and then soft baking is performed at a temperature of 60 to 80 DEG C for 3 to 10 minutes (preferably for 5 minutes). Thereafter, the positive PR is exposed to ultraviolet rays except for a desired portion, and then hard baking is performed at a temperature of 120 to 180 ° C for 5 to 20 minutes (preferably for 10 minutes). Thereafter, the positive PR portion exposed to ultraviolet rays is removed to leave only the positive PR of the desired pattern, thereby forming the positive PR pattern layer 320.

In the step S62 of forming the via hole 311, at least one via hole 311 is formed on the lower surface of the upper wafer 310 on which the positive PR pattern layer 320 is formed by the DRIE method.

In step S63 of removing the positive PR pattern layer 320, the positive PR pattern layer 320 formed for forming the via hole 311 in the upper wafer 310 is removed using a plasma asher The positive PR pattern layer 320 is removed by oxygen plasma treatment.

The insulating layer 330 is formed on the upper wafer 310 through a thermal oxidation process or a wet oxidation process in the step S64 of forming the insulating layer 330 on the lower surface of the upper wafer 310. In the thermal oxidation process The upper surface of the upper wafer 310 is oxidized to form the insulating layer 330 at a high temperature of 850 to 1000 ° C. and the surface of the upper wafer 310 is oxidized in a water vapor environment formed at a pressure of 30 to 250 Pa in the wet oxidation process. The insulating layer 330 is formed.

6C is a view illustrating a copper plating process using a damascene process. In the step S65 of filling the via hole 311 on the insulating layer 330 by a Cu plating method, as shown in FIG. 6C, Depositing a barrier layer (331) of tantalum (Ta) on the insulating layer (330); Forming a seed layer 332 of copper on the barrier layer 331; And filling the via hole 311 with a copper material to form a metal plating portion 340.

A barrier layer 331 made of tantalum (Ta) is formed on the insulating layer 330 using a sputtering method, and the barrier layer 331 formed in this manner is formed on the barrier layer 331, Has a thickness of 10% or less of the thickness (or height) of the metal plating portion 340.

In the step of forming the seed layer 332 made of copper, a seed layer 332 is deposited on the barrier layer 331 by a sputtering method or a CVD method.

In the step of filling the via hole 311 with the copper material to form the metal plating part 340, the inside of the via hole 311 is completely filled with the copper material by the electroplating method.

Next, in the step S66 of removing the metal plating portion 340 to the surface of the insulating layer 330, the metal plating portion 340 is exposed to the surface of the insulating layer 330 using a CMP (Chemical Mechanical Polishing) At this time, the barrier layer 331 and the seed layer 332 are also removed to the surface of the insulating layer 330.

In step S67 of forming the negative PR pattern layer 350 on the insulating layer 330, a negative PR is formed on the insulating layer to a thickness of 2 to 5 mu m, preferably 3.5 mu m, by spin coating After uniform application, soft baking is carried out at a temperature of 60 to 80 캜 for 3 to 10 minutes (preferably for 5 minutes). After that, only the desired portion of the negative PR is exposed to the light by irradiating ultraviolet rays, and then the unexposed portion is removed to leave a negative PR of a desired pattern on the insulating layer 330 to form a negative PR pattern layer 350 for lift- do.

In step S68 of forming the metal layer 360, a metal material is deposited on the insulating layer 330 on which the negative PR pattern layer 350 is formed by using an evaporation method to form the metal layer 360, Although not shown, the metal layer 360 comprises a first metal layer formed as an upper electrode and a second metal layer formed as a junction layer for eutectic bonding.

The metal material of the metal layer 360 may include Cr for forming an adhesion layer, Ni or Pt for forming a diffusion barrier, an electrode layer (Au) is used for forming the first conductive layer.

The first metal layer is composed of a chromium-based adhesive layer and a gold electrode layer. The chromium is deposited to a thickness of 20 to 40 nm (preferably 30 nm), and gold is deposited to a thickness of 300 to 500 nm 400 nm).

The second metal layer may be a chromium layer and a bonding layer (gold layer) deposited to a thickness of 20 to 40 nm (preferably 30 nm) as a pressure-sensitive adhesive layer (chrome layer) to a thickness of 300 to 500 nm And a diffusion barrier layer made of nickel or platinum is deposited between the first metal layer and the second metal layer.

In step S69 of removing the negative PR pattern layer 350, the negative PR pattern layer 350 is removed on the insulating layer 330 using acetone as a solvent, The surface of the upper electrode layer 300 from which the negative PR pattern layer 350 is removed is subjected to heat treatment.

The upper electrode layer 300 thus formed has a total thickness of 200 to 600 μm, preferably 400 μm.

7A to 7C, the step of subjecting the upper electrode layer 300 to the eutectic bonding on the processed sensor structure layer 200 may include the steps of forming a sensor structure layer 200 on the lower surface of the upper electrode layer 300, (S71) contacting and etched in a laminated structure on the substrate (200); Polishing and removing the upper surface portion of the upper wafer 310 to the surface of the insulating layer 330 (S72); Forming an outer insulating layer 370 on the upper surface of the polished upper wafer 310 (S73); A step (S74) of forming a positive PR pattern layer 375 on the external insulating layer 370; Etching the outer insulating layer 370 between the patterns of the positive PR pattern layer 375 (S75); Removing the positive PR pattern layer 375 (S76); A step (S77) of forming a metal electrode layer 380 on the external insulating layer 370 from which the positive PR pattern layer 375 is removed; A step (S78) of forming a positive PR pattern layer (385) on the metal electrode layer (380); Etching the metal electrode layer 380 between the patterns of the positive PR pattern layer 385 (S79); And removing the positive PR pattern layer 385 (S80).

In the eutectic bonding step S71, the bottom surface of the upper electrode layer 300 is laminated on the fabricated sensor structure layer 200 to form the upper electrode layer 300 with the sensor structure layer 200 interposed therebetween. And anodic bonding is performed between the lower electrode layers 100.

That is, by bonding the sensor structure layer 200 via the eutectic bonding, electrical connection between the upper electrode layer 300 and each electrode (metal layer) of the lower electrode layer 100 becomes possible.

In the step S72 of polishing the upper surface portion of the upper wafer 310 to the surface of the insulating layer 330 and removing the insulating layer 330 as a stop layer, the upper wafer 310 is removed from the via hole 311 The surface of the insulating layer 330 is exposed by polishing.

In the step S73 of forming the external insulating layer 370, an oxide is deposited on the upper surface of the upper wafer 310 to form an external insulating layer 370.

In step S74 of forming the positive PR pattern layer 375, a positive PR pattern layer 375 for partial etching of the external insulating layer 370 is formed. On the upper surface of the upper wafer 310, a spin coating method , Uniformly applying the positive PR to a thickness of 1 to 3 占 퐉, preferably 2 占 퐉, and then soft baking for 3 to 10 minutes (preferably for 5 minutes) at a temperature of 60 to 80 占 폚 . Thereafter, the positive PR is exposed to ultraviolet rays except for a desired portion, and then hard baking is performed at a temperature of 120 to 180 ° C for 5 to 20 minutes (preferably for 10 minutes). Thereafter, the positive PR portion exposed to ultraviolet rays is removed to leave only the positive PR of the desired pattern, thereby forming the positive PR pattern layer 375. [

In step S75 of etching the external insulating layer 370, the external insulating layer 370 is partially etched away between the patterns of the positive PR pattern layer 375. Then, At this time, when the outer insulating layer 370 is etched between the patterns of the pattern layer 375 to etch the remaining portions except the portion of the outer insulating layer 370 laminated on the lower end of the positive PR pattern layer 375, The outer insulating layer 370 is etched in a tapered shape so that the outer insulating layer 370 at the edge portion of the insulating layer 310 is not too thin or removed.

The etching of the external insulating layer 370 is performed by wet etching using HF (hydrogen fluoride), and the external insulating layer 370 is formed using the metal plating portion 340 as a stop layer 370 are etched to the surface of the metal plating portion 340 filled with the via hole 311 to expose the surface of the metal plating portion 340.

Next, in step S76 of removing the positive PR pattern layer 375, the positive PR pattern layer 375 is removed to form the metal electrode layer 380. The positive PR pattern layer 375 is removed using a plasma asher, (375) is removed by oxygen plasma treatment.

In the step S77 of forming the metal electrode layer 380, a metal electrode layer 380 made of aluminum is formed on the outer insulating layer 370 from which the positive PR pattern layer 375 is removed. Specifically, Aluminum is uniformly deposited on the surface of the external insulating layer 370 to form the metal electrode layer 380 as a metal electrode.

The aluminum electrode layer 380 is formed to be connected to the metal plating part 340 by etching and exposing the external insulating layer 370 as described above so that the inside and the outside of the cavity where the sensor structure 210 is disposed It is possible to secure the electrical connectivity of the semiconductor device.

A positive PR pattern layer 385 for partial etching of the metal electrode layer 380 is formed in step S78 of forming a positive PR pattern layer 385 on the metal electrode layer 380, The surface of the positive PR is coated uniformly on the surface thereof with a thickness of 1 to 3 占 퐉, preferably 2 占 퐉, by spin coating, and then the coating is carried out at a temperature of 60 to 80 占 폚 for 3 to 10 minutes Min.). ≪ / RTI > Thereafter, the positive PR is exposed to ultraviolet rays except for a desired portion, and then hard baking is performed at a temperature of 120 to 180 ° C for 5 to 20 minutes (preferably for 10 minutes). Thereafter, the positive PR portion exposed to ultraviolet rays is removed to leave only the positive PR of the desired pattern, thereby forming the positive PR pattern layer 385. [

The metal electrode layer 380 is etched using the positive PR pattern layer 385 as a mask in step S79 to etch the metal electrode layer 380 except for the portion laminated on the lower end of the positive PR pattern layer 385, Etch only.

In step S80 of removing the positive PR pattern layer 385, the positive PR pattern layer 385 is removed by oxygen plasma treatment using a plasma asher.

The MEMS sensor package manufactured by the above process has a sectional structure as shown in FIG.

100: lower electrode layer
110: Lower wafer
120: insulating layer
140: metal layer
200: Sensor structure layer
210: Sensor structure
250, 290: metal layer
300: upper electrode layer
310: upper wafer
330: insulating layer
340: metal plating
360: metal layer
370: outer insulating layer
380: metal electrode layer

Claims (9)

delete Forming a lower electrode layer (100);
Forming a sensor structure layer (200);
The metal layer of the lower electrode layer and the metal layer of the sensor structure layer;
Processing the sensor structure layer;
Forming an upper electrode layer (300); And
Eutectic bonding the upper electrode layer onto the fabricated sensor structure layer;
Lt; / RTI >
The forming of the lower electrode layer (100)
Forming an insulating layer (120) on top of a lower wafer (110) made of silicon;
Forming a pattern layer (130) on the insulating layer (120);
Forming a metal layer (140) on the insulating layer (120) on which the pattern layer (130) is formed;
Removing the pattern layer (130) from the insulating layer (120);
Wherein the MEMS sensor is mounted on the MEMS sensor.
The method of claim 2,
The step of forming the sensor structure layer (200)
Forming a pattern layer 220 on the lower surface of the silicon sensor structure 210 and partially etching the lower surface of the sensor structure 210 using the pattern layer 220;
Removing the pattern layer 220;
Forming a pattern layer (240) on an etched portion of the sensor structure and then forming a metal layer (250) on the sensor structure (210);
Removing the pattern layer (240) from the sensor structure (210);
Wherein the MEMS sensor is mounted on the MEMS sensor.
The method of claim 2,
The step of fabricating the sensor structure layer (200)
Forming a pattern layer (260) for etching on an upper surface of the sensor structure (210);
Partially etching the upper surface of the sensor structure 210 using the pattern layer 260;
Forming an oxide layer (270) on the etched sensor structure (210) after removing the pattern layer (260);
Forming a pattern layer (280) on the oxide layer (270) and partially etching the oxide layer (270) using the pattern layer (280);
Forming a pattern layer (285) on the etched portion of the sensor structure after removing the pattern layer (280);
Removing the pattern layer (285) from the sensor structure (210) after forming a metal layer (290) on the sensor structure (210) on which the pattern layer (285) is formed;
Partially etching the sensor structure (210) using a partially etched oxide layer (270) and removing the oxide layer (270);
Wherein the MEMS sensor is mounted on the MEMS sensor.
The method of claim 2,
The forming of the upper electrode layer (300)
A pattern layer 320 is formed on the lower surface of the upper wafer 310 made of silicon and a via hole 311 is formed on the lower surface of the upper wafer 310 using the pattern layer 320;
Removing the pattern layer (320) from the upper wafer (310);
Forming an insulating layer 330 on the lower surface of the upper wafer 310 and filling the via hole 311 with metal to form a metal plating portion 340;
Removing the metal plating portion to the surface of the insulating layer 330;
A pattern layer 350 is formed on the insulating layer 330 and a metal layer 360 is formed on the insulating layer 330 to be connected to the metal plating layer 340;
Removing the pattern layer (350) on the insulating layer (330);
Wherein the MEMS sensor is mounted on the MEMS sensor.
The method of claim 2, wherein the step of eutectic bonding the upper electrode layer (300) on the fabricated sensor structure layer (200)
The metal layer of the upper electrode layer 300 and the metal layer of the fabricated sensor structure layer 200;
Polishing an upper surface portion of the upper wafer 310 to a surface of the insulating layer 330, and then forming an external insulating layer 370 on the upper surface of the polished upper wafer 310;
Partially etching the external insulating layer 370 using the pattern layer 375 so as to expose the surface of the metal plating part 340 after the pattern layer 375 is formed on the external insulating layer 370;
Forming a metal electrode layer (380) on the outer insulating layer (370) and connected to the metal plating part (340) after removing the pattern layer (375);
Forming a pattern layer 385 on the metal electrode layer 380 and then partially etching the metal electrode layer 380 using the pattern layer 385;
Removing the pattern layer (385);
Wherein the MEMS sensor is mounted on the MEMS sensor.
The method of claim 5,
Wherein a via hole is formed by using a deep reactive ion etching (DRIE) method in the step of forming the via hole (311).
The method of claim 5,
The step of forming the metal plating part 340 may include:
Forming a barrier layer (331) on the insulating layer (330);
Forming a seed layer (332) on the barrier layer (331);
Filling the via hole 311 with a metal material to form a metal plating portion 340;
Wherein the MEMS sensor is mounted on the MEMS sensor.
The method of claim 5,
Wherein the CMP (Chemical Mechanical Polishing) method is used in the step of removing the metal plating part (340) to the surface of the insulating layer (330).

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