TW560028B - MEMS device sealing packaging method and the fabrication method of metal cap thereof - Google Patents
MEMS device sealing packaging method and the fabrication method of metal cap thereof Download PDFInfo
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- TW560028B TW560028B TW091122932A TW91122932A TW560028B TW 560028 B TW560028 B TW 560028B TW 091122932 A TW091122932 A TW 091122932A TW 91122932 A TW91122932 A TW 91122932A TW 560028 B TW560028 B TW 560028B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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Description
五、發明說明(υ 【發明領域】 裝方法及其金屬封蓋 ’並於基板上製作鈍 使封裝微機電元件製 本發明為一種微機電元件密封封 製法,尤指利用基板以鍍製金屬封蓋 化層’以利於該金屬封蓋脫離基板, 程更為容易。 【先前技術】 所謂微機電系統(Micro Electr〇 Mechanical Γ積:rMSJ是將感測器(sensor)、微細結構、電路等以 = 作。由於微機電元件(職S)是以半導體技術 有:諶J且融合機械、電子、材料、光學等加工技術,具 ίιϊ巧、可靠度高、作高難度動作等優點。微機電元 2積體電路晶片的主要不同在》,微機電元件—般都有 =動部件,且比較脆弱,在封裝前不利於運輸,所以微機 電疋件製造與封裝須一同考慮,以致形成一重要研究領域 /請參閱第一圖及第二圖所示,係在第一矽晶基板10a 上形成幕罩層11 a,並利用蝕刻技術在該幕罩層丨丨a上定義 出開口 1 2a,且透過該開口丨2a以濕式蝕刻之方式在第一矽 曰曰基板1 0 a上钱刻出凹部1 3 a,以利用該凹部1 3 a容置微機 電元件20a(MEMS)。 請參閱第二圖及第四圖所示,將第二矽晶基板3〇&之 上端面設置微機電元件2〇a(MEMS),且第二矽晶基板3〇a之 下端面係設有與該微機電元件2〇a (MEMS)連接之電性連接 點31a,並於該第二矽晶基板3〇a上鍍製金屬薄膜32a,該 560028 五、發明說明(2) — 金屬薄膜32a係設置於該微機電元件2〇a之周圍,並於該金 屬薄膜32a上鍍製凸塊33a。 々請參閱第五圖所示,最後將該第一矽晶基板10a與該 第一矽晶基板30a相對準,以使第一矽晶基板1〇a與該凸塊 33a相严結,使該第一矽晶基板1〇a之凹部l3a蓋合於該微 機電元件20a上,以封裝該微機電元件2〇a。 惟,上述習知之微機電元件密封封裝方法仍具有 缺點: 1·習知之微機電元件密封封裝方法,其中第一矽晶基板 1 0a雖可對第二矽晶基板3〇a之微機電元件作密封封 裝,但該第一矽晶基板1〇a之電磁波遮蔽性不佳,以致 於使該微機電元件2〇a易受干擾。 2.習知之微機t元件密封封裝方法,f纟帛二石夕晶基板 3 0a底面5又置電性連接點31a,且使得該微機電元件& 之電性量測不便。 3 習知之微機電元件密封封裴方法, …作為封U體,其體積較大。^該第〜基板 緣是,發明人乃根據此等缺失及依據多年來從事 產品之相1¾驗’悉、心觀察且研究之,乃潛 =運用’而提出一種設計合理且有效改善上 【發明目的】 裝 方去ίΠΐί 一目的’係為提供一微機電元件密封封 方法及/、金屬封蓋製A,係利用第一基板製作金屬封蓋V. Description of the invention (υ [Field of invention] Method for mounting and its metal capping and manufacturing of blunt encapsulation micro-electro-mechanical components on a substrate The present invention is a method for sealing and sealing micro-electro-mechanical components, especially using a substrate to plate metal caps 'Layered layer' is good for the metal cover to be separated from the substrate, and the process is easier. [Previous Technology] The so-called micro electromechanical system (Micro Electromechanical Γ product: rMSJ is a sensor, microstructure, circuit, etc. = As the micro-electro-mechanical element (job S) is based on semiconductor technology, it has the advantages of compactness, high reliability, and difficult movements. It also integrates mechanical, electronic, material, optical and other processing technologies. MEMS 2 The main difference between integrated circuit chips is that micro-electro-mechanical components are generally moving parts and are relatively fragile. They are not conducive to transportation before packaging. Therefore, the manufacturing of micro-electro-mechanical components and packaging must be considered together, forming an important research area. / Please refer to the first and second figures, a curtain layer 11 a is formed on the first silicon substrate 10 a, and an opening 1 is defined on the curtain layer 丨 a by using an etching technique 1 2a, and through the opening 丨 2a, a recess 13a is engraved on the first silicon substrate 10a by wet etching, so as to use the recess 1a to accommodate the micro-electromechanical element 20a (MEMS). Referring to the second and fourth figures, a micro-electromechanical element 20a (MEMS) is disposed on an upper end surface of the second silicon substrate 30 and a lower end surface of the second silicon substrate 30a is provided. There is an electrical connection point 31a connected to the micro-electromechanical element 20a (MEMS), and a metal thin film 32a is plated on the second silicon substrate 30a. The 560028 V. Description of the invention (2)-Metal thin film 32a is disposed around the micro-electromechanical device 20a, and bumps 33a are plated on the metal thin film 32a. 々 Please refer to the fifth figure, and finally the first silicon substrate 10a and the first silicon The crystal substrate 30a is aligned so that the first silicon crystal substrate 10a and the bump 33a are tightly connected, so that the concave portion 13a of the first silicon crystal substrate 10a is covered on the micro-electromechanical element 20a for packaging. The micro-electro-mechanical component 20a. However, the conventional method for sealing and packaging a micro-electro-mechanical component still has disadvantages: 1. The conventional method for sealing and packaging a micro-electro-mechanical component, Although the first silicon substrate 10a can seal the microelectromechanical components of the second silicon substrate 30a, the electromagnetic wave shielding property of the first silicon substrate 10a is not good, so that the microelectromechanical The component 20a is susceptible to interference. 2. The conventional microcomputer t-component hermetic packaging method, the bottom surface 5 of the second crystal substrate 30a and the electrical connection point 31a are placed, and the electrical characteristics of the microelectromechanical component & Inconvenient to measure. 3 The conventional method for sealing and sealing MEMS components,… as a U-shaped body, its volume is relatively large. ^ The first ~ substrate edge is that the inventor has been working on products based on these shortcomings and on the basis of years In order to provide a reasonable design and effective improvement, the purpose of the invention is to provide a method for sealing and sealing micro-electromechanical components and / or metal seals. Cap A, which uses the first substrate to make a metal cap
第5頁 560028 五、發明說明(3)Page 5 560028 V. Description of the invention (3)
且該金屬封蓋之電磁波遮蔽性較佳。 本發明之ί二目的係為提供-微機電元件密封封,方 法及其金屬封蓋製法,係利用第一其 、方 π米基板製造金屬封蓋 替第一石夕晶基板’以減少佔有體積。 、本發明之其f目的’係為提供-微機電元件密封封裝 方法及其金屬封盍製法,易於在該第二基板上 乂 ,且方便於微機電元件被量㈣,因此節省製程及量測=In addition, the metal cover has better electromagnetic wave shielding properties. The two purposes of the present invention are to provide a micro-electromechanical element sealing method, a method and a metal cap manufacturing method thereof. The first cap and a square π-meter substrate are used to manufacture a metal cap instead of the first stone crystal substrate to reduce the occupied volume. . The purpose of the present invention is to provide a method for sealing and packaging a micro-electromechanical element and a metal sealing method thereof, which is easy to be fabricated on the second substrate, and is convenient for the measurement of the micro-electromechanical element, thus saving the manufacturing process and measurement. =
本發明之其四目的’係為提供—微機電元件密封封弟 方法及其金屬封蓋製法’並藉㈣—基板上製作鈍化層, 當金屬封蓋被製作於鈍化層上時,俾可使金屬封蓋與第二 基板連接後易脫離該第一基板。 、本發明之其五目的,係為提供一微機電元件密封封菜 方法及,金屬封蓋製法,其中第一基板可重複使用來製# 金屬封蓋,且不需於該第一基板上再重新製作種子層及劍 化層,使得微機電元件之密封封裝製程縮短及製程時間滅 少’因此降低成本。The fourth purpose of the present invention is to provide-a method for sealing and sealing a micro-electromechanical element and a method for manufacturing a metal cap thereof-and to make a passivation layer on a substrate. When a metal cap is fabricated on the passivation layer, the The metal cover is easily detached from the first substrate after being connected to the second substrate. 5. The fifth object of the present invention is to provide a method for sealing and sealing a micro-electromechanical element and a method for manufacturing a metal cap, wherein the first substrate can be reused to make a # metal cap, and it is not required to be on the first substrate. Re-making the seed layer and the sword layer makes the sealing and packaging process of the micro-electromechanical device shorter and reduces the process time, thus reducing the cost.
、本發明之其六目的,係為提供一微機電元件密封封裝 方法^其金屬封蓋製法,其中係可利用晶圓代替基板,俾 可進行晶圓級之微機電元件密封封裳。 【發明特徵】 依據前述發明目的,本發明之一種微機電元件密封封 裝方去及其金屬封蓋製法,其步驟為提供第一基板,且其 上形成有凹部,另在該第一基板之表面上製作種子層,並Sixth purpose of the present invention is to provide a method for sealing and encapsulating a micro-electromechanical element ^ its metal cap manufacturing method, in which a wafer can be used instead of a substrate, and a wafer-level micro-electromechanical element can be sealed and sealed. [Features of the Invention] According to the foregoing object of the present invention, a method for sealing and packaging a micro-electromechanical element and a method for manufacturing the metal cap of the present invention includes the steps of providing a first substrate with a recess formed thereon, and further forming a surface on the first substrate. Make a seed layer on, and
560028 五、發明說明(4) 於該種子層上另製作鈍化層,在該鈍化層上沉積金屬蓋體 層作為該微機電元件密封封裝方法之金屬封蓋,並提 供第一基板’其上設置有微機電元件,該第二基板之微機 電兀件周圍沉積多層金屬薄膜(UBM),且在該多層金屬薄 膜上,製凸塊,並使第一基板與第二基板對準,以使該金 屬封盍之周緣與該凸塊相互連接,最後將該第一基板移除 ☆為二使貴審查員能進一步了解本發明之特徵及技術 内夺1印參閱以下有關本發明之詳細說明及附圖,然而所 附圖不僅提供參考與說明用,並非用來對本發明加以限制 【較佳實施例】 印參閱第六圖所示,本發明係利用微光刻電鑄模造( A-^E)製程技術及結合積體電路封裝技術來進行微機 密封封裝方法,以利用第—基板1〇製作金屬封蓋3〇 ::將:金屬封蓋30蓋合於第二基板4〇上且相互緊密接合 拖可密封該第一基板40上之微機電件元件5◦,以形成微 機電元件封裝體。 封 第 成 罩 光 請參閱第六圖至第十圖所 封裝方法之金屬封蓋30係在 一基板1 0係可為石夕晶片,其 長氧化石夕層或氮化石夕層以作 層11上塗佈第一光阻層12, 阻層1 2上形成出第一開口 1 3 示’本發明之微機電元件密 第一基板10上製作,其中該 步驟為在該在第一基板1〇上 為幕罩層11,且進一步在幕 並利用光蝕刻技術在該第一 ’及透過第一開口 1 3並使用560028 V. Description of the invention (4) A passivation layer is additionally formed on the seed layer, and a metal cap layer is deposited on the passivation layer as a metal cap for the method of sealing and encapsulating the microelectromechanical element, and a first substrate is provided thereon. A micro-electromechanical element, a multilayer metal film (UBM) is deposited around the micro-electromechanical element of the second substrate, and bumps are formed on the multilayer metal film, and the first substrate and the second substrate are aligned so that the metal The perimeter of the seal is connected to the bump, and finally the first substrate is removed. ☆ In order to allow your examiner to better understand the features and technology of the present invention, please refer to the following detailed description of the present invention and the accompanying drawings. However, the attached drawings are not only for reference and explanation, but are not intended to limit the present invention. [Preferred Embodiment] As shown in FIG. 6, the present invention uses a microlithography electroforming mold manufacturing (A- ^ E) process. Technology and integrated circuit packaging technology to carry out a microcomputer sealed packaging method to use the first substrate 10 to make a metal cover 30 :: The metal cover 30 is placed on the second substrate 40 and tightly bonded to each other The sealing member may be a micro-electromechanical element 5◦ 40 on the first substrate to form a MEMS device package. For sealing, please refer to the sixth to tenth figures. The metal cover 30 of the packaging method is a substrate 10, which can be a stone wafer, and a long oxide stone layer or a nitride stone layer can be used as the layer 11 A first photoresist layer 12 is coated thereon, and a first opening 13 is formed on the resist layer 12 to indicate that the micro-electromechanical element of the present invention is fabricated on a dense first substrate 10, wherein this step is performed on the first substrate 10. The upper layer is the curtain cover layer 11 and is further used on the curtain and using photo-etching technology on the first ′ and through the first opening 13 and used
第7頁 560028 五、發明說明 電漿蝕刻技術蝕刻該幕罩層1 1,以在該幕罩層i丨上形成幕 罩開口 1 4,待除去第一光阻層i 2後透過蝕刻該幕罩層丨i以 利用濕式異向性蝕刻技術在該第一基板丨〇上蝕刻出凹部^ 5 ^請參閱第十一圖及第十二圖所示,在第一基板10上以 薄膜沉積之方式沉積種子層16以做為導電層,並在該種子 層16上以電鍍金屬層之方式鍍製金屬層17,該金屬層17係 可為鎳(Ni)或銘化鎳(NiCo)之金屬材質,並將該金屬層17 之表面作純化處理,該鈍化處理之方式係為氧氣電漿(〇2 plasma)、自然氧化(Natural ox idat ion)、化學反應( Chemical reaction)、電化學反應(electr〇chemical reaction),其中化學反應係可利用雙氧水與該金屬層17 做化學反應,以形成該鈍化層1 8。 請參閱第十三圖及第十四圖所示,再將該第一基板1〇 之表面上塗佈第二光阻層19,且利用光蝕刻技術在該第二 光阻層19上定義出第二開口20,且該第二開口2〇係連通於 該凹部15,以利用該第二開口20定義出金屬封蓋3〇之區域 ’最後以電鍍金屬層之方式在該第一基板10之鈍化層18上 鍍製出作為金屬封蓋30之金屬蓋體層,以封裝該微機電元 件50 〇 請參閱第六圖、第十五圖至第十七圖所示,在該第二 基板4 0上製作電路層41,並將該微機電元件5〇設置於該第 ^一^基板40上’且該微機電元件50係與該電路層41電性連接 ,以使該金屬封蓋30蓋置於第二基板40上時,該電路層41 560028 五、發明說明(6) 係為該微機電元件50對外接聯繫之電性連接處,並在該電 路層4 1上設置一絕緣層4 2,並於該絕緣層之預定處以薄膜 沉積之方式沉積多層金屬薄膜43(通稱為UBM,Under Bump Metallurgy),此多層金屬薄膜43係採用鉻/金(Cr/Au)或 鈦/金(Ti/Au)等複合鍍層,並在該多層金屬薄膜43上以電 鍍之方式鍍製凸塊44,該凸塊44係為銲錫材料。 请參閱第十八圖及第十九圖所示,再以雙面對準技術 將先前之第一基板10與第二基板40對準,並利用共晶接合 技術將金屬封盍30與第二基板40上之凸塊44相接合,且藉 由該第一基板10之鈍化層18之設置,使該金屬封蓋μ易於 脫離該第一基板1〇,以使該金屬封蓋3〇接合 40之凸塊44上,以製成微機電元件封裝體。…第一基板 其中,請參閱第十九圖及第二十圖所示,上述之基板 1〇,40係可為晶圓,以在第一晶圓6〇上製作該金屬封蓋 ,且在第二晶圓61上設置該微機電元件5〇以進行晶圓級封 裝’待該金屬封蓋30與該第二晶圓61接合後,使曰 60脫離該金屬封蓋3〇並切割該第二晶圓61,以形成個=之 微機電元件封裝體。 金屬’本發明t「微機電元件密封封裝方法及其 屬封盍i法」係利用微光刻電鑄模造(liga 技=結合積體電路封裝技術來進行微機 )二 ’其中沉積種子層於第一基板上以作為導電層, 一基板上製作金屬封蓋,並藉由在種子 以利於合属44鞏始〜 9丄乃I tF純化層 利於金屬封盍脫離該第一基板,且該第—基板可重複使Page 7 560028 V. Description of the invention Plasma etching technology etches the curtain cover layer 11 to form a curtain cover opening 14 on the curtain cover layer i 丨. After the first photoresist layer i 2 is removed, the curtain is etched through The cover layer i uses a wet anisotropic etching technique to etch a recess on the first substrate. ^ 5 ^ Please refer to FIG. 11 and FIG. 12, and deposit a thin film on the first substrate 10. The seed layer 16 is deposited as a conductive layer, and a metal layer 17 is plated on the seed layer 16 by electroplating a metal layer. The metal layer 17 may be nickel (Ni) or nicked nickel (NiCo). Metal material, and the surface of the metal layer 17 is purified. The passivation method is oxygen plasma, natural ox idat ion, chemical reaction, electrochemical reaction. Electrochemical reaction, wherein the chemical reaction system can use hydrogen peroxide to chemically react with the metal layer 17 to form the passivation layer 18. Please refer to FIG. 13 and FIG. 14. Then, a second photoresist layer 19 is coated on the surface of the first substrate 10, and the second photoresist layer 19 is defined by using photo-etching technology. A second opening 20, and the second opening 20 is connected to the recessed portion 15 so as to use the second opening 20 to define a region of the metal cover 30. Finally, a metal layer is plated on the first substrate 10 The passivation layer 18 is plated with a metal cover layer as a metal cover 30 to encapsulate the micro-electromechanical element 50. Please refer to the sixth, fifteenth to seventeenth figures, and the second substrate 4 0 A circuit layer 41 is fabricated thereon, and the micro-electro-mechanical element 50 is disposed on the first substrate 40. The micro-electro-mechanical element 50 is electrically connected to the circuit layer 41, so that the metal cover 30 is covered. When on the second substrate 40, the circuit layer 41 560028 5. Description of the invention (6) is the electrical connection of the microelectromechanical element 50 to the external connection, and an insulating layer 4 2 is provided on the circuit layer 41 And deposit a multilayer metal film 43 (commonly referred to as UBM, Under Bump M) in a thin film deposition manner at a predetermined position of the insulating layer etallurgy), the multilayer metal film 43 is a composite plating layer such as chromium / gold (Cr / Au) or titanium / gold (Ti / Au), and the bumps 44 are plated on the multilayer metal film 43 by electroplating. The bump 44 is a solder material. Please refer to the eighteenth and nineteenth figures, and then use the double-sided alignment technology to align the first substrate 10 and the second substrate 40, and use the eutectic bonding technology to seal the metal seal 30 and the second substrate The bumps 44 on the substrate 40 are bonded, and the passivation layer 18 of the first substrate 10 is provided, so that the metal cap μ is easily separated from the first substrate 10, so that the metal cap 30 is bonded to the 40 The bump 44 is formed on the bump 44 to form a micro-electromechanical device package. … The first substrate, please refer to FIG. 19 and FIG. 20, the above-mentioned substrates 10 and 40 can be wafers, so that the metal cap can be made on the first wafer 60, and The micro-electro-mechanical element 50 is disposed on the second wafer 61 for wafer-level packaging. After the metal cap 30 is bonded to the second wafer 61, the 60 is separated from the metal cap 30 and the first wafer is cut. Two wafers 61 to form a micro-electromechanical device package. The metal "the method for sealing and encapsulating micro-electromechanical elements of the present invention and its method of encapsulation" uses microlithography electroforming molding (liga technology = combined with integrated circuit packaging technology to perform microcomputers). A substrate is used as a conductive layer, a metal cap is made on a substrate, and a seed layer is used to facilitate the genus 44 ~ 9 ~ I 丄 F purification layer to facilitate the metal seal to escape from the first substrate, and the- Substrate can be repeatedly used
第9頁 560028 五、發明說明(7) 用且不需再重新製作種子層及鈍化層,使得微機電元件之 密封封裝之製程縮短及製程時間減少,因此降低成本。 惟,以上所述僅為本發明之較佳可行實施例,非因此 拘限本發明之專利範圍,故舉凡運用本發明之說明書及圖 示内容所為之等效結構變化,均同理皆包含於本發明之範 圍内,給予陳明。Page 9 560028 V. Description of the invention (7) The seed layer and the passivation layer need not be re-made, so that the manufacturing process of the sealed package of the micro-electromechanical component is shortened and the processing time is reduced, thus reducing the cost. However, the above are only the preferred and feasible embodiments of the present invention, and are not intended to limit the scope of the patent of the present invention. Therefore, any equivalent structural changes made by using the description and illustration contents of the present invention are included in the same reason. Within the scope of the present invention, Chen Ming is given.
第10頁 560028 圖式簡單說明 第-圖至第五圖係習知 义城機電TL件密封 圖 封裝方法之流程 第六圖係本發明之微機電元 ^ 第七圖至第十圖係本發 體d面圖 在基板上製作凹部之流程® 在封封裝方法中, 第十-圖j第十四圖係本發明之微機電元 产 中J在基板上鐘製金屬封蓋之製二封裝方法 第十五圖至第十九圖係本發明之微機電元件:程圖 之流程圖 千费封封裝方法 第二十圖係本發明之晶圓級微機電元件 圖 ^封裝方法剖面 符號說明 習知 第一石夕晶基板l〇a 幕罩層11 a 開口 12a 凹部13a 微機電元件2 〇 a 第二矽晶基板30a 電性連接點3 1 a 金屬薄膜32a 凸塊3 3 a 本發明 第一基板10 幕罩層11 第一光阻層i 2 第一開口 1 3 幕罩開口 1 4 凹部15 種子層1 6 金屬層1 7 鈍化層1 8 第二光阻層1 9 第二開口 2 〇 1ΜΪ 第11頁 560028 圖式簡單說明 金屬封蓋3 0 第二基板40 電路層41 絕緣層42 多層金屬薄膜43 凸塊44Page 560028 Brief description of the diagrams Figures-Figures 5 to 5 are the flow chart of the sealing method of the TL component sealing drawing of the conventional city of Yicheng. The sixth figure is the micro-electromechanical element of the present invention ^ The seventh to tenth figures are the body d Top view of the process of making a recess on a substrate ® In the encapsulation method, the tenth to the tenth figure are the tenth method of the micro-electromechanical production of the present invention. The second method is the tenth method of making a metal cap on the substrate. Figures 5 to 19 are the micro-electro-mechanical components of the present invention: a flow chart of the process diagram. The package method of the tens of thousands of packages is a diagram of the wafer-level micro-electro-mechanical components of the present invention. Shi Xijing substrate 10a curtain cover layer 11a opening 12a recess 13a microelectromechanical device 2 〇a second silicon substrate 30a electrical connection point 3 1 a metal thin film 32a bump 3 3 a first substrate 10 curtain of the present invention Cover layer 11 First photoresist layer i 2 First opening 1 3 Curtain opening 1 4 Recess 15 Seed layer 1 6 Metal layer 1 7 Passivation layer 1 8 Second photoresist layer 1 9 Second opening 2 〇1ΜΪ Page 11 560028 Schematic illustration of metal cover 3 0 Second substrate 40 Circuit layer 41 Insulation layer 42 Multi-layer Metal thin film 43 bump 44
微機電件元件50 第一晶圓6 0 第二晶圓6 1MEMS component 50 First wafer 6 0 Second wafer 6 1
第12頁Page 12
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TW091122932A TW560028B (en) | 2002-10-04 | 2002-10-04 | MEMS device sealing packaging method and the fabrication method of metal cap thereof |
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Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7384729B2 (en) | 2005-06-07 | 2008-06-10 | National Tsing Hua University | Method of manufacturing a LIGA mold by backside exposure |
CN101870447A (en) * | 2009-04-22 | 2010-10-27 | 昆山西钛微电子科技有限公司 | Manufacturing process of chip through silicon via (TSV) packaging technology of micro electro mechanical system (MEMS) |
CN102786026A (en) * | 2012-08-23 | 2012-11-21 | 江苏物联网研究发展中心 | Film seal cap packaging structure for MEMS (micro electro mechanical system) optical device and manufacturing method of film seal cap packaging structure |
US10595424B2 (en) | 2014-12-26 | 2020-03-17 | Hitachi Metals, Ltd. | Hermetic sealing lid member |
CN113023661A (en) * | 2019-12-09 | 2021-06-25 | 觉芯电子(无锡)有限公司 | Micro mirror and manufacturing method |
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2002
- 2002-10-04 TW TW091122932A patent/TW560028B/en not_active IP Right Cessation
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7384729B2 (en) | 2005-06-07 | 2008-06-10 | National Tsing Hua University | Method of manufacturing a LIGA mold by backside exposure |
CN101870447A (en) * | 2009-04-22 | 2010-10-27 | 昆山西钛微电子科技有限公司 | Manufacturing process of chip through silicon via (TSV) packaging technology of micro electro mechanical system (MEMS) |
CN101870447B (en) * | 2009-04-22 | 2014-03-05 | 昆山西钛微电子科技有限公司 | Manufacturing process of chip through silicon via (TSV) packaging technology of micro electro mechanical system (MEMS) |
CN102786026A (en) * | 2012-08-23 | 2012-11-21 | 江苏物联网研究发展中心 | Film seal cap packaging structure for MEMS (micro electro mechanical system) optical device and manufacturing method of film seal cap packaging structure |
CN102786026B (en) * | 2012-08-23 | 2015-04-22 | 江苏物联网研究发展中心 | Film seal cap packaging structure for MEMS (micro electro mechanical system) optical device and manufacturing method of film seal cap packaging structure |
US10595424B2 (en) | 2014-12-26 | 2020-03-17 | Hitachi Metals, Ltd. | Hermetic sealing lid member |
US11178786B2 (en) | 2014-12-26 | 2021-11-16 | Hitachi Metals, Ltd. | Method for manufacturing hermetic sealing lid member |
CN113023661A (en) * | 2019-12-09 | 2021-06-25 | 觉芯电子(无锡)有限公司 | Micro mirror and manufacturing method |
CN113023661B (en) * | 2019-12-09 | 2024-05-28 | 觉芯电子(无锡)有限公司 | Micro-mirror and manufacturing method |
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