KR101365898B1 - Organic light emitting device - Google Patents

Abstract

The present invention provides a substrate, a display unit on the substrate, the display unit including a subpixel and a monitoring pixel, a first wiring for supplying a voltage to the subpixel and a monitoring pixel, and a second wiring for supplying DC power to the monitoring pixel. And an organic light emitting display including a data line for applying an electrical signal for displaying an image image to the subpixel, and a dummy line disposed between the second line and the data line and electrically connected to the first line. Provide the device.

Description

[0001] The present invention relates to an organic light emitting device,

1 is a plan view illustrating an organic light emitting display device according to an exemplary embodiment of the present invention.

FIG. 2 is an enlarged view of a portion A of FIG. 1.

3 is a cross-sectional view taken along the line II ′ of FIG. 2.

4A is a circuit diagram illustrating a power supply method of a monitoring unit and a display unit of an organic light emitting display device according to an exemplary embodiment of the present invention.

4B is a driving timing diagram illustrating a power supply method of a monitoring unit and a display unit of an organic light emitting display device according to an exemplary embodiment of the present invention.

5 is an example of a subpixel circuit of an organic light emitting display device according to an embodiment of the present invention.

6 is another example of a subpixel circuit of an organic light emitting display device according to an embodiment of the present invention.

The present invention relates to an organic light emitting display.

Among the flat panel display devices, the electroluminescent display is a self-luminous display that does not require a backlight, so it can be light and thin, simplify the process, can be manufactured at low temperatures, and has a response speed of 1 ms or less. As a result, it has a high response speed and exhibits characteristics such as low power consumption, wide viewing angle, and high contrast.

In particular, the organic light emitting display device includes a light emitting layer including an organic material between an anode and a cathode, and holes supplied from the anode and electrons received from the cathode combine in the organic light emitting layer to form an exciton, a hole-electron pair. The excitons emit light by the energy generated when they return to the ground state.

Since the organic light emitting display device includes a light emitting layer including an organic material, when the external moisture and oxygen penetrate into the display device, the organic light emitting display device is easily deteriorated. In addition, as the driving time of the organic light emitting display device increases, the light emitting layer is easily deteriorated by heat generated in the driving device.

In addition, since the light emitting layer has semiconductor characteristics, it is very easily influenced by external temperature. That is, the amount of current flowing through the light emitting diode is easily changed as the ambient temperature rises and falls.

Therefore, the organic light emitting display device as described above has a disadvantage in that it is difficult to always provide a screen of the same quality because the amount of voltage to be applied to achieve the same brightness may vary depending on the degree of deterioration. Therefore, in order to compensate for the value of the voltage which varies with the degree of deterioration or the temperature of the organic light emitting display device, a monitoring pixel is formed in the non-light emitting area around the display unit.

The monitoring pixel includes a light emitting diode formed by the same process as a subpixel of the organic light emitting display device, and receives a DC power of a predetermined size for a predetermined time. In this case, by measuring the magnitude of the voltage applied to the monitoring pixel, and providing the measured voltage to the subpixels of the display unit, voltage compensation according to deterioration or temperature may be performed.

However, since the voltage measurement of the monitoring pixel is performed during the driving of the organic light emitting display device, there is a problem that a deviation occurs in the magnitude of the measured voltage. That is, since the signal applied to the monitoring pixel is a DC power supply, and the data signal applied to the subpixel is an AC signal, the wiring for transmitting the DC power to the monitoring pixel and the wiring for transmitting the data signal to the subpixel located adjacent to the monitoring pixel. Interference of the signal occurs between the measured voltage may vary. As a result, there is a problem in that it is impossible to transfer an accurate compensation voltage according to deterioration and temperature to the subpixel of the display unit.

Accordingly, the present invention provides an organic light emitting display device capable of providing a screen having a uniform quality by preventing interference between a wiring for transmitting a DC power to a monitoring pixel and a wiring for transmitting an AC signal to a subpixel adjacent to the monitoring pixel. Its purpose is to provide.

In order to achieve the above object, the present invention provides a substrate, a display unit positioned on the substrate, the display unit including a subpixel and a monitoring pixel, a first wiring supplying a voltage to the subpixel and the monitoring pixel, and the monitoring pixel. A second wiring for supplying DC power, a third wiring for applying an electrical signal for displaying an image image to the sub-pixel, and a second wiring and the third wiring to be electrically connected to the first wiring. The present invention provides an organic light emitting display device including dummy wirings.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[Example]

1 is a plan view illustrating a structure of an organic light emitting display device according to an embodiment of the present invention, and FIG. 2 is an enlarged view of portion A of FIG. 1.

1 and 2, the organic light emitting display device 100 according to an exemplary embodiment of the present invention is positioned outside the substrate 105, the display unit 110 disposed on the substrate, and the display unit 110. It includes a monitoring unit 120.

The display unit 110 is positioned in an area intersected by the scan line and the data line and includes a plurality of red, green, and blue subpixels 115 for displaying an image image. The monitoring unit 120 includes red, green, and blue monitoring pixels 125, and the red, green, and blue monitoring pixels 125 are arranged in a line for each color.

The subpixel 115 and the monitoring pixel 125 include a light emitting diode including at least a first electrode, a light emitting layer, and a second electrode. Here, the first electrode may be a transmissive electrode including a transparent conductive layer, and the second electrode may be a reflective electrode. Therefore, light generated in the light emitting layer is reflected by the second electrode and is emitted toward the rear surface of the substrate.

Hereinafter, a subpixel and a monitoring pixel of an organic light emitting display device according to an embodiment of the present invention will be described in detail with reference to FIGS. 4A to 6.

4A is a circuit diagram illustrating a subpixel and a monitoring pixel of an organic light emitting display device according to an embodiment of the present invention, and FIG. 4B is a subpixel and a monitoring pixel of an organic light emitting display device according to an embodiment of the present invention. 5 and 6 are circuit diagrams illustrating a subpixel circuit of an organic light emitting display device according to an exemplary embodiment of the present invention.

Referring to FIG. 4A, a DC power supply Vi is connected to the monitoring pixel 125. The first switch SW1 is positioned between the monitoring pixel 125 and the DC power supply Vi, and DC power is supplied or stopped to the monitoring pixel 125 by turning on / off the first switch SW1.

The subpixel 115 is connected to the node A between the DC power supply Vi and the first switch SW1. The second switch SW2 is positioned between the subpixel 115 and the node A, and the capacitor C1 is positioned between the second switch SW2 and the subpixel 115. An amplifier Amp may be positioned between the capacitor C1 and the subpixel 115.

The monitoring pixel 125 may include at least a light emitting diode and may further include a thin film transistor although not shown. In addition, the subpixel 115 may include at least a light emitting diode and may have a structure shown in FIGS. 5 and 6.

Referring to FIG. 5, a subpixel may include a first transistor M1 transferring a data signal from a scan line Sn by a scan signal, a capacitor Cst storing a data signal, and a data signal stored in the capacitor Cst. The second transistor M2 may generate a driving current corresponding to the difference in the power supply voltage Vdd, and the light emitting diode OLED may emit light corresponding to the driving current.

As shown in FIG. 6, the subpixels include a first transistor T1 that transfers a data signal from the scan line Sn by a selection signal, a capacitor Cst, and a capacitor Cst that store the data signal. The second transistor T2 generates a driving current corresponding to the difference between the data signal stored in the power supply voltage and the power supply voltage, the light emitting diode OLED emitting the light corresponding to the driving current, and the selection signal from the erase line En. It may include a third transistor (T3) for canceling the data signal stored in the capacitor.

In the pixel circuit shown in FIG. 6, when an organic light emitting display device is driven by a digital driving method in which one frame is divided into a plurality of subfields to express gray levels, an erase signal is applied to a subfield having a light emission time smaller than an address time. The light emission time can be adjusted by supplying. Therefore, there is an advantage in that the minimum luminance of the organic light emitting display device can be lowered.

Next, referring to FIGS. 4A and 4B, the operation of the monitoring pixel 125 and the subpixel 115 will be described. When the first switch SW1 is turned on, the DC power is monitored from the DC power supply Vi. Supplied to the pixel 125. After that, when the second switch SW2 is turned on, the voltage applied to the monitoring pixel 125 by the supply of DC power is stored in the capacitor C1, and the stored voltage is amplified by the amplifier Amp to serve. It becomes a voltage supply source for driving the pixel 115. Next, when the second switch SW2 is turned off, the subpixel 115 is driven by the voltage stored in the capacitor C1 until the second switch SW2 is turned on again. That is, the monitoring pixel 125 is supplied with a DC power of a predetermined size for a predetermined time, and the subpixel 115 is provided with a voltage having the same size as the voltage applied to the monitoring pixel 125 by the DC power.

The time at which the monitoring pixel 125 is supplied with the DC power may be determined to adjust the degree of deterioration due to the driving of the subpixel 115 and the monitoring pixel 125 to substantially the same level. Therefore, since the monitoring pixel 125 may reflect the degree of deterioration of the subpixel 115 as well as the ambient temperature, the monitoring pixel 125 may provide the subpixel 115 with a compensation voltage according to the temperature and deterioration. The voltage measurement of the monitoring pixel 125 may be performed every frame or may be performed every few frames.

Meanwhile, referring back to FIGS. 1 and 2, the driver 160 for applying an electrical signal to the display unit 110 or the monitoring unit 120 is positioned on the substrate. The driver 160 may include a scan driver or a data driver that applies a scan signal or a data signal to the display unit 110.

The pad unit 170 may be positioned at one end of the substrate 105. Although not shown, the pad unit 170 may be connected to a printed circuit board or a connection part on which a printed circuit board is formed. The printed circuit board may include a memory unit, a time controller, and a power supply unit. As a result, the pad unit 170 transmits an electrical signal from the printed circuit board to the driving unit, or the display unit 110 or the monitoring unit 120. ) Can be powered.

One end of the wires is connected to the display unit 110 and the monitoring unit 120. The wires are electrically connected to the first wiring 135b for supplying power to the display unit 110 and the monitoring unit 120, the second wiring 135c for supplying DC power to the monitoring pixel 125, and the subpixel 115. It includes a third wiring (135e) for applying the.

The first line 135b may be a reference voltage supply line for supplying a reference voltage to the display unit 110 and the monitoring unit 120, and the other end of the first line 135b may be connected to the pad unit 170. The second wiring 135c may be a DC power supply wiring for supplying DC power to the monitoring pixel 125, and the other end of the second wiring 135c may be connected to the driving unit 160. The third wiring 135e may be a data line for supplying a data signal to the subpixel 115, and the other end of the third wiring 135e may be connected to the driver 160. Therefore, a voltage having a constant magnitude is always applied to the first wiring 135b, a DC signal is applied to the second wiring 135c, and an AC signal for representing an image image is applied to the third wiring 135e.

In an embodiment of the present invention, it is assumed that a DC power supply unit supplying DC power to the monitoring pixel 125 is located in the driving unit 160, and the other end of the second wiring 135c is connected to the driving unit 160. However, when the DC power supply unit is located in the printed circuit board, the other end of the second wiring 135c may be connected to the pad unit 170.

The dummy wiring 135d may be located between the second wiring 135c and the third wiring 135e. Here, the dummy wiring 135d is electrically connected to the first wiring 135b. Although not shown, the dummy wiring 135d may be patterned to be electrically connected to the first wiring 135b at the inside or the end of the substrate, and the dummy wiring 135d and the first wiring 135b may be dummy wiring 135d. And may be electrically connected to each other through a connection electrode formed through the insulating layer positioned above or below the first wiring 135b.

Therefore, the organic light emitting display device according to the exemplary embodiment of the present invention is positioned between the second wiring 135c and the third wiring 135e for supplying DC power to the monitoring unit 120, and the first wiring 135b. ) And a dummy wiring 135d electrically connected to each other. Therefore, the third wiring 135e positioned adjacent to the second wiring 135c forms a capacitance with the dummy wiring 135d. As a result, signal interference between the second wiring 135c and the third wiring 135e, which has occurred in the past, is prevented, and the second wiring 135c can supply the accurate DC power to the monitoring unit.

3 is a cross-sectional view taken along the line II ′ of FIG. 2. Hereinafter, a cross-sectional structure of an organic light emitting display device according to an embodiment of the present invention will be described in detail with reference to FIGS. 1 to 3.

1 to 3, the buffer layer 105 is positioned on the substrate 100. The buffer layer 105 is formed to protect the thin film transistor formed in a subsequent process from impurities such as alkali ions flowing out of the substrate 100, and selectively using silicon oxide (SiO ₂ ), silicon nitride (SiNx), or the like. To form.

The semiconductor layer 131 is positioned on the buffer layer 105. The semiconductor layer 131 may include amorphous silicon or polycrystalline silicon obtained by crystallizing the same. Although not illustrated here, the semiconductor layer 131 may include a channel region, a source region, and a drain region, and the source region and the drain region may be doped with P-type or N-type impurities.

The gate insulating layer 133 is positioned on the substrate 105 including the semiconductor layer 131. The gate insulating layer 133 may be selectively formed using silicon oxide (SiO ₂ ), silicon nitride (SiNx), or the like.

The gate electrode 135a is positioned on the gate insulating layer 133 to correspond to a predetermined region of the semiconductor layer 131, that is, to correspond to the channel region. The first wiring 135b for supplying a reference voltage to the display unit 110 and the monitoring unit 120 and the second wiring for supplying DC power to the monitoring unit 120 on the wiring region of the gate insulating layer 133. 135c), a third wiring 135e for applying an electrical signal to display an image image on the display unit 110, and a dummy wiring positioned between the second wiring 135c and the third wiring 135e ( 135d). Although not shown, the dummy wiring 135d is electrically connected to the first wiring 135b.

The gate electrode 135a, the first to third wirings 135b, 135c, and 135e and the dummy wiring 135d may be formed of aluminum (Al), aluminum alloy (Al alloy), titanium (Ti), silver (Ag), and molybdenum ( Mo), molybdenum alloy (Mo alloy), tungsten (W), tungsten silicide (WSi ₂ ) It may include any one.

An interlayer insulating layer 139 is disposed on the substrate 105 including the gate electrode 135a, the first to third wirings 135b, 135c, and 135e, and the dummy wiring 135d. The interlayer insulating film 139 may be an organic film or an inorganic film, or a composite film thereof. have. When the interlayer insulating layer 139 is an inorganic layer, it may include silicon oxide (SiO ₂ ), silicon nitride (SiNx), or SOG (silicate on glass), and in the case of an organic layer, acrylic resin, polyimide resin, or benzocyclobutene It may include a (benzocyclobutene, BCB) resin. First and second contact holes 137a and 137b exposing portions of the semiconductor layer 131 may be disposed in the interlayer insulating layer 139 and the gate insulating layer 133, and the interlayer insulating layer 139 may have a first wiring. It may include a via hole 138 exposing a portion of the (135b).

The first electrode 141 is positioned on the interlayer insulating film. The first electrode may be an anode and may include a transparent conductive layer such as indium tin oxide (ITO) or indium zinc oxide (IZO). Alternatively, the first electrode 141 may have a stacked structure such as ITO / Ag / ITO.

Source and drain electrodes 143a and 143b are disposed on the interlayer insulating layer 139. The source electrode and the drain electrode 143a and 143b are electrically connected to the semiconductor layer 131 through the first and second contact holes 137a and 137b, and a part of the drain electrode 143b is the first electrode 141. ) And electrically connected to the first electrode 141.

The source and drain electrodes 143a and 143b may include a low resistance material to reduce wiring resistance, and may include a multilayer film made of molybdenum tungsten (MoW), titanium (Ti), aluminum (Al), or an aluminum alloy (Al alloy). Can be. As the multilayer film, a laminated structure of titanium / aluminum / titanium (Ti / Al / Ti) or molybdenum tungsten / aluminum / molybdenum tungsten (MoW / Al / MoW) may be used.

The bank layer 145 exposing a part of the first electrode 141 is disposed on the first electrode 141. The bank layer 145 may include an organic material such as benzocyclobutene (BCB) -based resin, acrylic resin, or polyimide resin.

The emission layer 147 is positioned on the exposed first electrode 141. The emission layer 147 may include an organic material. Although not shown, a hole injection layer and a hole transport layer may be formed between the first electrode 141 and the organic emission layer 147, and the electrons may be formed on the organic emission layer 147. A transport layer and an electron injection layer can be formed.

The second electrode 149 is positioned on the emission layer 147. The second electrode 149 may be a cathode for supplying electrons to the light emitting layer 147, and may include magnesium (Mg), silver (Ag), calcium (Ca), aluminum (Al), or an alloy thereof. . The first electrode 141, the light emitting layer 147, and the second electrode 149 form a light emitting diode 150.

As described above, the organic light emitting display device according to an embodiment of the present invention includes a dummy wiring positioned between the second wiring for supplying DC power to the monitoring unit and the third wiring for applying an AC signal to the subpixel. do. The dummy wiring is electrically connected to the first line for supplying a reference voltage to form a capacitance with the third wiring, thereby preventing signal interference between the third and second wirings for supplying an electrical signal to the display unit. Therefore, the organic light emitting display device according to an embodiment of the present invention can transmit the correct voltage from the monitoring unit to the display unit, so that the luminance is uniform and the screen quality can be improved.

As described above, the present invention has the effect of improving the quality of the screen of the organic light emitting display device.

Claims (12)

Board; A display unit on the substrate and including a subpixel and a monitoring pixel; A first wiring supplying voltage to the subpixel and the monitoring pixel; A second wiring supplying DC power to the monitoring pixel; A third wiring for applying an electrical signal for displaying a video image to the subpixel; And Located between the second wiring and the third wiring, including a dummy wiring electrically connected to the first wiring, And the dummy line forms capacitance with the third line to prevent signal interference between the second line and the third line. The method of claim 1, The subpixel or the monitoring pixel may include a semiconductor layer, a gate insulating layer on the semiconductor layer, a gate electrode positioned to correspond to the semiconductor layer, a source electrode and a drain electrode electrically connected to the semiconductor layer, And a thin film transistor having an interlayer insulating film insulating the gate electrode, the source electrode, and the drain electrode. 3. The method of claim 2, The subpixel or the monitoring pixel includes a light emitting diode electrically connected to the thin film transistor and having a first electrode, an organic light emitting layer, and a second electrode. 3. The method of claim 2, The first to third wirings and the dummy wirings include the same material as the gate electrode. delete delete delete The method of claim 1, And a direct current power supply unit for supplying direct current power to the monitoring pixel, wherein the direct current power supply unit is a driving unit for applying a driving signal to the display unit or a connection unit connected to the substrate. delete delete The method of claim 1, The subpixel emits a light corresponding to the driving current and a first transistor for transmitting a data signal in response to a scan signal, a capacitor for storing the data signal, a second transistor for generating a driving current corresponding to the data signal, and a light corresponding to the driving current. An organic light emitting display device comprising a light emitting diode. The method of claim 1, The subpixel may include a first transistor for transmitting a data signal in response to a scan signal, a capacitor for storing the data signal, a second transistor for generating a driving current corresponding to the data signal, and erasing a data signal stored in the capacitor. An organic light emitting display device comprising a light emitting diode emitting light corresponding to a driving current generated by the third transistor and the second transistor.

Images