KR101340992B1 - Liquid crystal display device and the method for manufacturing the same - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a method of manufacturing the same. In particular, a liquid crystal display device includes a thin film transistor formed on an intersection of a gate line and a data line and a gate line and a data line defining a pixel area crossing each other on a substrate. And a common line formed to overlap the gate line, and a pixel electrode electrically connected to the thin film transistor and formed in the pixel region.

Gate Line, Common Line, Opening Ratio, Storage on Common

Description

Liquid crystal display and its manufacturing method {LIQUID CRYSTAL DISPLAY DEVICE AND THE METHOD FOR MANUFACTURING THE SAME}

FIG. 1 is a plan view showing a conventional liquid crystal display

2 is a plan view showing a liquid crystal display device according to the present invention.

3 is a cross-sectional view of a liquid crystal display according to the present invention taken along line II ′.

4A to 4D are cross-sectional views illustrating a method of manufacturing a liquid crystal display device according to the present invention.

<Name of main part of drawing>

12, 112: gate line 18, 118: data line

30, 130: common lines 26, 126: pixel electrodes

12a and 112a: gate electrode 18a and 118a: source electrode

20, 120: drain electrode 116: semiconductor layer

124: pixel contact hole 132: first contact hole

134: second contact hole

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a method for manufacturing the same, and more particularly, to a liquid crystal display device and a method for manufacturing the same for forming an aperture ratio by overlapping a common line with a gate line.

In recent years, there has been a demand for a display device in accordance with the development of an information society, and in recent years, a display device such as a liquid crystal display (LCD), a plasma display panel (PDP), an electro luminescent display (ELD), a vacuum fluorescent display ) Have been studied, and some of them have already been used as display devices in various devices.

Among them, liquid crystal display devices are mostly used while substituting CRT (Cathode Ray Tube) for the purpose of a portable image display device because of their excellent image quality, light weight, thinness and low power consumption. A television receiving and displaying a broadcast signal, a monitor of a computer, and the like.

In order for liquid crystal display devices to be used in various parts as a general screen display device, it is important to develop high-quality images such as high definition, high brightness and large area while maintaining the features of light weight, thinness and low power consumption can do.

Hereinafter, a liquid crystal display according to the related art and a manufacturing method thereof will be described.

1 is a plan view showing a conventional liquid crystal display device.

The liquid crystal display according to the related art has a plurality of gate lines 12 formed in one direction at regular intervals on a first substrate (not shown), the gate electrodes 12a protruding therefrom, and the gate lines 12. The pixel region is intersected with a plurality of common lines 30 formed so as not to overlap the gate line 12 so as to be parallel, a semiconductor layer (not shown) and a gate line 12 formed on the gate electrode 12a. A data line 18 to be defined, a drain electrode 20 formed to be spaced apart from the source electrode 18a and the source electrode 18a protruding from the data line 18, and the drain electrode 20. And a pixel electrode 26 electrically connected to the pixel region.

A gate insulating film (not shown) is provided between the gate line 12 and the data line 18 to insulate the interlayers. A protective film (not shown) is interposed between the data line 18 and the pixel electrode 26. In this case, a contact hole 24 is formed in the passivation layer on the drain electrode 20 to electrically connect the drain electrode 20 and the pixel electrode 26 through the contact hole 24.

Although not shown in the drawings, the second substrate facing the first substrate includes a black matrix layer for blocking light in a portion excluding the pixel region, an R, G, and B color filter layers for expressing color hues, A common electrode is formed. The second substrate on which such a color filter layer is formed is referred to as a color filter array substrate.

The thin film transistor array substrate and the color filter array substrate are bonded together, and a liquid crystal layer is formed therebetween. And the liquid crystal of the liquid crystal layer formed between both board | substrates is oriented by the electric field between a pixel electrode and a common electrode, and an image is displayed by adjusting the quantity of the light which permeate | transmits a liquid crystal layer according to the orientation degree.

In general, the gate line 12 and the common line 30 are formed on the same layer of the same metal. Therefore, in order to prevent the gate line 12 and the common line 30 from being short-circuited, the gate lines 12 and the common line 30 are formed in parallel with each other. In this case, the common line 30 is formed to penetrate the pixel area, thereby reducing the aperture ratio.

That is, the pixel electrode 26 is formed in the pixel region, and the image is displayed at the portion where the pixel electrode 26 is formed. In the region where the common line 30 passes below the light, the aperture ratio is reduced. Will decrease.

The present invention has been made to solve the above problems, and an object thereof is to provide a liquid crystal display and a manufacturing method thereof for preventing the aperture ratio from being reduced by forming a common line through the pixel region.

The liquid crystal display according to the present invention according to the above object is a thin film transistor formed on the intersection of the gate line and data line, the gate line and the data line to define a pixel region to cross each other on the substrate, the upper gate line And a common line formed to overlap each other, and a pixel electrode electrically connected to the thin film transistor and formed in the pixel area.

According to an aspect of the present invention, there is provided a method of manufacturing a liquid crystal display device, the method including: forming a gate line and a gate electrode protruding therefrom in one direction on a substrate, and forming a gate insulating film on an entire surface of the substrate including the gate line; Forming a semiconductor layer on the gate insulating layer on the gate electrode; depositing and patterning a first metal layer on the entire surface of the substrate including the semiconductor layer, and defining a pixel region to intersect the gate line; Forming a first pattern of a common line so as to protrude therefrom and be spaced apart from each other on the semiconductor layer, and to overlap an upper portion of the gate line and an overlapping portion of the gate line; Source / drain electrodes, beams on the front of the substrate containing the first pattern of common lines Forming a film, and patterning the passivation layer to form a pixel contact hole to expose an upper portion of the drain electrode and a first contact hole and a second contact hole to expose an upper portion of both edges of the first pattern of the common line. And depositing and patterning a transparent metal layer on an entire surface of the substrate including the passivation layer, the pixel electrode electrically connected to the drain electrode through the pixel contact hole in the pixel area on the passivation layer, and through the first and second contact holes. And forming a second pattern of a common line electrically connecting adjacent first patterns with respect to the data line.

Hereinafter, a liquid crystal display and a manufacturing method thereof according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

2 is a plan view showing a liquid crystal display device according to the present invention, and FIG. 3 is a cross-sectional view showing the liquid crystal display device of the present invention taken along line II ′.

According to an exemplary embodiment of the present invention, a liquid crystal display device includes a gate line 112 and a data line 118 and a gate line 112 and a data line 118 intersecting each other on a substrate to define pixel regions. A thin film transistor to be formed, a common line including the first pattern 130 and the second pattern 136 so as to overlap the upper portion of the gate line 112, and a pixel electrode 126 electrically connected to the thin film transistor and formed in the pixel region. It is configured to include).

The first pattern 130 of the common line overlaps the upper portion of the gate line 112, and is formed so as not to overlap the data line 118. The second pattern 136 of the common line is the gate line 112. An overlap between the gate line 112 and the intersection of the data line 118 is formed to electrically connect adjacent first patterns 130 with respect to the data line 118.

The first pattern 130 and the second pattern 136 are formed to overlap each other at both sides with respect to the data line 118. In this case, the first pattern 130 and the second pattern 136 have contact portions at the overlapping portions, and the second pattern 136 has the first pattern ( 130 are connected at the edges.

The first pattern 130 is formed on the same layer as the same material as the data line 118. The first pattern 130 and the data line 118 include copper (Cu), aluminum (Al), aluminum alloy (AlNd), molybdenum (Mo), chromium (Cr), titanium (Ti), tantalum (Ta), and molybdenum It is formed of a low resistance metal material such as tungsten (MoW).

In addition, the second pattern 136 is formed on the same layer as the same material as the pixel electrode 126. The second pattern 136 and the pixel electrode 126 are formed of a transparent metal material such as indium tin oxide (ITO) or indium zinc oxide (IZO).

In the above, a gate insulating layer 114 is formed between the gate line 112 and the data line 118 to insulate the two layers, and a passivation layer is formed between the data line 118 and the pixel electrode 126 to insulate the two layers. 122) is formed.

The thin film transistor may include a gate electrode 112a protruding from the gate line 112, a semiconductor layer 116 formed on the gate electrode 112a, and one side of the semiconductor layer 116 from the data line 118. And a drain electrode 120 formed on the other side of the semiconductor layer 116 and spaced apart from the source electrode 118a.

In this case, a pixel contact hole 124 is formed in the passivation layer 122 on the drain electrode 120 and is electrically connected to the pixel electrode 126 through the pixel contact hole 124.

The contact portions of the first pattern 130 and the second pattern 136 will be described in more detail.

The first contact hole 132 and the second contact hole 134 are formed in the passivation layer 122 of the portion corresponding to both edges of the first pattern 130, respectively. The second pattern 136 is electrically connected at the edges of the first patterns 130 by the first contact hole 132 and the second contact hole 134, so that the first pattern 130 and the second pattern ( 136 overlaps one gate line to form one common line. That is, both the first pattern 130 and the second pattern 136 are connected on one common line to maintain the same voltage.

Therefore, since the common line is formed to overlap the gate line 112, the common line is not formed below the pixel electrode 126 in the pixel area, and thus an opening ratio may be increased as compared with the related art.

The substrate 100 having the thin film transistor and the pixel electrode 126 described above is called a thin film transistor array substrate.

Although not shown in the drawing, a substrate facing the TFT array substrate is provided with a black matrix layer for shielding light in a portion excluding a pixel region, an R, G, and B color filter layers for expressing color hues, A common electrode is formed. The substrate on which such a color filter layer is formed is referred to as a color filter array substrate.

The thin film transistor array substrate and the color filter array substrate are bonded together, and a liquid crystal layer is formed therebetween. The liquid crystal of the liquid crystal layer formed between the both substrates is oriented by the electric field between the pixel electrode and the common electrode, and an image is displayed by adjusting the amount of light transmitted through the liquid crystal layer according to the degree of orientation.

A liquid crystal display device in which a pixel electrode and a common electrode are formed on different substrates and an electric field is formed between the two electrodes is referred to as a TN (Twisted Nematic mode) liquid crystal display device.

In the embodiment, the present invention has been described with reference to a TN type liquid crystal display device. However, in the pixel region on the thin film transistor array substrate, the pixel electrode and the common electrode are alternately formed so that a lateral electric field (horizontal electric field) is formed between the two electrodes. The present invention can also be applied to an in-plane switching (IPS) mode liquid crystal display device.

Next, a method of manufacturing a liquid crystal display device according to an exemplary embodiment of the present invention will be described with reference to the accompanying drawings.

4A to 4D are cross-sectional views illustrating a method of manufacturing a liquid crystal display device according to the present invention.

First, as shown in FIG. 4A, at least a low-resistance metal material such as copper (Cu), aluminum (Al), aluminum alloy (AlNd), molybdenum (Mo), and chromium (Cr) may be formed on a transparent glass substrate 100. After depositing more than one layer, it is patterned through photo and etching processes to form the gate line 112 and the gate electrode 112a branching from the gate line in one direction on the substrate 100. Subsequently, an insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx) is deposited on the entire surface of the substrate 110 including the gate line and the gate electrode 112a to form the gate insulating layer 114.

Subsequently, pure amorphous silicon and amorphous silicon including impurities are stacked on the entire surface of the gate insulating layer 114, and the pure silicon and the impurity silicon containing impurities are patterned through a photo and etching process to form the upper portion of the gate electrode 112a. The semiconductor layer 116 is formed on the gate insulating film 114 of.

4B, copper (Cu), aluminum (Al), aluminum alloy (AlNd), molybdenum (Mo), chromium (Cr), and titanium (Ti) on the entire surface of the substrate 100 including the semiconductor layer 116. , One of low-resistance metal materials such as tantalum (Ta) and molybdenum-tungsten (MoW) is deposited by a sputtering method to form a first metal layer.

Subsequently, the first metal layer may be patterned through photo and etching processes so as to intersect the gate line 112 to define a pixel region, and protrude therefrom, so as to be spaced apart from each other on the semiconductor layer 116. The first pattern 130 of the common line is formed to overlap the electrode 118a and the drain electrode 120 and the gate line 112 and not overlap the data line 118. In addition, amorphous silicon including impurities of the semiconductor layer 116 positioned between the source electrode 118 and the drain electrode 120 is removed.

Therefore, the data line 118 and the first pattern 130 of the common line are formed on the same layer of the same metal.

As shown in FIG. 4C, chemical vapor deposition of SiNx and SiO ₂ , which are inorganic materials, is formed on the entire surface of the substrate 100 including the data line 118, the source / drain electrodes 118a and 120, and the first pattern 130 of the common line. The protective film 122 is formed by depositing the same or by applying an organic material, benzocyclobutene (BCB), or an acrylic resin (acryl resin).

Subsequently, the passivation layer 122 is patterned through photo and etching processes to form the pixel contact hole 124 to expose the upper portion of the drain electrode 120, and the upper portions of both edges of the first pattern 130 of the common line. The first contact hole 132 and the second contact hole 134 are formed to expose the gaps.

As shown in FIG. 4D, a transparent metal layer, such as indium tin oxide (ITO) or indium zinc oxide (IZO), is deposited on the entire surface of the substrate 100 including the passivation layer 122.

Subsequently, the transparent metal layer is patterned through photo and etching processes, and the pixel electrode 126 is electrically connected to the drain electrode 120 through the pixel contact hole 124 in the pixel region on the passivation layer 122 and the first electrode. And a second pattern 136 of a common line that electrically connects adjacent first patterns 130 based on the data lines 118 through second contact holes 132 and 134. In this case, the second pattern 136 of the common line is formed to overlap the intersection of the gate line 112 and the data line 118 on the gate line 112.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of limitation, Will be apparent to those of ordinary skill in the art.

As described above, the liquid crystal display device and the manufacturing method thereof according to the present invention have the following effects.

The aperture ratio can be improved by overlapping the common line on the gate line.

That is, by forming a common line made of the same metal as the data line, a common line including a first pattern overlapping the gate line and not overlapping the data line, and a second pattern connecting adjacent first patterns based on the data line, Compared to the conventional structure in which a line penetrates the upper portion of the pixel electrode in the pixel region, the aperture ratio is improved.

Claims (8)

A gate line and a data line intersecting each other on a substrate to define a pixel region, and mutually insulated by a gate insulating film interposed therebetween; A thin film transistor formed at an intersection of the gate line and the data line; A passivation layer formed over the gate insulating layer and covering the data line and the thin film transistor; A pixel electrode formed in the pixel area on the passivation layer and electrically connected to the thin film transistor; And A common line overlapping the gate line; The common line is A first pattern formed on the same layer of the same material as the data line; A second pattern formed on the same layer of the same material as the pixel electrode; And And a contact hole formed through the passivation layer in a portion where the first and second patterns overlap each other. The method of claim 1, The first pattern overlaps the upper portion of the gate line and is formed so as not to overlap the data line. And the second pattern overlaps an intersection of the gate line and the data line on the gate line to electrically connect adjacent first patterns with respect to the data line. The method of claim 1, And first patterns disposed at both sides of the data line are interconnected by the contact hole and the second pattern. The method of claim 1, The gate line is formed on the substrate, The gate insulating layer is formed to cover the gate line on the entire surface of the substrate, And the data line and the first pattern are formed on the gate insulating layer. delete delete The method of claim 1, The thin film transistor A gate electrode protruding from the gate line; A semiconductor layer formed on the gate insulating layer to overlap the gate electrode; A source electrode protruding from one side of the semiconductor layer from the data line; And a drain electrode spaced apart from the source electrode and formed on the other side of the semiconductor layer. Forming a gate line and a gate electrode protruding therefrom in one direction on the substrate; Forming a gate insulating film on an entire surface of the substrate including the gate line; Forming a semiconductor layer on the gate insulating layer on the gate electrode; Depositing and patterning a first metal layer on the entire surface of the gate insulating layer including the semiconductor layer to pattern the data layer, the data line to define a pixel region crossing the gate line, and a source to protrude therefrom and to be spaced apart from each other on the semiconductor layer; Forming a first pattern of a common line overlapping a drain electrode and an upper portion of the gate line and not overlapping the data line; Forming a passivation layer on an entire surface of the gate insulating layer including a first pattern of the data line, the source / drain electrode, and the common line; Patterning the passivation layer to form a pixel contact hole exposing an upper portion of the drain electrode and a first contact hole and a second contact hole exposing upper portions of both edges of the first pattern of the common line; And Depositing and patterning a transparent metal layer on an entire surface of the passivation layer including the pixel contact hole, the first and second contact holes, and patterning the pixel electrode to be electrically connected to the drain electrode through the pixel contact hole in the pixel area on the passivation layer; Forming a second pattern of a common line electrically connecting adjacent first patterns with respect to the data line through the first and second contact holes; The first patterns adjacent to the data line are interconnected by the first and second contact holes and the second pattern.

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