KR101337178B1 - Array substrate for LCD and the fabrication method thereof - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to an array substrate for a liquid crystal display device using low resistance wiring in which the process is simple and maximizes productivity.

The array substrate for a liquid crystal display according to the present invention is a manufacturing process by forming a transparent electrode layer before the gate metal or data metal deposition to give a role of a diffusion barrier and to reduce the mask process or sputter deposition process by using as a common electrode or a pixel electrode Can be simplified and the mask can be reduced.

Transparent Electrodes, Masks, Sputtering

Description

Array substrate for LCD and manufacturing method thereof

1 is a plan view of a conventional array substrate for a liquid crystal display device.

FIG. 2 is a cross-sectional view taken along the line II of FIG. 1. FIG.

3 is a cross-sectional view of one pixel in an array substrate for a liquid crystal display device according to a first embodiment of the present invention.

4 is a cross-sectional view of one pixel in an array substrate for a transverse electric field type liquid crystal display device according to a second embodiment of the present invention.

FIG. 5 is a cross-sectional view of one pixel in an array substrate for a fringe field switching type liquid crystal display device according to a third embodiment of the present invention.

6 is a flowchart of a method for manufacturing an array substrate for a liquid crystal display device according to the present invention, and in particular, a method for manufacturing an array substrate for a liquid crystal display device having a transverse electric field method and a fringe field method.

Description of the Related Art [0002]

210, 310, 410: substrate 221, 321, 421: gate wiring

222: gate electrode 223: first transparent metal layer

325 and 425 common electrode 230 gate insulating film

241, 341, 441: active layer 251, 252, 351, 352, 451, 452: ohmic contact layer

261, 361, 461: data wiring 262, 362, 462: source electrode

263, 363, 463: drain electrode 264, 364, 464: second transparent metal layer

265 capacitor electrodes 281, 381, and 481 pixel electrodes

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to an array substrate for a liquid crystal display device using low resistance wiring in which the process is simple and maximizes productivity.

Recently, with the rapid development of the information society, there is a need for a flat panel display having excellent characteristics such as thinning, light weight, and low power consumption. Among them, a liquid crystal display having excellent color reproducibility, etc. displays are actively being developed.

In general, a liquid crystal display device is formed by arranging two substrates having electrodes formed on one surface thereof so that the surfaces on which the two electrodes are formed face each other, forming a liquid crystal material between the two substrates, and then applying a voltage to the two electrodes. By moving the liquid crystal molecules by an electric field, the device expresses an image by the transmittance of light that varies accordingly.

The liquid crystal display may be formed in various forms. Currently, an active matrix LCD (AM-LCD) having a thin film transistor and pixel electrodes connected to the thin film transistor in a matrix manner has excellent resolution and video performance. It is the most noticeable.

The liquid crystal display has a structure in which a pixel electrode is formed on a lower array substrate and a common electrode is formed on a color filter substrate, which is an upper substrate, and drives liquid crystal molecules by an electric field in a direction perpendicular to an up and down substrate. to be. This is excellent in characteristics such as transmittance and aperture ratio, and the common electrode of the upper plate serves as a ground, thereby preventing the destruction of the liquid crystal cell due to static electricity.

Here, the upper substrate of the liquid crystal display further includes a black matrix to prevent light leakage occurring in portions other than the pixel electrode.

On the other hand, the array substrate, which is the lower substrate of the liquid crystal display, is formed by repeatedly depositing a thin film and performing a photolithography process using a mask several times. Typically, 4 to 5 masks are used, and the number of masks is an array substrate. The process water which manufactures this is shown.

In the above-described configuration, the gate wiring and the data wiring are made of a conductive metal such as chromium (Cr), molybdenum (Mo), and tantalum (Ta), and the metal has excellent thermal stability. defects such as hillock) do not occur.

Such metals are generally deposited on a substrate using a physical vapor deposition method such as sputtering, and then etched by wet etching or dry etching to form the data wiring or the gate wiring. .

However, the metals have the same advantages as the thermal stability described above, but as the size of the image display device increases in size, signal delay is caused due to the high specific resistance of these metals.

Therefore, a material having low specific resistance and not forming heel lock is essential for manufacturing an image display device. In fact, to have a display screen with a screen larger than 15 inches and resolutions such as SXGA and UXGA requires a new material of wiring material.

At present, copper (Cu) and aluminum (Al) are recognized as the most suitable wiring materials due to the lowest resistivity, but in the case of aluminum (Al), it is a problem that heel lock occurs, and the proposed aluminum to solve this problem is proposed. Alloys have a problem of high resistivity.

Therefore, research into using copper (Cu) as the resistance wiring material has been actively conducted.

Hereinafter, a conventional array substrate for a liquid crystal display device and a method of manufacturing the same will be described with reference to the accompanying drawings.

1 is a plan view of a conventional array substrate for a liquid crystal display device, and FIG. 2 is a cross-sectional view taken along the line I-I of FIG. 1.

1 and 2, in an array substrate for a liquid crystal display device, a gate wiring 121 having a horizontal direction on a transparent insulating substrate 110 and a gate electrode 122 extending from the gate wiring 121 are provided. Is formed.

In this case, a first diffusion barrier layer is formed under the gate line and the gate electrode.

The first diffusion barrier layer improves adhesion with the insulating substrate during the gate metal deposition.

The gate insulating layer 130 is formed on the gate line 121 and the gate electrode 122, and the active layer 141 and the ohmic contact layers 151 and 152 are sequentially formed thereon.

The source electrode is formed on the ohmic contact layers 151 and 152 with the data wire 161 orthogonal to the gate wire 121 and the source electrode 162 and the gate electrode 122 extending from the data wire 161. A capacitor electrode 165 overlapping with the drain electrode 163 and the gate wiring 121 facing 162 is formed.

Here, a second diffusion barrier layer is formed under the data line, the capacitor electrode, the source and the drain electrode.

The second diffusion barrier layer prevents the diffusion of the data metal into another layer in contact.

Here, the data line 161, the source and drain electrodes 162 and 163, and the capacitor electrode 165 are covered with the protective layer 170, and the protective layer 170 includes the drain electrode 163 and the capacitor electrode ( And first and second contact holes 171 and 172 exposing 165, respectively.

The pixel electrode 181 is formed on the passivation layer 170 of the pixel area defined by the gate line 121 and the data line 161 intersecting, and the pixel electrode 181 has first and second contact holes. It is connected to the drain electrode 162 and the capacitor electrode 165 through 171 and 172, respectively.

As described above, an array substrate for a liquid crystal display device having the above-described configuration can be generally manufactured by a photolithography process using several masks and several sputtering deposition processes. In the photolithography process, cleaning and coating and exposure of the photoresist film are performed. And developing, etching, and other processes, and the sputtering process must also be carried out in a separate chamber.

Therefore, even if the photolithography process and the sputtering deposition are shortened once, the manufacturing time can be considerably reduced, the manufacturing cost can be reduced, and the incidence of defects can be reduced.

An object of the present invention is to provide an array substrate for a liquid crystal display device and a method of manufacturing the same, which simplifies the manufacturing process and reduces the mask by reducing a mask process or a sputtering deposition process on the array substrate for a liquid crystal display device.

In order to achieve the above object, an array substrate for a liquid crystal display device according to the present invention includes: a first transparent metal layer formed on the substrate, a gate wiring formed on the first transparent metal layer, and a gate electrode protruding from the gate wiring; A gate insulating film formed on the substrate and a semiconductor layer formed at the gate electrode position on the gate insulating film; A data line intersecting the gate line and having a second transparent metal layer formed thereon, a source electrode and a drain electrode connected to the second transparent metal layer and the data line and connected to the semiconductor layer; And a pixel electrode formed of the second transparent metal layer.

In addition, in order to achieve the above object, a method of manufacturing an array substrate for a liquid crystal display device according to the present invention, after depositing the first transparent metal layer and the gate metal layer on the substrate patterned by the gate wiring and a predetermined protruding from the gate wiring Forming a gate electrode; Forming a gate insulating film on the substrate and forming a semiconductor layer at a position of the gate electrode on the gate insulating film; Depositing and patterning a second transparent metal layer and a data metal layer on the substrate to form a data line crossing the gate line, a source electrode and a drain electrode connected to the data line and connected to the semiconductor layer, and the drain electrode And forming a pixel electrode extending from the lower second transparent metal layer.

Hereinafter, an array substrate for a liquid crystal display device according to the present invention will be described in detail with reference to the accompanying drawings.

3 is a cross-sectional view illustrating one pixel in an array substrate for a liquid crystal display device as a first embodiment of the present invention.

As shown in FIG. 3, in the array substrate for a liquid crystal display according to the present invention, a gate wiring 221 having a horizontal direction on a transparent insulating substrate 210 and a gate electrode 222 extending from the gate wiring 221 are provided. ) Is formed.

In this case, a first transparent electrode layer 223 is formed under the gate line 221 and the gate electrode 222.

The first transparent electrode layer 223 improves adhesion with the insulating substrate 210 during the gate metal deposition.

The gate insulating layer 230 is formed on the gate line 221 and the gate electrode 222, and the active layer 241 and the ohmic contact layers 251 and 252 are sequentially formed thereon.

The source electrode is disposed on the ohmic contact layers 251 and 252 with the data wire 261 orthogonal to the gate wire 221, the source electrode 262 extending from the data wire 261, and the gate electrode 222. A capacitor electrode 265 overlapping with the drain electrode 263 and the gate wiring 221 facing 262 is formed.

The second transparent electrode layer 264 is formed under the data line 261, the capacitor electrode 265, the source electrode 262, and the drain electrode 263.

The second transparent electrode layer 264 prevents the data metal from being diffused into another layer in contact.

The second transparent electrode layer 264 formed under the drain electrode 263 extends into the pixel to form the pixel electrode 281.

The second transparent metal layer 264 and the data metal may be sequentially deposited and then patterned using a half-tone mask, a semi-transmissive mask, a diffraction mask, and the like.

In this case, since the second transparent metal layer 264 is in contact with the drain electrode 263, the pixel signal transferred from the thin film transistor may be transferred to the pixel electrode 281 without a separate contact hole.

As a result, the first and second transparent metal layers 223 and 264 are formed by depositing the first and second transparent metal layers 223 and 264 to prevent adhesion and diffusion before the gate metal and data metal deposition, and use the same as the pixel electrode 281 to reduce a mask process or a sputtering process. There is an advantage.

Finally, the passivation layer 270 is further formed on the entire surface of the substrate 210 including the thin film transistor.

4 is a cross-sectional view illustrating one pixel in an array substrate for a transverse electric field type liquid crystal display device according to a second embodiment of the present invention.

As shown in FIG. 4, in the array substrate for a transverse electric field type liquid crystal display device according to the present invention, a gate wiring 321 having a horizontal direction on a transparent insulating substrate 310 and a gate electrode extending from the gate wiring 321 are provided. 322 is formed.

A common wiring (not shown) is formed in the same direction as the gate wiring 321.

In this case, a first transparent electrode layer 323 is formed under the gate wiring 321 and the common wiring.

The first transparent electrode layer 323 improves adhesion to the insulating substrate 310 during the gate metal deposition.

The first transparent electrode layer 323 is formed by branching into the pixel under the common wiring to form a common electrode 325.

The gate wiring 321, the common wiring, and the common electrode 325 are sequentially deposited with the first transparent metal layer 323 and the gate metal, and then use a half-tone mask, a semi-transmissive mask, a diffraction mask, or the like. It can be patterned.

In this case, since the common electrode 325 is in contact with the common wire, the common signal may be transmitted to the common electrode 325 without a separate contact hole.

Thus, by depositing and forming the first transparent metal layer 323 for adhesion before the gate metal deposition, and using this as a common electrode 323 has the advantage of reducing the mask process or sputtering process.

The gate insulating layer 330 is formed on the gate wiring 321, the gate electrode 322, the common wiring, and the common electrode 325, and the active layer 341 and the ohmic contact layers 351 and 352 are formed thereon. It is formed sequentially.

The source electrode is positioned on the ohmic contact layers 351 and 352 with the data wire 361 perpendicular to the gate wire 321, the source electrode 362 extending from the data wire 361, and the gate electrode 322. A drain electrode 363 facing the 362 is formed.

A second transparent electrode layer 364 is formed under the data line 361, the source electrode 362, and the drain electrode 363.

The second transparent electrode layer 364 prevents the data metal from being diffused into another layer in contact.

The second transparent electrode layer 364 formed under the drain electrode 363 extends into the pixel to form a pixel electrode 381 that is branched from the common electrode 325.

The second transparent metal layer 364 and the data metal are sequentially deposited, and then patterned using a half-tone mask, a semi-transmissive mask, a diffraction mask, and the like to form the data line 361, the source and drain electrodes 362 and 363. ) And the pixel electrode 381 can be formed.

In this case, since the second transparent metal layer 364 is in contact with the drain electrode 363, the pixel signal transferred from the thin film transistor may be transferred to the pixel electrode 381 without a separate contact hole.

Accordingly, the second transparent metal layer 364 is formed by depositing and forming the second transparent metal layer 364 to prevent adhesion and diffusion before the data metal deposition, and use the same as the pixel electrode 381 to reduce the mask process or the sputtering process.

Finally, the passivation layer 370 is further formed on the entire surface of the substrate 310 including the thin film transistor.

FIG. 5 is a cross-sectional view illustrating one pixel in an array substrate for a fringe field switching type liquid crystal display device according to a third embodiment of the present invention.

As shown in FIG. 5, in an array substrate for a fringe field switching (FFS) type liquid crystal display device according to the present invention, a gate wiring 421 having a horizontal direction on a transparent insulating substrate 410, and a gate wiring are provided. A gate electrode 422 extending from 421 is formed.

A common wiring (not shown) is formed in the same direction as the gate wiring 421.

In this case, a first transparent electrode layer 423 is formed under the gate wiring 421 and the common wiring.

The first transparent electrode layer 423 improves adhesion with the insulating substrate 410 during the gate metal deposition.

The first transparent electrode layer 423 is formed under the common wiring in the form of a cylindrical electrode into the pixel to form a common electrode 425.

The gate wiring 421, the common wiring, and the common electrode 425 are sequentially deposited with the first transparent metal layer 423 and the gate metal, and then use a half-tone mask, a semi-transmissive mask, a diffraction mask, or the like. It can be patterned.

In this case, although not shown, since the common electrode 425 is in contact with the common wire, the common signal may be transmitted to the common electrode 425 without a separate contact hole.

Thus, by depositing and forming the first transparent metal layer 423 for adhesion before the gate metal deposition, and using this as a common electrode 425 has the advantage of reducing the mask process or sputtering process.

The gate insulating layer 430 is formed on the gate wiring 421, the gate electrode 422, the common wiring, and the common electrode 425, and the active layer 441 and the ohmic contact layers 451 and 452 are formed thereon. It is formed sequentially.

The source electrode is positioned on the ohmic contact layers 451 and 452, centering on the data line 461 perpendicular to the gate line 421, the source electrode 462 extending from the data line 461, and the gate electrode 422. A drain electrode 463 facing 462 is formed.

The second transparent electrode layer 464 is formed under the data line 461, the source electrode 462, and the drain electrode 463.

The second transparent electrode layer 464 prevents the data metal from being diffused into another layer in contact.

The second transparent electrode layer 464 formed under the drain electrode 463 extends into the pixel to form a plurality of pixel electrodes 481 spaced at regular intervals from the top of the common electrode 425.

The second transparent metal layer 464 and the data metal are sequentially deposited, and then patterned using a half-tone mask, a semi-transmissive mask, a diffraction mask, and the like to form a data line 461, a source electrode 462, and a drain electrode. 463 and the pixel electrode 481 can be formed.

In this case, since the second transparent metal layer 464 is in contact with the drain electrode 463, the pixel signal transferred from the thin film transistor may be transferred to the pixel electrode 481 without a separate contact hole.

Thus, by depositing and forming the second transparent metal layer 464 to prevent adhesion and diffusion before the data metal deposition, and using the same as the pixel electrode 481, there is an advantage of reducing the mask process or the sputtering process.

Finally, the passivation layer 470 is further formed on the entire surface of the substrate 410 including the thin film transistor.

In the first to third embodiments, the first transparent metal layers 223, 323, and 423 and the second transparent metal layers 264, 364, and 464 may include indium tin oxide (ITO), indium zinc oxide (IZO), It consists of a transparent metal selected from indium tin zinc oxide (ITZO).

The gate wiring and the data wiring may be made of a metal material selected from copper (Cu), aluminum (Al), aluminum alloy (Al alloy), molybdenum (Mo), tantalum (Ta), and titanium (Ti). .

6 is a flowchart of a method of manufacturing an array substrate for a liquid crystal display device according to the present invention, and in particular, a method of manufacturing an array substrate for a liquid crystal display device having a transverse electric field method and a fringe field method.

First, in the step of ST100, the first transparent electrode layer and the gate metal are successively deposited on the substrate, and the first transparent electrode layer improves the adhesion with the insulating substrate during the gate metal deposition.

The first transparent electrode layer and the gate metal are patterned to form a gate wiring, a common wiring, a gate electrode, and a common electrode.

At this time, in the transverse electric field mode liquid crystal display, the first transparent electrode layer is formed by branching into the pixel under the common wiring to form a common electrode.

In the fringe field type liquid crystal display, the first transparent electrode layer forms one through electrode in the pixel.

The gate line, the common line, and the common electrode may be patterned using a half-tone mask, a semi-transmissive mask, a diffraction mask, and the like after depositing the first transparent metal layer and the gate metal continuously.

Thus, by depositing and forming the first transparent metal layer for adhesion before the gate metal deposition, and using this as a common electrode has the advantage of reducing the mask process or sputtering process.

Subsequently, in the step of ST110, a gate insulating film is formed on the gate wiring, the gate electrode, the common wiring, and the common electrode, and a semiconductor layer including an active layer and an ohmic contact layer is formed thereon.

Subsequently, in the step of ST120, a second transparent electrode layer is formed under the data line, source and drain electrodes.

The second transparent electrode layer prevents the diffusion of the data metal into another layer in contact.

The second transparent electrode layer formed under the drain electrode extends into the pixel to form the pixel electrode.

The second transparent metal layer and the data metal may be sequentially deposited and then patterned using a half-tone mask, a semi-transmissive mask, a diffraction mask, and the like to form data lines, source and drain electrodes, and pixel electrodes.

Thus, by depositing and forming a second transparent metal layer to prevent adhesion and diffusion before the data metal deposition, and using the pixel electrode as a pixel electrode, there is an advantage of reducing a mask process or a sputtering process.

Then, in the step of ST130, a protective film is further formed on the entire upper surface of the array substrate formed as described above.

Although the present invention has been described in detail through specific embodiments, this is for explaining the present invention in detail, and the array substrate for a liquid crystal display device and a method of manufacturing the same according to the present invention are not limited thereto, and within the technical spirit of the present invention. It is apparent that modifications and improvements are possible by those skilled in the art.

The present invention has the effect of reducing the mask process or sputtering deposition process in the process of forming the array substrate for the liquid crystal display device, simplifying the manufacturing process and reducing the mask to reduce the manufacturing time and improve the yield.

Claims (17)

A first transparent metal layer formed on the substrate, a gate wiring formed on the first transparent metal layer, and a gate electrode protruding from the gate wiring; A gate insulating film formed on the substrate and a semiconductor layer formed at the gate electrode position on the gate insulating film; A data line intersecting the gate line and having a second transparent metal layer formed thereon, a source electrode and a drain electrode connected to the second transparent metal layer and the data line and connected to the semiconductor layer; A pixel electrode formed of the second transparent metal layer; A capacitor electrode formed under the second transparent metal layer in the region overlapping the gate wiring and formed of the same material on the same layer as the source electrode and the drain electrode; And And a passivation layer formed on an entire surface of the substrate on which the source electrode, the drain electrode, and the capacitor electrode are formed. The first transparent metal layer improves the adhesion between the substrate and the gate wiring, The second transparent metal layer may increase adhesion between the gate insulating layer and the semiconductor layer and the data line and prevent diffusion of data line material. And the first transparent metal layer further forms a cylindrical common electrode in the pixel, and the pixel electrode is formed at a predetermined interval above the common electrode. delete delete The method according to claim 1, And the first transparent metal layer and the gate metal layer are stacked and further include a common wiring formed in the same direction as the gate wiring. delete delete The method according to claim 1, And the first and second transparent metal layers are made of a transparent metal selected from indium tin oxide (ITO), indium zinc oxide (IZO), and indium tin zinc oxide (ITZO). The method according to claim 1, The gate wiring and the data wiring are formed of a metal material selected from copper (Cu), aluminum (Al), aluminum alloy (Al alloy), molybdenum (Mo), tantalum (Ta), and titanium (Ti). Array substrate for devices. After depositing the first transparent metal layer and the gate metal layer on the substrate and patterned by using any one of a half-tone mask, a semi-transmissive mask, a diffraction mask to the gate wiring, the gate electrode and a predetermined protruding from the gate wiring in the pixel Forming a cylindrical common electrode; Forming a gate insulating film on the substrate and forming a semiconductor layer at a position of the gate electrode on the gate insulating film; After depositing and patterning a second transparent metal layer and a data metal layer on the substrate, a data electrode crossing the gate line, a capacitor electrode having a second transparent metal layer and a data metal layer stacked in an area overlapping the gate line, and the data line Forming a source electrode and a drain electrode connected to the semiconductor layer and connected to the semiconductor layer, and forming a pixel electrode extending from the second transparent metal layer under the drain electrode; And forming a passivation layer on an entire surface of the substrate on which the data line, the source electrode, the drain electrode, the capacitor electrode, and the pixel electrode are formed. The first transparent metal layer improves the adhesion between the substrate and the gate wiring, And the second transparent metal layer increases adhesion between the gate insulating layer and the semiconductor layer and the data line and prevents diffusion of data line material. 10. The method of claim 9, A second transparent metal layer is formed below the data line, the source electrode and the drain electrode. delete delete 10. The method of claim 9, Depositing and patterning a first transparent metal layer and a gate metal layer on the substrate to form a gate wiring and a gate electrode protruding from the gate wiring; The first transparent metal layer and the gate metal layer are laminated in the same direction as the gate wiring to form a common wiring, wherein the array substrate manufacturing method for a liquid crystal display device. delete delete 10. The method of claim 9, The first and second transparent metal layers are made of a transparent metal selected from indium tin oxide (ITO), indium zinc oxide (IZO), and indium tin zinc oxide (ITZO). 10. The method of claim 9, The gate wiring and the data wiring are made of a metal material selected from copper (Cu), aluminum (Al), aluminum alloy (Al alloy), molybdenum (Mo), tantalum (Ta), and titanium (Ti). A manufacturing method of an array substrate for a display device.

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