KR20070073296A - Liquid crystal display and manufacturing method thereof - Google Patents

Abstract

An LCD(Liquid Crystal Display) and a manufacturing method thereof are provided to form a groove at a light transmitting substrate and to form an electrode line or a black matrix within the groove, thereby lowering a step of a thin film layer in a substrate. A groove is formed at a substrate(100). A gate line corresponding to at least a portion of the groove is formed on the substrate. A data line is crossed with the gate line. A TFT(Thin Film Transistor) and a pixel electrode(170) are formed at the crossing portion of the gate and data lines. The depth of the groove and the thickness of the gate line are the same. An active layer is formed at a portion of the groove. The depth of the groove and the thickness of the active layer are the same. A black matrix(210) is formed at the groove. A color filter(220) is formed on the black matrix. A column spacer(300) is formed on the upper portion of the black matrix.

Description

Liquid crystal display and manufacturing method thereof

1 is a schematic plan view of a liquid crystal display device according to the prior art.

FIG. 2 is a cross-sectional view taken along a line A-A of the liquid crystal display shown in FIG. 1.

3 is a diagram illustrating a defect phenomenon occurring in the liquid crystal display according to the prior art.

4 is a schematic plan view of a liquid crystal display according to a first exemplary embodiment of the present invention.

5 is a cross-sectional view taken along line B-B of the liquid crystal display shown in FIG. 4.

6A to 6H are manufacturing process diagrams of the thin film transistor substrate according to the first embodiment of the present invention.

7 is a schematic cross-sectional view of a liquid crystal display according to a second exemplary embodiment of the present invention.

8 is a schematic cross-sectional view of a liquid crystal display according to a third exemplary embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

100: first substrate 100a: groove

110: gate electrode 110a: gate line

120: gate insulating film 130: active layer

130a: active layer film 140: source electrode

140a: data line 150: drain electrode

150a: data pad 160, 160a, 160b: protective film

170: pixel electrode 180: sustain electrode line

200: second substrate 210: black matrix

210a, 210b: opening area 220: color filter

230: overcoat film 240: common electrode

300: column spacer 410, 420: alignment layer

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display and a method for manufacturing the same. In particular, a groove may be formed in a light transmissive substrate, and an electrode line or a black matrix may be formed in the groove to lower the thin film level of the substrate to freely select the position of the column spacer. The present invention relates to a liquid crystal display device and a method of manufacturing the same.

Liquid crystal displays (LCDs) display a desired image by applying an electric field to a liquid crystal material having an anisotropic dielectric constant injected between two substrates, and controlling the amount of light transmitted through the substrate by adjusting the intensity of the electric field. Device.

1 is a schematic plan view of a liquid crystal display according to the related art, and FIG. 2 is a cross-sectional view of an A-A cutting line of the liquid crystal display shown in FIG. 1.

1 and 2, a liquid crystal display according to the related art includes a thin film transistor TFT including a gate electrode 11, a source electrode 14, and a drain electrode 15 on a first substrate 10. A thin film transistor substrate on which a thin film transistor and a pixel electrode 17 are formed, and a black matrix 21, a color filter 22, an overcoat layer 23, and a common electrode 24 are formed on the second substrate 20. It includes a color filter substrate. Alignment layers 41 and 42 are formed on the thin film transistor substrate and the color filter substrate, respectively, and a liquid crystal material (not shown) is formed therebetween.

The liquid crystal display device applies a predetermined voltage to the pixel electrode 17 by using a TFT of the thin film transistor substrate, forms an electric field on the pixel electrode 17 and the common electrode 24 of the color filter substrate, and By aligning the liquid crystal material, the intensity of the light emitted from the backlight unit is adjusted to display an image.

In this case, referring to FIG. 2, in the liquid crystal display, a column spacer 30 is formed between the thin film transistor substrate and the color filter substrate to maintain a gap. Referring to FIG. 1, the column spacer 30 is positioned between the TFT including the gate electrode 11, the source electrode 14, and the drain electrode 15 and the data pad 15a.

However, recently, as the material forming the electrode line of the liquid crystal display is changed from CrAl to MoAl, the thickness becomes thicker, and the source electrode 14, the drain electrode 15, and the active layer 13 use the same mask. As the liquid crystal display device is manufactured by using a four mask manufacturing method for patterning, the TFT and the data pad 15a are getting thicker.

Accordingly, the liquid crystal display is in contact with the column spacer 30 and the TFT or the data pad 15a due to an external impact, and as a result, a cross shape defect occurs on the liquid crystal display as shown in FIG. 3. There is a problem.

In addition, the liquid crystal display should have a column spacer 30 formed to be spaced apart from the TFT and the data pad 15a in order to prevent a cross shape defect, and thus the column spacer formed to overlap the black matrix 21 ( 30, there is a problem that the aperture ratio of the liquid crystal display is lowered.

The present invention has been made to solve the above problems, and in particular, grooves are formed in the light-transmissive substrate, and electrode lines or black matrices are formed in the grooves to lower the thin film level of the substrate so that the position of the column spacer can be freely selected. It is an object of the present invention to provide a liquid crystal display device and a method for manufacturing the same, which can increase the amount.

According to an aspect of the present invention for achieving the object of the present invention, a groove formed substrate; A gate line formed corresponding to at least a portion of the groove; A data line crossing the gate line; And a thin film transistor and a pixel electrode formed corresponding to a portion where the gate line and the data line cross each other. .

The depth of the groove and the thickness of the gate line is the same.

A portion of the groove is characterized in that the active layer is formed.

The depth of the groove and the thickness of the active layer is characterized in that the same.

The gate line may be formed in the groove or overlap the pattern of the groove.

It further comprises a sustain electrode line formed in a portion of the groove.

According to another aspect of the present invention for achieving the object of the present invention, a groove formed substrate; A black matrix formed in the groove; A color filter formed on the black matrix; And a column spacer formed on the black matrix.

The depth of the groove and the thickness of the black matrix are the same.

According to another aspect of the present invention for achieving the object of the present invention, a first substrate, a gate line formed on the first substrate, a data line crossing the gate line, the gate line and a data line A thin film transistor substrate having a thin film transistor and a pixel electrode corresponding to the crossing portion; And a color filter substrate having a second substrate, a black matrix formed on the second substrate, a color filter and a common electrode formed on the black matrix and corresponding to the pixel electrode, and a column spacer formed on the black matrix. A liquid crystal display is provided, wherein a predetermined groove is formed in at least one of the first and second substrates.

The gate line may be formed to correspond to the groove formed in the first substrate.

The black matrix is formed in the groove formed in the second substrate.

According to another aspect of the present invention for achieving the object of the present invention, forming a groove on the transparent substrate; And forming an electrode line along the pattern of the groove.

The depth of the groove and the thickness of the electrode line is characterized in that the same.

The method may further include forming an active layer on a part of the groove, before forming the electrode line along the pattern of the groove.

The depth of the groove and the thickness of the active layer is characterized in that the same.

The groove pattern and the electrode line pattern may be formed using the same mask.

At least a portion of the electrode line may be a gate line including a gate electrode of the thin film transistor.

Part of the electrode line is characterized in that the sustain electrode line for forming a sustain capacitor.

According to another aspect of the present invention for achieving the object of the present invention, etching the light-transmissive substrate to form a groove; And forming a black matrix along the pattern of the grooves; Provided is a method of manufacturing a color filter substrate comprising forming a column spacer on top of the black matrix.

The groove pattern and the black matrix pattern may be formed using the same mask.

The depth of the groove and the thickness of the black matrix are the same.

According to another aspect of the present invention for achieving the above object of the present invention,

EMBODIMENT OF THE INVENTION Hereinafter, with reference to an accompanying drawing, embodiment of this invention is described in detail.

4 is a schematic plan view of a liquid crystal display according to a first exemplary embodiment of the present invention, and FIG. 5 is a cross-sectional view taken along line B-B of the liquid crystal display shown in FIG. 4.

The liquid crystal display according to the first exemplary embodiment of the present invention includes a thin film transistor substrate, a color filter substrate disposed opposite thereto, and a liquid crystal material (not shown) formed between the two substrates.

Referring to FIG. 4, the thin film transistor substrate includes a first substrate, which is a transparent glass substrate, a gate line 110a extending in one direction while transmitting a gate signal on the first substrate, and crossing the gate line 110a. A data line 140a formed in a direction, a thin film transistor (TFT) connected to the gate line 110a and the data line 140a, a data pad 150a connected to the thin film transistor, and the data The pixel electrode 170 is connected to the pad 150a.

The thin film transistor includes a gate electrode 110 connected to the gate line 110a, a source electrode 140 connected to the data line 140a, and a drain electrode 150 connected to the data pad 150a.

The color filter substrate includes a second substrate, which is a transparent glass substrate, a black matrix 210 formed in a region not transmitting light formed on the second substrate, a color filter 220, and a column spacer 300.

The column spacer 300 for maintaining a constant gap between the thin film transistor substrate and the color filter substrate may include a TFT and a data pad including a gate electrode 110, a source electrode 140, and a drain electrode 150. 150a).

The gate line 110a formed on the thin film transistor substrate extends in the horizontal direction, and a portion of the gate line 110a protrudes upward or downward to form the gate electrode 110 of the thin film transistor described above.

The data line 140a extends in the vertical direction, and a part thereof protrudes to form the source electrode 140 of the thin film transistor described above. Here, the data line 140a is formed in a direction crossing the direction in which the gate line 110a is formed, as shown in FIG. 4.

The storage electrode line 180 is formed along an edge of the pixel electrode 170. In this case, the storage electrode line 180 may have various shapes such as width and length in order to secure sufficient storage capacitor.

Referring to FIG. 5, the thin film transistor substrate may include a first substrate 100, a gate electrode 110 and a storage electrode line 180, and the gate electrode 110 and a storage electrode line on the first substrate 100. The gate insulating layer 120, the active layer 130, the source electrode 140, the drain electrode 150, the data pad 150a, the passivation layer 160, and the data pad 150a formed on the 180 may be connected to each other. The pixel electrode 170 and an alignment layer 410 are included.

A predetermined groove is formed on the first substrate 100 according to the first embodiment of the present invention, and a gate line, a gate electrode 110, and a storage electrode line 180 are formed along the pattern of the groove. .

The gate electrode 110 and the storage electrode line 180 may be formed of metal such as Al, Al alloy, Ag, Ag alloy, Cr, Ti, Ta, Mo, or the like. The gate electrode 110 and the storage electrode line 180 are preferably formed using one mask, and have a metal layer such as Cr, Mo, Ti, Ta, etc. having excellent physicochemical properties and an Al-based or Ag-based material having a small specific resistance. It may be composed of multiple layers of two or more layers including a metal layer. In addition, the gate electrode 110 and the storage electrode line 180 may be made of various metals or conductors. In this case, since the gate electrode 110 and the storage electrode line 180 are formed in the groove of the substrate 100, the level difference may be reduced by the thickness of the gate line and the storage electrode line. That is, the thickness of the gate electrode 110 and the storage electrode line 180 is preferably equal to the depth of the groove.

A gate insulating layer 120 made of silicon nitride (SiNx) or the like is formed on the gate electrode 110 and the storage electrode line 180. An active layer 130 that forms a channel is formed on the gate insulating layer 120 when a voltage is applied to the gate electrode 110, and a source electrode 140 and a drain electrode 150 are formed on the active layer 130.

The passivation layer 160 made of an organic insulating layer is formed on the source electrode 140 and the drain electrode 150. The passivation layer 160 may be formed by exposing and developing the photosensitive organic material. An insulating film of an inorganic material made of silicon nitride or silicon oxide may be added to the lower portion of the organic insulating protective film, and the entire protective film may be formed of an inorganic insulating material such as silicon nitride or silicon oxide.

In addition, the pixel electrode 170 connected to the drain electrode 150 generally uses indium tin oxide (ITO) or indium zinc oxide (IZO) made of a transparent conductive material.

The pixel electrode 170 is positioned above the storage electrode line 180 to form a storage capacitor between the pixel electrode 170 and the storage electrode line 180.

In addition, referring to FIG. 5, the color filter substrate includes a black matrix 210 and a color filter 220 formed on the second substrate 200, which is a transparent glass substrate, and an overcoat of an organic material formed on the color filter 220. The film 230 and a common electrode 240 made of a transparent conductive material such as ITO or IZO formed on the overcoat film 230.

In addition, alignment layers 410 and 420 are formed on the thin film transistor substrate and the color filter substrate for alignment of the liquid crystal material formed therebetween. The surfaces of the alignment layers 410 and 420 are rubbed to orient the liquid crystal material in a desired direction.

In this case, in the color filter substrate according to the first exemplary embodiment, a column spacer 300 is formed on the color filter 220 to maintain a constant gap between the thin film transistor substrate and the color filter substrate. In this case, the column spacer 300 may be positioned to overlap the black matrix 210.

6A to 6H are manufacturing process diagrams of the thin film transistor substrate according to the first embodiment of the present invention.

Referring to FIG. 6A, the first substrate 100, which is a transparent glass substrate, is etched with a hydrogen fluoride etching solution through a photolithography process using a first photoresist mask pattern (not shown) to form a predetermined groove 110a. The first photosensitive mask pattern is a mask pattern for forming the gate line, the gate electrode 110 and the storage electrode line 180 thereafter, and the groove 100a formed on the first substrate 100 is formed later. It is patterned in the shape of a gate line, a gate electrode, and a sustain electrode line. In addition, the groove 100a is formed to a depth of, for example, about 2000 angstroms by the thickness of each wiring line.

Referring to FIG. 6B, a first conductive layer is formed on the first substrate 100, which is a light-transmissive glass substrate, and then the gate line, the gate electrode 110, and the storage layer are formed through a photolithography process using the first photoresist mask pattern. The electrode line 180 is formed. That is, in this manner, the gate line, the gate electrode 110 and the storage electrode line 180 are formed along the pattern of the groove of the first substrate 100.

First, a first conductive film is formed on the first substrate 100 through a deposition method using a CVD method, a PVD method, a sputtering method, or the like. At least one of Mo, Cr, MoW, Cr / Al, Cu, Al (Nd), Mo / Al, Mo / Al (Nd), Cr / Al (Nd), and MoAlMo is used as the first conductive film. desirable. A multilayer film may be formed of the first conductive film. At this time, after applying the photoresist film, a lithography process using the first mask is performed to form a first photoresist mask pattern. An etching process using the first photoresist mask pattern as an etching mask may be performed to form the gate line, the gate electrode 110, and the storage electrode line 180. Thereafter, a predetermined strip process is performed to remove the first photoresist mask pattern. In this case, the first conductive film may be formed to have a thickness of, for example, about 2000 Angstroms by the depth of the groove, thereby reducing the height step on the substrate by the thickness of the first conductive film.

6C and 6D, the gate insulating film 120, the active layer film 130a, and the ohmic contact layer (not shown) are sequentially formed on the entire structure shown in FIG. 6B, and then the second photoresist mask pattern ( An etching process using a not shown) is performed to form an active region of the thin film transistor.

The gate insulating film 120 is formed on the entire substrate through a deposition method using a PECVD method, a sputtering method, or the like. In this case, it is preferable to use an inorganic insulating material including silicon oxide or silicon nitride as the gate insulating film 120. For example, a silicon nitride film is formed to a thickness of about 4000 angstroms. The active layer 130 and the ohmic contact layer are sequentially formed on the gate insulating layer 120 through the above-described deposition method. An amorphous silicon layer is used as the active layer 130, and an amorphous silicon layer doped with a high concentration of silicide or N-type impurities is used as the ohmic contact layer. Thereafter, a photoresist film is coated on the ohmic contact layer, and then a second photoresist mask pattern is formed through a photolithography process using a second mask. An etching process is performed using the second photoresist mask pattern as an etch mask and the gate insulating layer 120 as an etch stop layer to remove the ohmic contact layer and the active layer layer, thereby forming the active region 130 on the gate electrode 110. Form. Thereafter, a predetermined strip process is performed to remove the remaining second photoresist mask pattern. In this case, the gate insulating layer 120 is formed to a thickness of 1500 to 5000 angstroms, the active layer 130 is formed to a thickness of 500 to 2000 angstroms, and the ohmic contact layer is preferably formed to a thickness of 300 to 600 angstroms. In the first embodiment of the present invention, since the gate wiring is flat rather than protruding from the prior art when forming the active layer, the deposition and patterning process can be performed more easily.

Referring to FIG. 6E, a second conductive layer is formed on the entire structure in which the active region of the thin film transistor is formed, and then an etching process is performed using the third photoresist mask pattern (not shown) to form the data line and the source electrode 140. The drain electrode 150 and the data pad 150a are formed.

The second conductive film is formed on the entire substrate by a deposition method using a CVD method, a PVD method, a sputtering method, or the like. At this time, it is preferable to use at least one metal single layer or multiple layers of Mo, Al, Cr, Ti as the second conductive film. Of course, the same material as that of the first conductive film may be used for the second conductive film. It is effective to deposit the second conductive film in a thickness of 1,500 angstroms to 3,000 angstroms. Thereafter, a photosensitive film is coated on the second conductive film, and then a lithography process using a mask is performed to form a third photoresist mask pattern. The second conductive film is etched by performing an etching process using the third photoresist mask pattern as an etch mask, and then the third photoresist mask pattern is removed, followed by etching using the etched second conductive film as an etch mask. The ohmic contact layer of the exposed region between the depositions is removed to form a channel formed of the active layer 130 between the source electrode 140 and the drain electrode 150, and a data line and a data pad 150a are formed. Here, the active layer 130 between the source electrode 140 and the drain electrode 150 may be exposed by removing the ohmic contact layer without removing the third photoresist mask pattern. At this time, the etching process is first wet etching to remove the second conductive film in the region where the third photoresist mask pattern is not formed, and dry etching process to remove the ohmic contact layer. In addition, the third photoresist pattern may be removed by an ashing process using an O 2 plasma between the wet etching and the dry etching.

By the above-described process, the data line extends in the direction crossing the gate line formed below. In addition, the source electrode 140 extends from the data line to overlap the portion of the active region, the drain electrode 120 overlaps the portion of the active region, and the data pad 150a is disposed on the pixel electrode 170 in the pixel region. Connected.

Referring to FIG. 6F, a passivation layer 160 is formed on the first substrate 100 on which the data line is formed, and a portion of the passivation layer 160 is removed by an etching process using a fourth photoresist mask pattern to form a contact hole. .

That is, the protective film 160 is formed on the entire structure shown in FIG. 6E through various deposition methods. For the passivation layer 160, the same insulating material as that of the gate insulating layer 120 is preferably used. In addition, the protective film 160 may be formed in a multilayer. For example, it can be formed from two layers, an inorganic protective film and an organic protective film. After applying the photoresist on the passivation layer 160, a photolithography process using a mask is performed to form a fourth photoresist mask pattern (not shown) that opens the contact region. Thereafter, an etching process using the fourth photoresist mask pattern as an etching mask is performed to form a contact hole exposing a part of the data pad 150a. The remaining third photoresist mask pattern is removed by performing a predetermined strip process.

Referring to FIG. 6G, the third conductive layer is formed on the patterned passivation layer 160, and then the third conductive layer is patterned using a fifth photoresist mask pattern (not shown) to form the pixel electrode 170. Here, it is preferable to use a transparent conductive film containing indium tin oxide (ITO) or indium zinc oxide (IZO) as the third conductive film.

First, a third conductive film is formed on the entire structure shown in FIG. 6F by a predetermined deposition method, then a photosensitive film is applied, and a lithography process using a mask is performed to form a fifth photosensitive film mask pattern. The remaining region except for the predetermined region of the pixel electrode 170 and the data pad 150a connected to the pixel electrode 170 is opened by the fifth photoresist mask pattern. Next, the pixel electrode 170 is formed by removing the open region of the third conductive layer through an etching process using the fifth photoresist mask pattern as an etch mask and removing the fifth photoresist mask pattern through a predetermined strip process. .

Finally, the alignment layer 410 is formed on the overall structure shown in FIG. 6H. As a result, a lower substrate, that is, a thin film transistor substrate is produced. Although the above description is based on the five-sheet mask process, the present invention is not limited thereto and may be applied to various number of mask processes.

Meanwhile, the color filter substrate may include a black matrix 210, a color filter 220, a column spacer 300, an overcoat layer 230, a transparent common electrode 240, and an alignment layer on the second substrate 200, which is a transparent glass substrate. Produced by forming the 420 sequentially.

Thereafter, the thin film transistor substrate and the color filter substrate manufactured as described above are bonded to each other. Subsequently, a liquid crystal material is injected into a predetermined space formed by the column spacer 300 using a vacuum injection method to fabricate the liquid crystal display according to the first embodiment of the present invention.

The liquid crystal display according to the first exemplary embodiment of the present invention having such a configuration forms a groove in the first substrate 100 and forms the gate line 110a and the common electrode line 180 in the groove, so that the gate wiring is formed. The height of the step is lowered by the thickness, and the overall shape of the step can be formed smoothly. From this, interference between the metal wiring and the column spacer on the thin film transistor substrate can be avoided, and since the interference between the metal wiring and the column spacer is reduced, the design of the element is eliminated and the position of the column spacer 300 can be freely selected.

Referring back to FIG. 4, the column spacer 300 may be shifted in the direction of the data line 140a as compared with the related art, and thus the area of the black matrix 210 is reduced, so that the opening ratio may be as much as the opening regions 210a and 210b. Can increase.

In addition, by forming a groove in the first substrate 100 to lower the thin film step of the substrate to prevent contact between the column spacer 300 and the thin film transistor or the data pad, it is possible to reduce the cross defect as shown in FIG. .

Next, the liquid crystal display according to the second exemplary embodiment of the present invention will be described in detail with reference to FIG. 7. In the liquid crystal display according to the second embodiment of the present invention illustrated in FIG. 7, the grooves are formed in the second substrate constituting the color filter substrate rather than the thin film transistor substrate.

7 is a schematic cross-sectional view of a liquid crystal display according to a second exemplary embodiment of the present invention.

Referring to FIG. 7, the thin film transistor substrate includes a first substrate 100, a gate electrode 110, a storage electrode line 180, and a gate electrode 110 and a storage electrode line on the first substrate 100. The gate insulating layer 120, the active layer 130, the source electrode 140, the drain electrode 150, the data pad 150a, the passivation layer 160, and the data pad 150a formed on the 180 may be connected to each other. The pixel electrode 170 and an alignment layer 410 are included.

The gate electrode 110 and the storage electrode line 180 may be formed of metal such as Al, Al alloy, Ag, Ag alloy, Cr, Ti, Ta, Mo, or the like. The gate electrode 110 and the storage electrode line 180 are preferably formed using one mask, and have a metal layer such as Cr, Mo, Ti, Ta, etc. having excellent physicochemical properties and an Al-based or Ag-based material having a small specific resistance. It may be composed of multiple layers of two or more layers including a metal layer. In addition, the gate electrode 110 and the storage electrode line 180 may be made of various metals or conductors. In addition, the gate electrode 110 and the storage electrode line 180 may be inclined at the side, and the inclination angle with respect to the horizontal plane is preferably 30 to 80 degrees.

A gate insulating layer 120 made of silicon nitride (SiNx) or the like is formed on the gate electrode 110 and the storage electrode line 180. An active layer 130 that forms a channel is formed on the gate insulating layer 120 when a voltage is applied to the gate electrode 110, and a source electrode 140 and a drain electrode 150 are formed on the active layer 130.

The passivation layer 160 made of an organic insulating layer is formed on the source electrode 140 and the drain electrode 150. The passivation layer 160 may be formed by exposing and developing the photosensitive organic material. An insulating film of an inorganic material made of silicon nitride or silicon oxide may be added to the lower portion of the organic insulating protective film, and the entire protective film may be formed of an inorganic insulating material such as silicon nitride or silicon oxide.

In addition, the pixel electrode 170 connected to the drain electrode 150 generally uses indium tin oxide (ITO) or indium zinc oxide (IZO) made of a transparent conductive material.

The pixel electrode 170 is positioned above the storage electrode line 180 to form a storage capacitor between the pixel electrode 170 and the storage electrode line 180.

In addition, the color filter substrate may include a black matrix 210 and a color filter 220 formed on the second substrate 200, which is a transparent glass substrate, an overcoat layer 230 of an organic material formed on the color filter 220, and And a common electrode 240 made of a transparent conductive material such as ITO or IZO formed on the overcoat layer 230.

A predetermined groove is formed on the second substrate 200 according to the second embodiment of the present invention, and a black matrix 210 is formed along the pattern of the groove. In this case, the groove is preferably formed to a depth equal to the thickness of the black matrix to be formed later.

In the color filter substrate, a column spacer 300 is formed on the color filter 220 to maintain a constant gap between the thin film transistor substrate and the color filter substrate. The column spacer 300 is positioned above the black matrix 210.

On the thin film transistor substrate and the color filter substrate, alignment layers 410 and 420 for alignment of the liquid crystal material formed therebetween are formed. The surfaces of the alignment layers 410 and 420 are rubbed to orient the liquid crystal material in a desired direction.

In the liquid crystal display according to the second exemplary embodiment of the present invention having the above configuration, since the groove is formed in the second substrate 200 and the black matrix 210 is formed in the groove, the column spacer is reduced by the thickness of the black matrix. The position of 300 can be freely selected.

In the liquid crystal display according to the second exemplary embodiment of the present invention, since the column spacer positioning margin is increased as in the first exemplary embodiment, the column spacer 300 may be shifted in the data line 140a direction as compared with the conventional technology. Accordingly, since the area of the black matrix 210 is reduced, the opening ratio may be increased by the opening areas 210a and 210b.

In addition, by forming a groove in the second substrate 200 to lower the thin film step of the substrate to prevent contact between the column spacer 300 and the thin film transistor or the data pad, it is possible to reduce cross defects as shown in FIG. .

Next, a liquid crystal display according to a third exemplary embodiment of the present invention will be described in detail with reference to FIG. 8. The liquid crystal display according to the third embodiment of the present invention illustrated in FIG. 8 differs from the first embodiment in that the thin film transistor formed on the thin film transistor substrate is not a down gate type but a top gate type.

8 is a schematic cross-sectional view of a liquid crystal display according to a third exemplary embodiment of the present invention.

Referring to FIG. 8, the thin film transistor substrate may include a first substrate 100, an active layer 130, a gate insulating layer 120, a gate electrode 110, and a storage electrode line 180 on the first substrate 100. And a first passivation layer 160a formed on the gate electrode 110 and the storage electrode line 180, a source electrode 140 formed on the first passivation layer 160a, a drain electrode 150, and a data pad. A second passivation layer 160b formed on the source electrode 140 and the drain electrode 150, a pixel electrode 170 connected to the data pad 150a, and an alignment layer 410.

A predetermined groove is formed on the first substrate 100 according to the third embodiment of the present invention, and an active layer 130 forming a channel when a voltage is applied to the gate electrode 110 is formed in a part of the groove. Is formed. At this time, the thickness of the active layer 130 is preferably formed to be the same as the depth of the groove. In addition, a gate insulating layer 120 made of silicon nitride (SiNx) or the like is formed on the active layer 130.

A gate line, a gate electrode 110, and a storage electrode line 180 are formed on the gate insulating layer 120, and a first passivation layer 160a is formed on the gate line, the gate electrode 110, and the storage electrode line 180. Is formed.

In this case, the gate electrode 110 and the storage electrode line 180 according to the third exemplary embodiment of the present invention are formed to overlap the pattern of the groove formed on the first substrate 100. That is, the mask for etching the first substrate 100 and the mask for forming the gate electrode 110 and the storage electrode line 180 are the same.

The gate electrode 110 and the storage electrode line 180 may be formed of a metal such as Al, Al alloy, Ag, Ag alloy, Cr, Ti, Ta, Mo, or the like. The gate electrode 110 and the storage electrode line 180 are preferably formed using one mask, and have a metal layer such as Cr, Mo, Ti, Ta, etc. having excellent physicochemical properties and an Al-based or Ag-based material having a small specific resistance. It may be composed of multiple layers of two or more layers including a metal layer. In addition, the gate electrode 110 and the storage electrode line 180 may be made of various metals or conductors. In addition, the gate electrode 110 and the storage electrode line 180 may be inclined at the side, and the inclination angle with respect to the horizontal plane is preferably 30 to 80 degrees.

In addition, a source electrode 140 and a drain electrode 150 are formed on the gate insulating layer 120. In this case, contact holes are formed in the gate insulating layer 120 and the first passivation layer 160a so that the source electrode 140 and the drain electrode 150 are in contact with the active layer 130, respectively.

A second passivation layer 160b made of an organic insulating layer is formed on the source electrode 140 and the drain electrode 150. The second passivation layer 160b may be formed by exposing and developing the photosensitive organic material. An insulating film of an inorganic material made of silicon nitride or silicon oxide may be added to the lower portion of the organic insulating protective film, and the entire protective film may be formed of an inorganic insulating material such as silicon nitride or silicon oxide.

In addition, the pixel electrode 170 connected to the drain electrode 150 generally uses indium tin oxide (ITO) or indium zinc oxide (IZO) made of a transparent conductive material.

The pixel electrode 170 is positioned above the storage electrode line 180 to form a storage capacitor between the pixel electrode 170 and the storage electrode line 180.

In addition, the color filter substrate may include a black matrix 210 and a color filter 220 formed on the second substrate 200, which is a transparent glass substrate, an overcoat layer 230 of an organic material formed on the color filter 220, and And a common electrode 240 made of a transparent conductive material such as ITO or IZO formed on the overcoat layer 230.

In addition, alignment layers 410 and 420 are formed on the thin film transistor substrate and the color filter substrate for alignment of the liquid crystal material formed therebetween. The surfaces of the alignment layers 410 and 420 are rubbed to orient the liquid crystal material in a desired direction.

In the liquid crystal display according to the third exemplary embodiment of the present invention having the above configuration, a groove is formed in the first substrate 100 and an active layer is formed in a portion of the groove, and the gate line 110a and the common electrode line are formed thereon. The position of the column spacer 300 may be freely selected by forming the 180 to lower the step by the thickness of the active layer.

Referring back to FIG. 4, the column spacer 300 may be shifted in the direction of the data line 140a as compared with the related art, and thus the area of the black matrix 210 is reduced, so that the opening ratio may be as much as the opening regions 210a and 210b. Can increase.

In addition, by forming a groove in the first substrate 100 to lower the thin film step of the substrate to prevent contact between the column spacer 300 and the thin film transistor or the data pad, it is possible to reduce the cross defect as shown in FIG. .

In the above, each embodiment has been described separately, but each embodiment can be realized in various combinations. For example, the height terminal may be further reduced on each substrate by forming a groove in the thin film transistor substrate to form a gate wiring in the groove, and forming a groove in the color filter substrate to form a black matrix in the groove.

The scope of the present invention is not limited to each embodiment described above, but all changes and improvements made by those skilled in the art using the basic concept of the present invention defined in the claims also belong to the scope of the present invention.

As described above, the method of manufacturing the thin film transistor substrate and the color filter substrate according to the embodiment of the present invention forms grooves in the light transmissive substrate and forms electrode lines or black matrices in the grooves, thereby lowering the thin film level of the substrate to position the column spacers. Can be freely selected and the aperture ratio can be increased.

Claims (21)

A grooved substrate; A gate line formed corresponding to at least a portion of the groove; A data line crossing the gate line; And A thin film transistor substrate comprising a thin film transistor and a pixel electrode formed corresponding to a portion where the gate line and the data line cross. The method according to claim 1, And the depth of the groove and the thickness of the gate line are the same. The method according to claim 1, A thin film transistor substrate, wherein an active layer is formed in a part of the groove. The method according to claim 3, And the depth of the groove and the thickness of the active layer are the same. The method according to any one of claims 1 to 4, And the gate line is formed in the groove or overlaps the pattern of the groove. The method according to any one of claims 1 to 4, And a storage electrode line formed in a portion of the groove. A grooved substrate; A black matrix formed in the groove; A color filter formed on the black matrix; And A color filter substrate comprising a column spacer formed on the black matrix. The method according to claim 7, And the depth of the grooves and the thickness of the black matrix are the same. A thin film transistor substrate having a first substrate, a gate line formed on the first substrate, a data line intersecting the gate line, and a thin film transistor and a pixel electrode corresponding to a portion where the gate line and the data line intersect. ; And A second substrate, a black matrix formed on the second substrate, a color filter and a common electrode formed on the black matrix and corresponding to the pixel electrode, and a color filter substrate having a column spacer formed on the black matrix. But A predetermined groove is formed in at least one of the first substrate and the second substrate. The method according to claim 9, And a gate line corresponding to the groove formed in the first substrate. The method according to claim 9, And a black matrix is formed in the groove formed in the second substrate. Forming a groove on the light transmissive substrate; And Forming an electrode line along the pattern of the groove. The method according to claim 12, And the depth of the groove and the thickness of the electrode line are the same. The method according to claim 12, Before forming the electrode line along the pattern of the groove, And forming an active layer in a portion of the groove. The method according to claim 14, And the depth of the groove and the thickness of the active layer are the same. The method according to any one of claims 12 to 15, The pattern of the groove and the pattern of the electrode line is formed using the same mask. The method according to claim 16, At least a portion of the electrode line is a gate line including a gate electrode of the thin film transistor. The method according to claim 16, And a part of said electrode line is a sustain electrode line for forming a sustain capacitor. Etching the light transmissive substrate to form a groove; And Forming a black matrix along the pattern of the grooves; Forming a column spacer on top of the black matrix. The method according to claim 19, The pattern of the grooves and the pattern of the black matrix is formed using the same mask. The method according to claim 19 or 20, And the depth of the groove and the thickness of the black matrix are the same.

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