KR101321534B1 - Stacked sensor package - Google Patents

Abstract

Stacked sensor packages are provided. The stacked sensor package according to an embodiment of the present invention has a package on package structure in which a first package is stacked on an upper portion of a second package, wherein the first package has a recess and a first signal line formed therein. A first package body; An inertial sensor chip attached to an upper surface of the concave portion; And a first external electrode formed on an outer surface of the first package body and electrically connected to the inertial sensor chip and exposed to the outside, wherein the second package comprises: a semiconductor chip; A heat dissipation metal panel in close contact with the bottom surface of the semiconductor chip and dissipating heat transferred to the outside; A second package body in close contact with the heat dissipating metal panel and having a second signal line formed therein; And a second external electrode formed on an outer surface of the second package body and electrically connected to the semiconductor chip and exposed to the outside.

Description

Stackable Sensor Packages {STACKED SENSOR PACKAGE}

The present invention relates to a stacked sensor package, and more particularly, to a stacked sensor package in which one sensor package and one or more semiconductor packages are vertically stacked.

In the development of the sensor, the package plays an important role in blocking the sensor from the external environment and at the same time providing a path of communication with the outside world. In general, it is known that the package development cost accounts for more than 70% in sensor development. Therefore, it is important to reduce the package cost in order to reduce the price of the sensor, and the research and development activities for the development of the low-cost package in the development of the sensor for the automotive or IT are continuously performed. In order to reduce the cost of the package, a lot of research is being conducted on the development of a plastic package using an epoxy molding compound (EMC). In the case of the plastic package, the sensor structure chip and the signal processing semiconductor chip are horizontally arranged or stacked. When the chip is placed horizontally, the signal connection lines are long, so the parasitic capacitance affects the sensor performance. In the case of lamination, the parasitic capacitance is excellent, but the temperature of the sensor structure chip is changed due to the heat generated from the semiconductor chip, thereby changing the sensor characteristics. Despite the shortcomings of such plastic packages, the market share of sensors using plastic packages is increasing in the case of sensors for automobiles or IT for low cost.

Unlike sensors for automobiles or IT, the sensors used in navigation systems use ceramic packages to increase the package's performance rather than price. The ceramic package is more reliable than the plastic package because of the excellent shielding of the external environment.

Hereinafter, a conventional stacked sensor package structure will be briefly described with reference to FIGS. 1 to 3. 1 is a cross-sectional view illustrating a structure in which a conventional sensor module and an ASIC are vertically stacked, and FIGS. 2 and 3 are structures in which a conventional sensor module and an ASIC are mounted side by side on a substrate. Figure is a diagram.

Referring to FIG. 1, the sensor package 100 may include a substrate 102, a sensor module (MEMS chip) 108, a semiconductor chip 104, and a plurality of wires 106 that electrically connect signals to each other. Include. The semiconductor chip 104 is positioned above the sensor module 108 and is electrically connected to a wire bonding pad (not shown) of the substrate 102 by the wire 106. The sensor module 108 is attached to the lower surface of the semiconductor chip 104 and the upper surface of the substrate 102, and is electrically connected to the semiconductor chip 104 by a wire 106.

2 and 3, the sensor package 200 having another structure may include a substrate 202, a sensor module (MEMS chip) 208, a semiconductor chip 204, and a plurality of electrically connecting signals to each other. The wire 206 of the sensor module 208 and the semiconductor chip 204 may be formed at the same level as each other. That is, both the sensor module 208 and the semiconductor chip 204 may be directly attached to the substrate 202.

The semiconductor packages 100 and 200 illustrated in FIGS. 1 to 3 generate a large amount of heat while performing sensor signal processing, a microprocessor, or a microcontroller function. The semiconductor chip and the sensor module are mounted on the same substrate and adjacent to each other. In this case, since a large amount of heat is generated, particularly in the case of contacting up and down as in FIG. 1, effectively dissipating the generated heat to the outside becomes an important problem to be solved.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a stacked sensor package capable of rapidly dissipating heat inside stacked semiconductor chips to the outside in order to solve the above problems.

Another technical problem to be achieved by the present invention is to provide a stacked sensor package capable of minimizing parasitic capacitance between metal wirings while simultaneously transmitting a signal from a sensor module to a semiconductor chip (ASIC).

Problems to be solved by the present invention are not limited to the above-mentioned problems, and other problems not mentioned will be clearly understood by those skilled in the art from the following description.

A stacked sensor package according to an exemplary embodiment of the present invention for achieving the above object is a package on package structure in which a first package is stacked on an upper portion of a second package, and the first package has a recess formed therein. A first package body having a first signal line formed thereon; An inertial sensor chip attached to an upper surface of the concave portion; And a first external electrode formed on an outer surface of the first package body and electrically connected to the inertial sensor chip and exposed to the outside, wherein the second package comprises: a semiconductor chip; A heat dissipation metal panel in close contact with the bottom surface of the semiconductor chip and dissipating heat transferred to the outside; A second package body in close contact with the heat dissipating metal panel and having a second signal line formed therein; And a second external electrode formed on an outer surface of the second package body and electrically connected to the semiconductor chip and exposed to the outside.

Other specific details of the invention are included in the detailed description and drawings.

1 is a cross-sectional view illustrating a structure in which a conventional sensor module and an ASIC are stacked vertically.
2 and 3 illustrate a structure in which a conventional sensor module and a semiconductor chip (ASIC) are mounted side by side on a substrate.
4 and 5 are cross-sectional views illustrating an upper sensor package and a lower semiconductor package, respectively, according to an embodiment of the present invention.
6 is a cross-sectional view illustrating a stacked structure of the packages illustrated in FIGS. 4 and 5.
7 is a cross-sectional view illustrating a stacked sensor package according to another exemplary embodiment of the present invention.

Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Is provided to fully convey the scope of the invention to those skilled in the art, and the invention is only defined by the scope of the claims. Like reference numerals refer to like elements throughout.

When an element is referred to as being "connected to" or "coupled to" with another element, it may be directly connected to or coupled with another element or through another element in between. This includes all cases. On the other hand, when one element is referred to as being "directly connected to" or "directly coupled to " another element, it does not intervene another element in the middle. Like reference numerals refer to like elements throughout. "And / or" include each and every combination of one or more of the mentioned items.

Although the first, second, etc. are used to describe various elements, components and / or sections, it is needless to say that these elements, components and / or sections are not limited by these terms. These terms are only used to distinguish one element, element or section from another element, element or section. Therefore, it goes without saying that the first element, the first element or the first section mentioned below may be the second element, the second element or the second section within the technical spirit of the present invention.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. In the present specification, the singular form includes plural forms unless otherwise specified in the specification. It is noted that the terms "comprises" and / or "comprising" used in the specification are intended to be inclusive in a manner similar to the components, steps, operations, and / Or additions.

Unless otherwise defined, all terms (including technical and scientific terms) used in the present specification may be used in a sense that can be commonly understood by those skilled in the art. Also, commonly used predefined terms are not ideally or excessively interpreted unless explicitly defined otherwise.

Hereinafter, the stacked sensor package structure according to an embodiment of the present invention will be described with reference to FIGS. 4 to 6. 4 and 5 are cross-sectional views illustrating an upper sensor package and a lower semiconductor package according to an embodiment of the present invention, and FIG. 6 is a cross-sectional view illustrating a stacked structure of the package shown in FIGS. 4 and 5.

Referring to FIG. 4, the upper sensor package 400 includes a first package body 402, an inertial sensor chip 404, an encapsulant 408, and a lead 416. The encapsulant 408 may or may not be applied depending on the inertial sensor chip.

The first package body 402 has a recess 402a having a predetermined step and a signal line 402b for inducing an electrical signal therein. The inertial sensor chip 404 may be seated in the recess 402a of the first package body 402. The first package body 402 seals the inertial sensor chip 404 together with the lid 416 from the outside to protect the inertial sensor chip 404 vulnerable to outside air.

The first package body 402 may include a high temperature cofired ceramic (HTCC).

The signal line 402b may serve to transfer an electrical signal generated from the inertial sensor chip 404 to the lower semiconductor package 500. A portion of the signal line 402b is vertically formed in the vertical direction of FIG. 4, thereby minimizing unnecessary parasitic capacitance by minimizing the overlapping area between the signal transmission distance and the wiring.

The inertial sensor chip 404 is attached to one surface of the concave portion 402a of the first package body 402 by a predetermined adhesive means, for example, an adhesive containing liquid epoxy or silicon, and by a wire 406. The wire bonding pad 414 is electrically connected to the signal line 402b of the first package body 402. In the present embodiment, an example in which the inertial sensor chip 404 is bonded by a wire bonding method is not limited thereto. A circuit pattern layer (not shown) may be formed on the recess 402a of the first package body 402. It may be formed and bonded to the circuit pattern layer by a flip chip bonding method to exchange electrical signals with each other. In addition, in the present exemplary embodiment, one inertial sensor chip 404 is included in the upper sensor package 400, but the present invention is not limited thereto. The upper sensor package 400 may be the inertial sensor chip 404. ) May further include one or more semiconductor chips (not shown) stacked vertically.

The inertial sensor chip 404 may refer to a sensor for detecting an acceleration and an angular velocity according to a rotation of a moving body, but is not limited thereto and may be a ceramic sensor or a MEMS sensor classified according to a manufacturing process. It may be. The inertial sensor chip 404 may be a sensor chip that measures the inertia of one axis among three-dimensional axes.

An upper portion of the first package body 402 on which the inertial sensor chip 404 is mounted may further include a lid 416 serving as a cover and a getter 418 formed on a predetermined portion of the lower surface of the lid 416. have. The lead 416 blocks the inertial sensor chip 404 from the outside together with the first package body 402, and may be formed of a kovar alloy having good adhesion to other materials, but is not limited thereto. Any lead (for example, a plastic lead) which can seal the part 402a may be sufficient. When the getter 418 is vacuum or sealedly mounted inside the package, the getter 418 absorbs outgas generated from the inside of the package or the sensor chip, thereby maintaining a constant environment inside the package. The lead 416 may be attached to the upper surface of the first package body 402 by brazing or seam welding using a brazing metal (not shown) such as AuSn.

The outer surface of the first package body 402 may include a first external electrode 420 electrically connected to the inertial sensor chip 404 by a signal line 402b. The first external electrode 420 may be exposed to the outside to transmit an electrical signal to an external component, for example, the lower semiconductor package 500. The first external electrode 420 may be provided in plural, and a part of the first external electrode 420 may be formed on the lower surface of the first package body 402 to be connected to the lower semiconductor package 500 by soldering. For example, a part may be formed on the side of the first package body 402 for vertical mounting and connected to the circuit board by soldering. This will be described in detail in another embodiment of the present invention.

In some embodiments, the first external electrode 420 may be configured to be exposed to the side of the first package body 402 and to the top and bottom surfaces of the first package body 402. For example, the first external electrode 420 may be formed at a corner portion where the side and top and bottom surfaces of the first package body 402 are connected. As described later, the first external electrode 420 is in contact with the second external electrode 520 of the lower semiconductor package 500 to transmit and receive a signal, or the first external electrode 420 when the semiconductor package is vertically mounted. ) Is to be in contact with the circuit board to transmit and receive signals.

Referring to FIG. 5, the lower semiconductor package 500 includes a second package body 502, a semiconductor chip 504, a heat dissipation metal panel 506, and an encapsulant 508.

The second package body 502 has a recess 502a having a predetermined step and a signal line 502b for inducing an electrical signal therein. The semiconductor chip 504 may be seated in the recess 502a of the second package body 502. The second package body 502 seals the semiconductor chip 504 from the outside together with the lead 516 to protect the semiconductor chip 504.

The second package body 502 may include a high temperature cofired ceramic (HTCC).

The signal line 502b transmits an electrical signal generated from the inertial sensor chip 404 of the upper sensor package 400 to the semiconductor chip 504 of the lower semiconductor package 500 via the second external electrode 520. Can be done. A portion of the signal line 502b may be vertically formed in the vertical direction of FIG. 5 to minimize the signal transmission distance, and reduce unnecessary parasitic capacitance by minimizing overlapping areas between the wirings.

In the example shown in FIG. 5, the signal line 502b on the left side of the drawing is configured to connect between the wire bonding pad 514 and the second external electrode 520 exposed on the upper left side. The signal line 502b is configured to connect between the wire bonding pad 514 and the second external electrode 520 exposed on the lower right side, which is a view on one cross-section, parallel to the cross-section but the other In the cross-sectional view of the region, the signal line 502b on the left side may be connected to the second external electrode 520 on the lower left side, and the signal line 502b on the right side may be connected to the second external electrode 520 on the upper right side. have.

In addition, since a plurality of wires 530 and wire bonding pads 514 connected from the semiconductor chip 504 are provided along a vertical direction of the drawing, the structure of the different signal lines 502b described above may be different from each other. And alternately repeating according to the wire bonding pad 514.

The semiconductor chip 504 is attached to an upper surface of the recess 502a of the second package body 502 and is connected to the signal line 502b of the second package body 502 by a wire 530. 514 is electrically connected. In the present exemplary embodiment, the semiconductor chip 504 is bonded by the wire bonding method, but the present invention is not limited thereto. A circuit pattern layer (not shown) is formed in the recess 502a of the second package body 502. In addition, the circuit pattern layer may be bonded by flip chip bonding to exchange electrical signals with each other. Also, in the present exemplary embodiment, one semiconductor chip 504 is included in the lower semiconductor package 500. However, the present invention is not limited thereto, and the lower semiconductor package 400 may include the semiconductor chip 504. It may further include one or more semiconductor chips (not shown) stacked vertically.

The semiconductor chip 504 may receive an electrical signal from the inertial sensor chip 404 to perform a predetermined operation, and transmit a result value converted into an electrical signal through the signal line 502b to the outside.

The heat dissipation metal panel 506 is in close contact with the bottom surface of the semiconductor chip 504. The heat dissipation metal panel 506 may serve as a heat sink that absorbs heat generated by the semiconductor chip 504 and releases it to the outside. The heat dissipating metal panel 506 may be located on the recess 502a of the second package body 502. In some embodiments, a through hole is formed in the bottom surface of the recess 502a so that the bottom surface of the heat dissipation metal panel 506 is exposed to the outside, in which case the heat dissipation metal panel 506 is formed. Since it is exposed to the outside, the heat release efficiency can be further improved.

The heat dissipation metal panel 506 may be made of copper-tungsten (CuW) having high thermal conductivity, but is not limited thereto. The heat dissipation metal panel 506 may be made of another metal material having high heat dissipation efficiency. In order to increase the heat dissipation efficiency of the heat dissipation metal panel 506, the bottom surface of the heat dissipation metal panel 506 on the opposite side of the semiconductor chip 504 may have a larger surface area than the top surface on the side of the semiconductor chip 504. The volume of the heat dissipating metal panel 506 may be greater than that of the semiconductor chip 504.

The heat dissipation metal panel 506 may have heat generated by the semiconductor chip 504 or the inertial sensor chip 404 as well as heat generated by the semiconductor chip 504 in direct contact with the first package body 402 or the second package. It may be in contact with a portion of the second package body 502 to release heat transferred by the body 502. Therefore, heat generated in the inertial sensor chip 404 may be directly discharged through the first package body 402 and the second package body 502 or transferred to the heat dissipation metal panel 506 to be discharged to the outside.

As such, the stacked sensor package according to the present exemplary embodiment may quickly release heat inside the stacked semiconductor chips to the outside, thereby reducing the probability of malfunction and improving device reliability.

A lead 516 serving as a cover and a getter 518 formed on a lower surface of the lead 516 may be further provided on the second package body 502 on which the semiconductor chip 504 is mounted. The lead 516 may block the semiconductor chip 504 together with the second package body 502 from the outside, and may be formed of a kovar alloy having good adhesion to other materials, but is not limited thereto. Any lead (eg, a plastic lead) that can seal 502a may be used. The lead 516 may be attached to the top surface of the second package body 502 by brazing or seam welding using a brazing metal such as AuSn.

The outer surface of the second package body 502 may include a second external electrode 520 electrically connected to the inertial sensor chip 504 by a signal line 502b. The second external electrode 520 may be exposed to the outside to transmit an electrical signal to an external component, for example, the upper sensor package 400. The second external electrode 520 may be provided in plurality, and a part of the second external electrode 520 may be formed on the upper surface of the second package body 502 to be connected to the upper sensor package 400 by soldering. For example, a part may be formed on the side of the second package body 502 for vertical mounting and connected to the circuit board by soldering. This will be described in detail in another embodiment of the present invention.

Referring to FIG. 6, the upper sensor package 400 is disposed on the upper portion of the lower semiconductor package 500, and the lower side of the upper and lower sensor packages 400 is soldered to the side portions of the corresponding external electrodes 420 and 520, respectively. A package on package structure in which the semiconductor package 500 and the upper sensor package 400 are stacked is formed.

In some embodiments, the first external electrode 420 is exposed to the bottom surface of the first package body 402, and the second external electrode 520 is exposed to the top surface of the second package body 502, thereby contacting each other. Can be electrically connected.

A protrusion 502c is formed on an upper portion of the second package body 502 so that the upper sensor package 400 and the lower semiconductor package 500 can be easily coupled, and the protrusion is formed below the first package body 402. Grooves 402c corresponding to the grooves may be formed.

In the stacked sensor package according to the present exemplary embodiment, the upper sensor package 400 and the lower semiconductor package 500 are separated from each other and positioned independently of each other. In particular, the semiconductor chip 504 generates more heat than the inertial sensor chip 404. By separating the from the inertial sensor chip 404 it is possible to minimize the change in characteristics due to the temperature of the inertial sensor chip 404. In addition, by forming a signal line for the interface between the inertial sensor chip 404 and the semiconductor chip 504 in the vertical direction, the line length is minimized so that the signal line and / or wiring between the inertial sensor chip 404 and the semiconductor chip 504. The parasitic capacitance can be reduced by minimizing the overlap region of the liver.

7 is a cross-sectional view illustrating a stacked sensor package according to another exemplary embodiment of the present invention. Referring to FIG. 7, an uneven surface 506a may be formed on an opposite surface of the heat dissipating metal panel 506 on the semiconductor chip 504 side. Since the unevenness 506a is formed on the side opposite to the surface in close contact with the semiconductor chip 504 of the heat dissipation metal panel 506, the heat dissipation efficiency may be increased by increasing the contact area with the outside.

In addition, in the stacked sensor package according to the present exemplary embodiment, side surfaces of the first and / or second package bodies 402 and 502 are attached to the circuit board 600 using signal lines therein, so that the stacked sensor package is vertically aligned. It may be mounted on the circuit board 600.

The stacked sensor package according to the present embodiment is for measuring acceleration or angular velocity in a three-dimensional space, and in order to measure values in the X-, Y-, and Z-axis directions, three stacked sensor packages are mounted in a direction perpendicular to each other. Can be. For example, when the stacked sensor package according to the previous embodiment is a sensor for measuring acceleration in the Z-axis direction, the stacked sensor package according to the present embodiment may correspond to a sensor for measuring acceleration in the X-axis or Y-axis direction. Can be.

In this case, side surfaces of the first and / or second package bodies 402 and 502 may be mounted to be in contact with the circuit board.

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, You will understand. It is therefore to be understood that the above-described embodiments are illustrative in all aspects and not restrictive.

400: upper sensor package 402: first package body
404: inertial sensor chip 406: wire
414; Wire bonding pad 416: lead
418: getter 420: first external electrode
500: lower semiconductor package 502: second package body
504: semiconductor chip 506: heat dissipation metal panel

Claims (10)

A package on package structure in which a first package is stacked on top of a second package,
The first package,
A first package body having a recess formed therein and having a first signal line formed therein;
An inertial sensor chip attached to an upper surface of the concave portion; And
A plurality of first external electrodes formed inside the outer surface of the first package body and electrically connected to the inertial sensor chip through the first signal line and exposed to the outside;
At least a portion of the plurality of first external electrodes is formed on the bottom surface of the first package body,
The second package,
Semiconductor chip;
A heat dissipation metal panel in close contact with the bottom surface of the semiconductor chip and dissipating heat transferred to the outside;
A second package body in close contact with the heat dissipating metal panel and having a second signal line formed therein; And
A plurality of second external electrodes formed inside the outer surface of the second package body and electrically connected to the semiconductor chip through the second signal line and exposed to the outside;
At least some of the plurality of second external electrodes are formed on an upper surface of the second package body,
At least a portion of the first external electrode and at least a portion of the second external electrode are connected by soldering, the stacked sensor package. The method of claim 1,
The second package body comprises a high temperature cofired ceramic (HTCC), stacked sensor package. The method of claim 1,
The first package body comprises a high temperature cofired ceramic (HTCC), stacked sensor package. The method of claim 1,
The heat dissipation metal panel is a copper tungsten (CuW), stacked sensor package. 5. The method of claim 4,
The uneven surface of the heat dissipation metal panel on the opposite side of the semiconductor chip direction is formed, the stacked sensor package. The method of claim 1,
A protrusion is formed on an upper portion of the second package body,
The stacked sensor package having a groove corresponding to the protrusion is formed below the first package body. The method of claim 1,
At least a part of the other of the plurality of first external electrodes is formed on the side of the first package body,
And at least another portion of the plurality of second external electrodes is formed on a side surface of the second package body. delete The method of claim 1,
A portion of the first signal line and the second signal line are formed in a vertical direction in which the first and second packages are stacked. The method of claim 1,
On top of the first package,
The stacked sensor package of claim 1, wherein a lid is formed to seal the recess of the first package body.

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