KR101296648B1 - Liquid Crystal Display Device - Google Patents

Abstract

The present invention relates to a liquid crystal display device capable of stably maintaining the capacity of a storage capacitor as well as improving the aperture ratio.

According to an exemplary embodiment of the present invention, a liquid crystal display includes: a gate line formed by stacking a transparent conductive layer and a gate conductive layer on a substrate; A common line formed of the same stacked structure as the gate line; A common electrode finger connected to the transparent conductive layer of the common line and defining a plurality of slits; A gate insulating layer formed to cover the gate line, the common line, and the common electrode finger portion; A data line crossing the gate line to define a pixel area; A thin film transistor connected to the data line and the gate line; A passivation layer formed to cover the data line and the thin film transistor; And a pixel electrode finger portion connected to the thin film transistor and defining a plurality of slits, wherein the common electrode finger portion and the pixel electrode finger portion cross at an angle.

Description

[0001] The present invention relates to a liquid crystal display device,

1 is a view showing an example of a horizontal field application liquid crystal display device.

FIG. 2 is a cross-sectional view of a portion of the horizontal field application type liquid crystal display shown in FIG. 1; FIG.

3 is a plan view illustrating a thin film transistor array of a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 4 is a cross-sectional view of the thin film transistor array illustrated in FIG. 3 taken along the line " I-I '"

FIG. 5 is an enlarged view of a portion where the common electrode finger portion and the pixel electrode finger portion illustrated in FIG. 3 cross each other;

6A through 6D are cross-sectional views illustrating a method of manufacturing a thin film transistor array of a liquid crystal display according to an exemplary embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

32: gate line 32a: gate electrode

34: data line 34a: source electrode

34b: drain electrode 130: semiconductor pattern

TFT: thin film transistor 36: common line

37: common electrode 37a: common electrode finger portion

37b: common electrode connection portion 38: pixel electrode

38a: pixel electrode finger portion 38b: pixel electrode connection portion

a: angle between the common electrode finger portion and the pixel electrode finger portion

d1: width of first slit d2: spacing between first slit

d3: line width of the pixel electrode finger portion

d4: interval between pixel electrode finger portions

The present invention relates to a liquid crystal display device. In particular, the present invention relates to a liquid crystal display device capable of stably maintaining the capacity of the storage capacitor while improving the aperture ratio.

The liquid crystal display device displays an image by adjusting the light transmittance of the liquid crystal using an electric field. Such liquid crystal displays are roughly classified into a vertical electric field application type and a horizontal electric field application type according to the direction of the electric field for driving the liquid crystal.

In the vertical field application type liquid crystal display, the liquid crystal is driven by a vertical electric field formed between the pixel electrode and the common electrode disposed to face the upper and lower substrates. The vertical field application type liquid crystal display device has an advantage of having a large aperture ratio while having a narrow viewing angle of about 90 degrees.

In a horizontal field application liquid crystal display, a liquid crystal is driven by a horizontal electric field between a pixel electrode and a common electrode disposed side by side on a lower substrate. Such a horizontal field application liquid crystal display device has an advantage that a viewing angle is about 160 degrees.

1, a horizontal electric field application type liquid crystal display includes a thin film transistor array 10 and a color filter array 20 opposed to each other with a liquid crystal 9 interposed therebetween.

The color filter array 20 includes a black matrix 3, a color filter 5, and an overcoat layer 7, which are sequentially formed on the upper substrate 1. The black matrix 3 serves to prevent light leakage and to prevent light interference between neighboring color filters. The color filter 5 includes red (R), green (G), and blue (B) to enable color display. The overcoat layer 7 serves to planarize the upper substrate 1 on which the black matrix 3 and the color filter 5 are formed.

The thin film transistor array 10 includes a gate line 12 and a data line 14 crossing each other to define a pixel region, and a thin film transistor TFT connected to the gate line 12 and the data line 14, respectively. And a pixel electrode 18 connected to the thin film transistor TFT, a common electrode 22 parallel to the pixel electrode 18, and a common line 16 connected to the common electrode 22. The common electrode 22 and the pixel electrode 18 include portions formed in the form of slits, and the slits are formed to be parallel to each other. The thin film transistor array 10 is formed on the lower substrate 11.

The thin film transistor TFT supplies the data signal from the data line 14 to the pixel electrode 18 in response to the gate signal from the gate line 12. A horizontal electric field is formed between the pixel electrode 18 to which the data signal is supplied through the thin film transistor TFT and the common electrode 22 to which the reference voltage is supplied through the common line 16. [ The liquid crystal 9 is rotated by the horizontal electric field. The degree of rotation of the liquid crystal 9 is adjusted in accordance with the data signal. As described above, the horizontal electric field-applied liquid crystal display device realizes an image by adjusting the degree of rotation of the liquid crystal 9 by the horizontal electric field to change the light transmittance transmitted through the pixel region.

FIG. 2 is a diagram illustrating a range in which the liquid crystal 9 is driven in the liquid crystal display shown in FIG. 1.

Referring to FIG. 2, in general, the pixel electrode 18 and the common electrode 22 of the horizontal field application type liquid crystal display device are formed side by side on the insulating layers 13 and 15 formed on the lower substrate 11. When a signal is supplied to each of the pixel electrode 18 and the common electrode 22, an electric field substantially parallel to the substrate 11 is formed in the region P1 between the pixel electrode 18 and the common electrode 22, but the pixel electrode 18 ) And the common electrode 22 are less affected by the horizontal electric field. As a result, the liquid crystal 9a arranged at P1 is driven by a horizontal electric field to contribute to the aperture ratio, but the liquid crystal (arranged to be adjacent to the pixel electrode 18 and the common electrode 22 or overlapping with the electrodes 18 and 22). 9b) hardly drives and reduces the aperture ratio.

In order to improve the disadvantages of the horizontal field-applied liquid crystal display device, a liquid crystal display device in which a common electrode is formed in a plate shape over the pixel area and overlaps a pixel electrode including a slit with an insulating layer therebetween has been proposed. . In this case, the gap between the common electrode plate and the pixel electrode may be formed to be narrower than the gap between the upper substrate and the lower substrate, and as a result, a fringe field in the form of a parabolic fringe is formed on the common electrode plate and the pixel electrode. By driving all of the liquid crystal molecules filled between the upper substrate and the lower substrate by the fringe field, the viewing angle of the liquid crystal display device can be secured and the aperture ratio problem can be improved.

As described above, when the common electrode is formed in the form of a plate to form a fringe field, the common electrode and the pixel electrode overlap to form a high capacity storage capacitor. The storage capacitor serves to stably charge the data signal supplied to the pixel electrode. However, when the storage capacitor is formed with a large capacity, the size of the thin film transistor must be increased to effectively control the charging rate. As such, when the size of the thin film transistor is increased, the non-opening portion is widened, causing a contradiction in which the aperture ratio is lowered again. In order to prevent this, a method of reducing the capacity of the storage capacitor has been proposed by forming a thick gate insulating film and a protective film between the pixel electrode and the common electrode. This method is problematic because the process time and cost are increased because the deposition process of the gate insulating film and the protective film increases in proportion to the thickness thereof.

SUMMARY OF THE INVENTION An object of the present invention is to provide a liquid crystal display device which can stably maintain the capacity of a storage capacitor while increasing the aperture ratio.

In order to achieve the above object, a liquid crystal display according to an embodiment of the present invention comprises a gate line formed by stacking a transparent conductive layer and a gate conductive layer on a substrate; A common line formed of the same stacked structure as the gate line; A common electrode finger connected to the transparent conductive layer of the common line and defining a plurality of slits; A gate insulating layer formed to cover the gate line, the common line, and the common electrode finger portion; A data line crossing the gate line to define a pixel area; A thin film transistor connected to the data line and the gate line; A passivation layer formed to cover the data line and the thin film transistor; And a pixel electrode finger portion connected to the thin film transistor and defining a plurality of slits, wherein the common electrode finger portion and the pixel electrode finger portion cross at an angle.

An angle between the common electrode finger portion and the pixel electrode finger portion is 30 ° to 60 °.

The width of the slits defined by the common electrode finger portion is 3 μm to 5 μm, and the interval between the slits defined by the common electrode finger portion is 10 μm to 20 μm.

Line widths of the pixel electrode finger portions are 3 μm to 4 μm, and intervals between the pixel electrode finger portions are 5 μm to 7 μm.

Other objects and advantages of the present invention other than the above object will become apparent from the description of the preferred embodiment of the present invention with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 3 to 6D.

3 is a plan view illustrating a thin film transistor array of a liquid crystal display according to an exemplary embodiment of the present invention. FIG. 4 is a cross-sectional view of the thin film transistor array illustrated in FIG. 3 taken along the line "I-I '". Hereinafter, a pattern is displayed on the common electrode and the pixel electrode to distinguish the common electrode and the pixel electrode formed of the transparent conductive layer in the plan view.

3 and 4, a thin film transistor array according to an exemplary embodiment of the present invention may include a gate line 32 and a data line 34 intersecting a gate insulating layer 43 interposed therebetween on a substrate 41 and a gate. A thin film transistor (TFT) connected to the line 32 and the data line 34, a common line 36 parallel to the gate line 32, a common electrode 37 connected to the common line 36, and a thin film A pixel electrode 38 connected to the transistor TFT and intersecting the common electrode 37 at an angle with the gate insulating film 43 and the protective film 45 interposed therebetween is provided.

The gate line 32 supplies a gate signal to the thin film transistor TFT and the data line 34 supplies a data signal to the thin film transistor TFT. The gate line 32 and the data line 34 cross each other to define a pixel area. Here, the gate line 32 has a structure in which the transparent conductive layer 140 and the gate conductive layer 142 are stacked. The gate conductive layer 142 may include a metal layer stacked in a single, double, or triple.

The common electrode 37 is formed in each pixel area, and receives a reference voltage (hereinafter, common voltage) for driving the liquid crystal through the common line 36 connected to the common electrode 37. The common line 36 is formed in the same stacked structure as the gate line 32. That is, the common line 36 has a structure in which the transparent conductive layer 140 and the gate conductive layer 142 are stacked. The common electrode 37 is connected to the transparent conductive layer 140 of the common line 36. In this way, the common electrode 37 is connected to the common line 36 by being connected to the transparent conductive layer 140 included in the common line 36. In addition, the common electrode 37 is divided into common electrode fingers 37a defining a plurality of first slits 132, and a common electrode connection 37b connecting the common electrode fingers 37a. As described above, an area where the common electrode 37 and the pixel electrode 38 overlap with each other through the common electrode 37 including the plurality of first slits 132 is reduced.

The thin film transistor TFT keeps the data signal of the data line 34 charged and maintained in the pixel electrode 38 in response to the gate signal of the gate line 32. To this end, the thin film transistor TFT may include a gate electrode 32a connected to the gate line 32, a source electrode 34a connected to the data line 34, and a drain electrode 34b connected to the pixel electrode 38. And a semiconductor pattern 130 overlapping with the gate electrode 32a and the gate insulating layer 43 interposed therebetween. The semiconductor pattern 130 may include an active layer 144 that forms a channel between the source electrode 34a and the drain electrode 34b, between the source electrode 34a and the active layer 144, and the drain electrode 34b and the active layer 144. And an ohmic contact layer 146 for ohmic contact between the electrodes 34a and 34b and the active layer 144.

The pixel electrode 38 is connected to the drain electrode 34b of the thin film transistor TFT through the contact hole 134 passing through the passivation layer 45. In addition, the pixel electrode 38 is divided into pixel electrode finger parts 38a defining a plurality of second slits 134 and pixel electrode connection parts 38b connecting the pixel electrode finger parts 38a. In this case, the pixel electrode finger portion 38a is formed to obliquely cross the common electrode finger portion 37a in order to minimize an error due to mis-alignment during the manufacturing process. The pixel electrode finger portion 38a and the common electrode finger portion 37a may be designed to be parallel to each other and not overlap, but in this case, the pixel electrode finger portion 38a and the common electrode finger portion 37a may be formed by heat during the manufacturing process. In many cases, the alignment is not made correctly due to deformation of the substrate 41 or the like, and thus it is out of the design value. That is, the fingers 38a and 37a of each electrode overlap each other differently from the design, or the distance between the fingers 38a and 37a of each electrode is greatly out of the design value. As described above, when the finger portions 38a and 37a of each electrode are largely deviated from the design value and overlapped, it is difficult to stably drive the liquid crystal. Accordingly, in the exemplary embodiment of the present invention, the overlapped areas of the pixel electrode finger portion 38a and the common electrode finger portion 37a do not significantly deviate from the design value even if they become misaligned during the manufacturing process. The common electrode fingers 37a are formed to cross at an angle to each other.

At the overlapping portion of the common electrode finger portion 37a and the pixel electrode finger portion 38a, a storage capacitor for stably maintaining the video signal supplied to the pixel electrode 38 is formed. The capacity of this storage capacitor is reduced because the common electrode contains slits. Accordingly, the liquid crystal display according to the embodiment of the present invention can effectively control the charge rate of the storage capacitor without increasing the size of the thin film transistor, thereby improving the aperture ratio. In the liquid crystal display according to the exemplary embodiment of the present invention, the filling ratio of the storage capacitor can be effectively controlled, and thus the thickness of the gate insulating layer 43 and the passivation layer 45 may not be increased. Accordingly, the liquid crystal display according to the embodiment of the present invention can reduce the process time and cost.

In addition, the liquid crystal display according to the exemplary embodiment of the present invention reduces the gate on time, which is a time for applying a voltage to the gate electrode 32a of the TFT in order to apply sufficient charge to each pixel. Since the charging of the storage capacitor can be effectively performed, it can contribute to improving the display speed of the liquid crystal display.

In addition to the above-described thin film transistor array, the liquid crystal display according to the exemplary embodiment of the present invention includes a color filter array facing the thin film transistor array, and liquid crystal molecules arranged in a horizontal direction between the thin film transistor array and the color filter array. In addition, the liquid crystal display according to the exemplary embodiment includes a first polarizing plate attached to an outer surface of the substrate 41 on which the thin film transistor array is formed, and a second polarizing plate attached to an outer surface of the substrate on which the color filter array is formed. .

The first and second polarizing plates serve to transmit light vibrating in a specific direction. The optical axis of the first polarizing plate and the optical axis of the second polarizing plate are disposed to be perpendicular to each other.

An interval between the common electrode finger portion 37a and the pixel electrode finger portion 38a according to an exemplary embodiment of the present invention is smaller than the cell gap between the thin film transistor array and the color filter array. Accordingly, since a fringe field is formed in the liquid crystal display according to the exemplary embodiment of the present invention, liquid crystal molecules of all regions may be driven.

The liquid crystal display according to the exemplary embodiment of the present invention implements an image by adjusting the light transmittance passing through the pixel region according to the degree of rotation of the liquid crystal molecules rotated by dielectric anisotropy. In the image realization, in order to reduce the phase delay difference of the light passing through the liquid crystal molecules according to the viewing angle direction, the common electrode finger portion 37a and the pixel electrode finger portion 38a are arranged along the axis along the gate line 32 in the center of the pixel region. Finger parts in a first direction symmetrical with respect to x) and fingers in a second direction may be provided. Here, the finger part in the first direction and the finger part in the second direction are connected to each other. As such, when the finger parts 37a and 38a of each electrode are symmetrically formed about the reference axis x, the liquid crystal molecules are driven symmetrically about the reference axis x. Since the phase delay values of the light transmitted through the symmetrically driven liquid crystal molecules cancel each other, the phase delay difference along the viewing angle direction is reduced, thereby improving the image quality of the liquid crystal display device.

The liquid crystal molecules driven according to the electric field formed by the common electrode finger portion 37a and the pixel electrode finger portion 38a exhibit the transmittance of the liquid crystal display device when their major axes are arranged at an average of 45 ° with respect to the first and second polarizing plates. It can be maximized. To this end, the common electrode finger portion 37a and the pixel electrode finger portion 38a according to an embodiment of the present invention preferably cross at an angle, not perpendicularly.

5 is an enlarged view of a portion where the common electrode finger portion 37a and the pixel electrode finger portion 38a intersect. Referring to FIG. 5, the common electrode finger portion 37a and the pixel electrode finger portion 38a according to the exemplary embodiment of the present invention do not cross vertically but obliquely cross each other to form a predetermined angle “a”. At this time, "a" should be formed in 30 ° to 60 ° to maximize the transmittance.

In order to further maximize the transmittance, the width d1 of the first slit 132 defined by the common electrode finger portion 37a is 3 μm to 5 μm, and the width defined by the common electrode finger portion 37a is defined. The interval d2 between one slit 132 is preferably formed to 10㎛ 20㎛.

The limiting ranges of the first slit 132 for maximizing transmittance are 3 m to 4 m in the line width d3 of the pixel electrode finger part 38a, and a distance d4 between the pixel electrode finger parts 38a is determined. It is derived from the case of 5 micrometers-7 micrometers.

Table 1 compares the difference between the 32-inch LCD according to the present invention and the 32-inch LCD according to the present invention, which is driven by forming a fringe field through the common electrode plate and the pixel electrode finger. . In Table 1, the 32 "LCD according to the present invention causes the common electrode finger portion 37a to cross at an angle with the pixel electrode finger portion 38a at an angle, and the width of the first slit 132 is 5 μm in the first slit 132. The intervals of the gaps are 10 µm, and the line widths and the gaps of the conventional pixel electrode finger portions 37 and the pixel electrode finger portions 37a according to the present invention are the same in Table 1.

Referring to Table 1, it can be seen that the capacitor capacity (Vcom Cap) by the common electrode 37 of the 32 "LCD according to the present invention is reduced from this conventional 5.79 nF to 4.58 nF. It can be seen that the total storage capacitor capacity Cst of the LCD is reduced from 1.45E-12 to 1.11E-12. As a result, it can be seen that the total story capacitor capacity Cst is reduced by about 24% according to the embodiment of the present invention.

Vcom Cap. (NF) Cst Conventional 32 "LCD 5.79 1.45E-12 32 "LCD invention 4.58 1.11E-12

The thin film transistor substrate of the liquid crystal display according to the exemplary embodiment of the present invention having such a configuration is formed by a four mask process as follows.

Referring to FIG. 6A, a gate line 32, a gate electrode 32a, a common line 36, and a common electrode 37a are formed on a substrate 41 by a first mask process.

When the first mask process is described in detail, the transparent conductive layer 140 and the gate conductive layer 142 are continuously deposited on the substrate 41 by a deposition method such as sputtering. Herein, the transparent conductive layer 140 may include indium tin oxide (ITO), tin oxide (TO), indium zinc oxide (IZO), and indium tin zinc oxide (indium tin zinc oxide). : ITZO) etc. are used. As the gate conductive layer 142, a metal material such as Mo, Ti, Cu, AlNd, Al, Cr, Mo alloy, Cu alloy, Al alloy, or the like is laminated and used in a single layer or a double layer or more. Subsequently, photoresist patterns having different heights are formed by a photolithography process and an etching process using the first mask. In order to form photoresist patterns having different heights, a diffraction exposure mask or a transflective mask is used as the first mask. Hereinafter, the case where a diffraction exposure mask is used is demonstrated mainly.

The diffraction exposure mask includes a blocking portion that blocks light, a diffraction exposure portion that diffracts light, and a transmission portion that transmits light. When the photoresist is exposed and developed using the diffraction exposure mask, a first photoresist pattern is formed in a region corresponding to the blocking portion, and a second photoresist lower than the first photoresist pattern in a region corresponding to the diffraction exposure portion. A pattern is formed and is opened in the area corresponding to the transmission part.

The first photoresist pattern is formed in the portion corresponding to the gate line 32, the gate electrode 106, and the common line 116, and the second photoresist pattern is formed in the portion corresponding to the common electrode 37a. When the transparent conductive layer 140 and the gate conductive layer 142 are etched using the first and second photoresist patterns as masks, the gate line 32 having a stacked structure of the transparent conductive layer 140 and the gate conductive layer 142 is formed. ), The gate electrode 106 and the common line 116 are patterned.

Thereafter, the second photoresist pattern is removed by ashing the photoresist pattern using an oxygen (O ₂ ) plasma. In the ashing process, the height of the first photoresist pattern is lowered. When the gate conductive layer 142 is etched using the ashed photoresist pattern as a mask, the common electrode 37a formed of a single layer of the transparent conductive layer 140 is patterned. When the remaining photoresist pattern is removed, the gate line 32, the gate electrode 32a, the common line 36, and the common electrode 37a are formed as shown in FIG. 6A. .

Subsequently, as shown in FIG. 6B, the gate insulating layer 43 is formed on the substrate 41 to cover the gate line 32, the gate electrode 32a, the common line 36, and the common electrode 37a. And a source / drain including the semiconductor pattern 130 including the active layer 144 and the ohmic contact layer 146 in the second mask process, and the data line 34, the source electrode 34a, and the drain electrode 34b. A metal pattern is formed. The semiconductor pattern 130 and the source / drain pattern are formed by one mask process using a diffraction exposure mask or a transflective mask.

The second mask process will be described in detail. A gate insulating layer 43, an amorphous silicon layer, an amorphous silicon layer doped with impurities (n + or p +), and a source / drain metal layer are sequentially formed on the substrate 41. For example, the gate insulating layer 43, the amorphous silicon layer, and the amorphous silicon layer doped with impurities are formed by PECVD, and the source / drain metal layer is formed by sputtering. An inorganic insulating material such as SiOx, SiNx, etc. is used as the gate insulating layer 43, and Cr, Mo, MoW, Al / Cr, Cu, Al (Nd), Al / Mo, Al (Nd) / Al are used as the source / drain metal layers. , Al (Nd) / Cr, Mo / Al (Nd) / Mo, Cu / Mo, Ti / Al (Nd) / Ti, and the like are used. Then, a photoresist is applied on the source / drain metal layer, and then the photoresist is exposed and developed by a photolithography process using a diffraction exposure mask. After development, a photoresist pattern relatively thinner than the photoresist pattern of other portions is formed in the channel portion.

Subsequently, an etching process using a photoresist pattern is patterned to the amorphous silicon layer on the source / drain metal layer. In this process, the source electrode 34a and the drain electrode 34b are patterned to be connected to the data line 34.

Next, the photoresist pattern of the channel portion is removed by ashing the photoresist pattern by an ashing process using an oxygen (O ₂ ) plasma. In addition, the source / drain metal layer exposed by the etching process using the ashed photoresist pattern and the ohmic contact layer 146 thereunder are removed to separate the source electrode 108 and the drain electrode 110 and the active layer 144. Is exposed.

Then, the photoresist pattern remaining on the source / drain pattern is removed by the strip process.

Thereafter, as shown in FIG. 6C, the passivation layer 43 including the contact hole 134 is formed on the gate insulating layer 43 on which the source / drain metal pattern is formed by a third mask process.

Referring to the third mask process in detail, the passivation layer 45 is formed on the gate insulating layer 43 on which the source / drain metal pattern is formed by PECVD, spin coating, or spinless coating. . As the protective film 45, an inorganic insulating material such as the gate insulating film 41, or an organic insulating material is used. Subsequently, the contact layer 134 exposing the drain electrode 34b is formed by patterning the protective layer 41 in a photolithography process and an etching process using a third mask.

Thereafter, as illustrated in FIG. 6D, pixel electrodes 38a and 38b are formed on the passivation layer 41 by a fourth mask process. The pixel electrodes 38a and 38b are formed by forming a transparent conductive layer on the passivation layer 45 and then patterning the same by a photolithography process and an etching process using a fourth mask.

As described above, in the liquid crystal display according to the exemplary embodiment of the present invention, the common electrode may include a slit to reduce an area where the common electrode and the pixel electrode overlap. Accordingly, the liquid crystal display according to the embodiment of the present invention can effectively control the charge rate of the storage capacitor without increasing the size of the thin film transistor, thereby improving the aperture ratio.

In addition, in the liquid crystal display according to the exemplary embodiment of the present invention, the common electrode finger portion and the pixel electrode finger portion cross at an angle so that the liquid crystal molecules are driven at an angle that can maximize the transmittance.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

Claims (4)

A gate line formed by stacking a transparent conductive layer and a gate conductive layer on a substrate; A common line formed of the same stacked structure as the gate line; A common electrode finger connected to the transparent conductive layer of the common line and defining a plurality of slits; A gate insulating layer formed to cover the gate line, the common line, and the common electrode finger portion; A data line crossing the gate line to define a pixel area; A thin film transistor connected to the data line and the gate line; A passivation layer formed to cover the data line and the thin film transistor; And A pixel electrode finger portion connected to the thin film transistor and defining a plurality of slits, And the common electrode finger portion and the pixel electrode finger portion cross at an angle. The method of claim 1, And an angle between the common electrode finger portion and the pixel electrode finger portion is 30 ° to 60 °. The method of claim 1, The width of the slits defined by the common electrode finger portion is 3㎛ to 5㎛, the interval between the slits defined by the common electrode finger portion is 10㎛ to 20㎛. The method of claim 3, wherein And a line width of the pixel electrode finger portion is 3 μm to 4 μm, and an interval between the pixel electrode finger portions is 5 μm to 7 μm.

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