KR101258085B1 - Liquid crystal display device prevetable static electricity prevention and method of fabricating thereof - Google Patents

Abstract

The present invention relates to an antistatic liquid crystal display device. The disclosed liquid crystal display device includes a substrate, a signal wiring having a pad at one end thereof, a short circuit connected to the pad, and a static electricity extending from the short circuit to remove the static electricity generated in the signal wiring. A protective film formed on the antistatic wiring and the substrate on which the antistatic wiring is disposed, a contact hole formed on the pad and the protective film on the top of the antistatic wiring and exposing a portion of the pad and the antistatic wiring; And a transparent conductive film electrically connecting the antistatic wiring to the pad through a hole, wherein the substrate is cut between the pad and the antistatic wiring to expose an end portion of the transparent conductive film to the outside.

Description

Anti-static liquid crystal display device and method for manufacturing the same {LIQUID CRYSTAL DISPLAY DEVICE PREVETABLE STATIC ELECTRICITY PREVENTION AND METHOD OF FABRICATING THEREOF}

1 is a view showing a conventional liquid crystal display device.

FIG. 2 is a view illustrating the lower substrate of FIG. 1 cut in a liquid crystal panel unit. FIG.

3 is a plan view showing a part of a thin film transistor array substrate according to the present invention;

4A through 4D are cross-sectional views illustrating a method of manufacturing an antistatic liquid crystal display device according to the present invention.

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device and a manufacturing method capable of preventing static electricity to block static electricity flowing from the outside.

Recently, as the information society has progressed rapidly, a display field for processing and displaying a large amount of information has been developed. Recently, the need for a flat panel display (plate panel display) has emerged in order to meet the era of thinning, light weight, low power consumption. Accordingly, a thin film transistor-liquid crystal display (hereinafter referred to as TFT-LCD) having excellent color reproducibility and thinness has been developed. In general, a liquid crystal display (LCD) displays an image corresponding to a data signal on a panel by adjusting light transmittance of liquid crystal cells arranged in a matrix form on a liquid crystal panel with a video data signal supplied thereto. do. To this end, the liquid crystal display device includes electrodes for applying an electric field to the liquid crystal layer, a thin film transistor (hereinafter referred to as TFT) for switching data supply for each liquid crystal cell, and externally supplied data. And signal wiring for supplying the control signal and the control signal for the TFT.

The liquid crystal display device includes a manufacturing process of the upper and lower panels of the liquid crystal cell forming the pixel unit, forming and rubbing of the alignment layer for liquid crystal alignment, bonding of the upper and lower plates, It is completed through a number of processes, such as the process of injecting and encapsulating a liquid crystal between the upper and lower plates. Here, the lower plate manufacturing process includes forming a thin film transistor and forming other electrode portions by applying and etching an electrode material, a semiconductor layer, and an insulating film on a substrate.

After the liquid crystal injection and encapsulation process, an IPT (In Process Test) of the liquid crystal panel is performed. This is performed by forming a shorting bar on the outer portion of the liquid crystal panel in order to facilitate defect inspection due to disconnection of the completed TFT-LCD array. The short-circuit wiring serves to prevent static electricity generated during the process of the liquid crystal display device from being applied to the thin film transistor liquid crystal display array so that internal elements (such as thin film transistors) are destroyed.

1 is a view showing a conventional liquid crystal display device. 2 is a view showing the lower substrate of FIG. 1 cut in units of a liquid crystal panel.

As shown in FIG. 1, the liquid crystal display according to the related art has a TFT (Thin Film Transistor) matrix 20 formed on the lower substrate 10 and a gate for testing a gate line of the TFT matrix 20. Shorting line 22 and a data line shorting line 24 for testing the data line of the TFT matrix 20, and a gate line and a gate line shorting line of the TFT matrix 20 A gate line test electrode 16 connecting 22 and a data line test electrode 18 connecting the data line and data line short circuit 24 of the TFT matrix 20 are provided.

In the central portion of the lower substrate 10, a TFT matrix 20 is formed in which TFT elements switched by the control signal and the video signal of the gate and data D-IC are arranged in a matrix form. In addition, the lower substrate 10 includes a gate pad 10A region for mounting a gate integrated circuit (D-IC) and a data pad 10B region for mounting a data D-IC. Are formed respectively.

The short circuit lines 22 and 24 are connected to the gate line test electrodes 16 and the data line test electrodes 18, respectively. Each of the gate line test electrodes 16 and the data line test electrodes 18 is connected to gate lines and data lines, respectively. Accordingly, the short circuit lines 22 and 24 are connected to the gate lines and the data lines through the gate line test electrodes 16 and the data line test electrodes 18. The short circuits 22 and 24 distribute the hundreds of volts of static electricity generated during the work process to the respective gate lines and the data lines, thereby making the equipotentials. Accordingly, the short circuit lines 22 and 24 prevent the thin film transistor from being destroyed by static electricity flowing in the gate lines and the gate lines.

The short circuit lines 22 and 24 are connected to the antistatic wiring lines 30 and 32, respectively.

Thus, the short-circuit wirings 22 and 24 are not used at all in driving the actual TFT-LCD, but are used at the time of antistatic and array inspection as described above, and thus are finally removed.

After the TFT matrix 20 is tested as described above, if it is determined to be normal, as shown in FIG. 2, the lower substrate of FIG. 1 is cut in units of a liquid crystal panel. In this case, the antistatic wirings 30 and 32 are exposed to the outside. Then, the liquid crystal module 14 and the upper substrate 12 are sequentially stacked on the lower substrate 10 ′ cut by the liquid crystal panel unit.

However, in the conventional liquid crystal display, when the lower substrate is cut by the liquid crystal panel unit, an antistatic wiring is exposed on one side of the cut lower substrate 10 ′. The exposed part of the antistatic wiring may be corroded by external moisture. In addition, the exposed portion of the antistatic wiring serves as an inflow path of external static electricity. Therefore, the gate line and the data line of the TFT matrix are damaged due to the static electricity introduced through the path.

In order to solve the above problems, an object of the present invention is to provide a liquid crystal display device and a method of manufacturing the same, which can prevent damage caused by corrosion of external moisture and inflow of external static electricity by improving the structure of the antistatic wiring.

In order to achieve the above object, the present invention provides an antistatic liquid crystal display device. The device is disposed on the substrate, a signal wiring having a pad at one end, a short circuit connected to the pad, and an antistatic to extend from the short circuit to remove the static electricity generated in the signal wiring A protective film formed on the wiring, the protective film formed on the substrate on which the antistatic wiring is disposed, a contact hole formed on the pad and the upper protective film on the antistatic wiring, and exposing a portion of the pad and the antistatic wiring; And a transparent conductive film electrically connecting the antistatic wiring to the pad through the substrate, wherein the substrate is cut between the pad and the antistatic wiring to expose an end portion of the transparent conductive film to the outside.

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3 is a plan view showing a portion of a thin film transistor array substrate according to the present invention.

As shown in FIG. 3, the thin film transistor array substrate 19 includes a thin film transistor T, a pixel P, a gate wiring 111, and a gate pad formed at a predetermined area at an end of the gate wiring 111. 113, a data line 115 formed to intersect the gate line 111, and a data pad 117 formed at an end of the data line 115 at a predetermined area. The thin film transistor T includes a source electrode 121 and a drain electrode 123, an active layer 125 and a gate electrode 127 serving as a channel between the two electrodes, and the gate electrode 27. Is formed by protruding and extending from the gate wiring 111 to a predetermined area, and the source electrode 121 is formed by protruding and extending from a portion of the data wiring 115.

The gate lines 111 and the data lines 115 are connected to each other by one shorting bar. The short-circuit wiring serves to prevent disconnection or short-circuit of the wiring due to static electricity generated when the array substrate is formed because the plurality of wirings are in an equipotential state.

Gate short circuits 129 and 131 of the gate wiring 111 are formed at one side of the array substrate, and a first gate short circuit 129 of the gate short circuits is an even-numbered gate of the gate pads 113. The pads 113b are connected to each other, and the second gate short circuit (not shown) 131 is formed by connecting all of the odd-numbered gate pads 113a.

The second gate short interconnection 131 connecting the odd-numbered gate pads 113a among the gate short interconnections is formed on the same layer as the data interconnection 115. In this case, the second gate short interconnection 131 in the one direction is formed. The first gate contact hole 153 formed on the second gate short circuit line 131 of the vertical pattern extending in the direction of the odd-numbered gate pad 113a and the second gate contact hole 154 formed on the gate pad. At the same time, the transparent electrode is patterned to connect the second gate short circuit 131 and the odd-numbered gate pad 113a. This connection can be variously modified.

The first and second gate short circuits 129 and 131 are connected to the antistatic wiring 132.

Referring to the manufacturing method of the antistatic liquid crystal display device according to the present invention having the above configuration is as follows.

4A to 4D are sectional views taken along line II-II ′, III-III ′, and IV-IV ′ of FIG. 3 and shown in a process sequence.

As shown in FIG. 4A, the conductive metal material is deposited and patterned on the transparent substrate to form the gate electrode 127, the gate pad 113, and the gate wiring 111.

A first gate short interconnection line 129 is formed to connect the even-numbered gate pad 113b among the gate pads 113. In this case, the first gate short interconnection line 129 is connected to be orthogonal to the even-numbered gate pad 113b among the gate pads 113. In addition, it extends from the plurality of odd-numbered gate pads 113a not connected to the gate short circuit, and simultaneously forms an antistatic wiring 132 connected to the adjacent gate short circuit 129. Next, an insulating material is deposited on the entire surface of the substrate on which the gate wiring 111 is formed to form the gate insulating layer 143.

As shown in FIG. 4B, a semiconductor layer and an impurity semiconductor layer are sequentially stacked and patterned on a substrate having the gate insulating layer 143 to form an active layer 125 in an island shape on the gate electrode 127. To form. Next, a conductive metal material is deposited on the entire surface of the substrate 119 on which the active layer 125 is formed and then patterned. As a result, the source electrode 121, the drain electrode 123 spaced apart from the predetermined interval, the data pad 117, and the data wiring 115 are formed. In this case, the metal forming the source / drain electrodes generally uses chromium (Cr). Chromium usable as the data line 115 has a higher resistance than molybdenum (Mo) or other conductive metals, but has excellent chemical resistance to etching solutions. Molybdenum, on the other hand, has a low resistance and is not strong in strong acidic etching solutions. With this characteristic, when molybdenum is used to form data wiring, a strong acid used for cutting the antistatic wiring of a gate metal material later penetrates into a pin hole formed on the protective layer, It may cause disconnection failure in data wiring. Therefore, to prevent this, chromium is generally used. In this case, the first gate short circuit 129 and the second gate short circuit 131 are formed together with the data wiring 115.

Next, the protective layer 149 is formed by depositing the above-described insulating material on the entire surface of the substrate 119 on which the first and second gate short circuit lines 129 and 131, the data line 115, and the like are formed.

As shown in FIG. 4C, the protective layer 149 is selectively etched to expose the drain electrode 123 to form a contact hole, and the odd-numbered gate pad 113a and an even-numbered gate pad ( 113b) and a portion of the antistatic wiring 132 are exposed to form a contact hole.

As shown in FIG. 4D, a transparent conductive metal such as indium tin oxide (ITO) is deposited and patterned on the passivation layer 149 to form the pixel electrode 153 connected to the drain electrode 123. Form. At the same time, the transparent conductive film pattern 154 is formed to cover the antistatic wiring 132, wherein the gate pad 113a and the antistatic wiring 132 are electrically connected by the transparent conductive film pattern 154.

After the array substrate is formed through such a series of processes, a short or open defect between the even-numbered gate line 113b and the odd-numbered gate line 1113a is tested. After the test, the short-circuit wiring and the anti-static wiring 132 are removed by scribing. At this time, a transparent conductive metal resistant to corrosion is exposed on the cut end of the liquid crystal panel, thereby preventing defects due to corrosion.

According to the present invention, by improving the antistatic wiring structure, there is an advantage that can be prevented from damage caused by the corrosion of the external moisture and the inflow path of the external static electricity.

Claims (7)

A substrate; A signal wiring disposed on the substrate and having a pad at one end thereof; Short circuit connected to the pad, An antistatic wiring extending from the short circuit to remove static electricity generated in the signal wiring; A protective film formed on a substrate on which the antistatic wiring is disposed; A contact hole formed in the pad and the protective layer on the antistatic wiring and exposing a portion of the pad and the antistatic wiring; A transparent conductive film formed on the protective film and electrically connecting the antistatic wiring and the pad through a contact hole, And the substrate is cut between the pad and the antistatic wiring so that an end portion of the transparent conductive film is exposed to the outside. The liquid crystal display device according to claim 1, wherein the transparent conductive film is an ITO film. The liquid crystal display of claim 1, wherein the pad comprises a gate pad. The liquid crystal display of claim 1, wherein the pad comprises a data pad. Providing a substrate; Signal wiring on the substrate. Forming a pad connected to an end of the signal wiring, a short circuit connected to the pad, and an antistatic wiring extending from the short circuit to remove static electricity generated in the signal wiring; Forming a protective film on the substrate; Forming a contact hole in the pad and the protective layer on the antistatic wiring to expose a portion of the pad and the antistatic wiring; Forming a transparent conductive film on the passivation layer to electrically connect the antistatic wiring to the pad through a contact hole; And cutting the substrate between the pad and the antistatic wiring. The method of claim 5, wherein the forming of the pad includes forming a gate pad and forming a data pad, and forming the signal wiring includes forming a gate wiring and a data wiring. The forming of the wiring comprises forming a gate short wiring and a data short wiring. The method of claim 5, wherein the forming of the transparent conductive film comprises forming an ITO film.

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