KR101252082B1 - Thin film transistor substrate of horizontal electronic field applying type and fabricating method thereof - Google Patents

Abstract

The present invention provides a horizontal field application type thin film transistor substrate capable of lowering the resistance of an electrode and a method of manufacturing the same.

To this end, a horizontal field applied thin film transistor substrate according to an embodiment of the present invention includes a gate line and a data line defining a pixel region; A thin film transistor connected to the gate line and the data line; A common line parallel to the gate line; A plurality of common electrodes connected to the common line and formed in the pixel area; A plurality of pixel electrodes connected to the thin film transistor and formed in the pixel region to form a horizontal electric field with the common electrode; A gate pad lower electrode extending from the gate line; A gate pad upper electrode connected to the gate pad lower electrode; A data pad lower electrode extending from the data line; A data pad upper electrode connected to the data pad lower electrode, and the common electrode, the pixel electrode, the gate pad upper electrode, and the data pad upper electrode include a dual structure including an opaque conductive layer and a transparent conductive layer. And the common electrode is connected to the common line through a first contact hole penetrating through an insulating film and a passivation layer between the common electrode and the common line, and the pixel electrode connects the passivation layer between the pixel electrode and the thin film transistor. The gate electrode is connected to the drain electrode of the thin film transistor through a second contact hole penetrating, and the gate pad upper electrode is connected to the lower electrode of the gate pad through a third contact hole penetrating through the insulating layer and the protective layer, and the upper part of the data pad. An electrode is connected to the lower electrode of the data pad through a fourth contact hole penetrating the passivation layer. Characterized in that each connection.

Description

Horizontal field-applied thin film transistor substrate and its manufacturing method {THIN FILM TRANSISTOR SUBSTRATE OF HORIZONTAL ELECTRONIC FIELD APPLYING TYPE AND FABRICATING METHOD THEREOF}             

1 is a plan view showing one pixel region of a conventional horizontal field applied thin film transistor substrate.

FIG. 2 is a cross-sectional view of the thin film transistor substrate illustrated in FIG. 1 taken along lines II ′ and II-II ′.

3 is a plan view illustrating one pixel region and a pad region of a horizontal field-applied thin film transistor substrate according to a first exemplary embodiment of the present invention.

FIG. 4 is a cross-sectional view of the thin film transistor substrate of FIG. 3 taken along lines III-III ', IV-IV', V-V ', and VI-VI'.

5 is a cross-sectional view illustrating a horizontal field applied thin film transistor substrate according to a second exemplary embodiment of the present invention.

6 is a cross-sectional view illustrating a horizontal field applied thin film transistor substrate according to a third exemplary embodiment of the present invention.

Description of the Related Art                 

2, 102: gate line 4, 104: data line

6, 106 thin film transistor 8, 108 gate electrode

10, 110: source electrode 12, 112: drain electrode

13, 113, 115, 127, 133: contact hole

14, 114: pixel electrode

16, 16: common line 18, 118: common electrode

45, 145: substrate

46, 146: gate insulating film 48, 148: active layer

50, 150: ohmic contact layer 52, 152: protective film

101: metal layer 103: transparent conductive layer

124: gate pad 126: gate pad lower electrode

130: gate pad upper electrode 132: data pad

134: data pad lower electrode 138: data pad upper electrode

14A, 114A: pixel electrode horizontal portion 14B, 114B: pixel electrode finger portion

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device using a horizontal electric field, and more particularly, to a horizontal field applied thin film transistor substrate and a method of manufacturing the same, which can simplify the process.

The liquid crystal display device displays an image by adjusting the light transmittance of the liquid crystal using an electric field. Such liquid crystal displays are roughly classified into a vertical electric field application type and a horizontal electric field application type according to the direction of the electric field for driving the liquid crystal.

In the vertical field applying liquid crystal display, a liquid crystal of TN (Twisted Nemastic) mode is driven by a vertical electric field formed between a pixel electrode and a common electrode disposed to face the upper and lower substrates. The vertical field application type liquid crystal display device has an advantage of having a large aperture ratio while having a narrow viewing angle of about 90 degrees.

The horizontal field application type liquid crystal display drives liquid crystal in In Plane Switching (IPS) mode by a horizontal electric field between a pixel electrode and a common electrode disposed side by side on a lower substrate. Such a horizontal field application liquid crystal display device has an advantage that a viewing angle is about 160 degrees. Hereinafter, the horizontal field application liquid crystal display will be described in detail.

The horizontal field application type liquid crystal display device includes a thin film transistor substrate (bottom plate) and a color filter substrate (top plate) bonded to each other, a spacer for keeping a cell gap constant between the two substrates, and a liquid crystal filled in the cell gap. .

The thin film transistor substrate is composed of a plurality of signal lines and a thin film transistor for forming a horizontal electric field in pixels, and an alignment film coated thereon for liquid crystal alignment. The color filter substrate is composed of a color filter for color implementation and a black matrix for light leakage prevention, and an alignment film coated thereon for liquid crystal alignment.                         

1 is a plan view showing one pixel region of a conventional horizontal field-applied thin film transistor substrate, and FIG. 2 is a cutaway view of one pixel region shown in FIG. 1 along lines I-I 'and II-II'. It is a cross section.

The thin film transistor substrate illustrated in FIGS. 1 and 2 includes a gate line 2 and a data line 4 formed to intersect on a lower substrate 45 with a gate insulating layer 46 therebetween, and a thin film transistor formed at each intersection thereof. (6), a pixel electrode (14) and a common electrode (18) formed to form a horizontal electric field in the pixel region provided in the intersection structure, and a common line (16) connected to the common electrode (18).

The gate line 2 supplying the gate signal and the data line 4 supplying the data signal are formed in an intersecting structure to define a pixel region.

The common line 16 that supplies the reference voltage for driving the liquid crystal is formed in parallel with the gate line 2 with the pixel region therebetween.

The thin film transistor 6 keeps the pixel signal of the data line 4 charged and held in the pixel electrode 14 in response to the gate signal of the gate line 2. To this end, the thin film transistor 6 includes a gate electrode 8 connected to the gate line 2, a source electrode 10 connected to the data line 4, and a drain electrode 12 connected to the pixel electrode 14. And an active layer 48, a source electrode 10, and a drain electrode 12 overlapping each other with the gate electrode 8 and the gate insulating layer 46 interposed therebetween to form a channel between the source electrode 10 and the drain electrode 12. ) And an ohmic contact layer 50 for ohmic contact between the active layer 48 and the active layer 48. The active layer 48 and the ohmic contact layer 50 also overlap the data line 4.                         

The pixel electrode 14 is connected to the drain electrode 12 of the thin film transistor 6 through a contact hole 13 penetrating through the passivation layer 52 and is formed in the pixel region. The pixel electrode 14 includes a horizontal portion 14A connected to the drain electrode 12 and formed parallel to the adjacent gate line 2, and a finger portion 14B extending from the horizontal portion 14A to the pixel region. do.

The common electrode 18 is connected to the common line 16 and formed in the pixel area. The common electrode 18 is formed in parallel with the finger 14B of the pixel electrode 14 in the pixel area.

Accordingly, the common electrode 18 to which the reference voltage (hereinafter, referred to as common voltage) is supplied through the common portion 16 and the finger portion 14B of the pixel electrode 14 supplied with the pixel signal through the thin film transistor 6. A horizontal electric field is formed between them. The horizontal electric field causes liquid crystal molecules arranged in the horizontal direction between the thin film transistor substrate and the color filter substrate to rotate by dielectric anisotropy. The transmittance of light passing through the pixel region is changed according to the degree of rotation of the liquid crystal molecules, thereby realizing the gradation.

In such a thin film transistor substrate, the common electrode 18 is formed of the same gate metal layer as the gate line 2, and the pixel electrode 14 is formed of a transparent conductive layer. In contrast, the common electrode 18 may be formed of a source / drain metal layer together with the data line 4, or may be formed of a transparent conductive layer together with the pixel electrode 14, but the transparent conductive layer has a high resistance. In particular, as the size of the liquid crystal panel increases, the lengths of the common electrode 18 and the pixel electrode 14 become longer. In this case, the resistance of the common electrode 18 or the pixel electrode 14 formed of the transparent conductive layer increases. This affects the image quality.                         

For example, if the length of the common electrode 18 or pixel electrode 14 in one pixel region in a 15 inch panel was 250 μm, the electrode would exceed 1 mm in a 60 inch panel. Therefore, if the inch of the panel increases by 4 times, the resistance of the common electrode 18 or the pixel electrode 14 should be less than 1/4 in the same transparent electrode structure. However, it is difficult to reduce the resistance by more than 1/4 by changing the material of the transparent electrode or changing the structure slightly. In addition, when the thickness of the transparent electrode is increased in order to lower the resistance of the transparent electrode, an abnormality in driving of the liquid crystal molecules occurs due to the step of the thick transparent electrode, resulting in a problem of deterioration of image quality such as light leakage.

Accordingly, it is an object of the present invention to provide a horizontal field application type thin film transistor substrate capable of lowering the resistance of an electrode and a method of manufacturing the same.

In order to achieve the above object, a horizontal field applied thin film transistor substrate according to an embodiment of the present invention includes a gate line and a data line defining a pixel region; A thin film transistor connected to the gate line and the data line; A common line parallel to the gate line; A plurality of common electrodes connected to the common line and formed in the pixel area; A plurality of pixel electrodes connected to the thin film transistor and formed in the pixel region to form a horizontal electric field with the common electrode; A gate pad lower electrode extending from the gate line; A gate pad upper electrode connected to the gate pad lower electrode; A data pad lower electrode extending from the data line; A data pad upper electrode connected to the data pad lower electrode, and the common electrode, the pixel electrode, the gate pad upper electrode, and the data pad upper electrode include a dual structure including an opaque conductive layer and a transparent conductive layer. And the common electrode is connected to the common line through a first contact hole penetrating through an insulating film and a passivation layer between the common electrode and the common line, and the pixel electrode connects the passivation layer between the pixel electrode and the thin film transistor. The gate electrode is connected to the drain electrode of the thin film transistor through a second contact hole penetrating, and the gate pad upper electrode is connected to the lower electrode of the gate pad through a third contact hole penetrating through the insulating layer and the protective layer, and the upper part of the data pad. An electrode is connected to the lower electrode of the data pad through a fourth contact hole penetrating the passivation layer. Characterized in that each connection.

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In the dual structure, the opaque conductive layer is formed on the upper layer, or the transparent conductive layer is formed on the upper layer.

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A method of manufacturing a horizontal field applied thin film transistor substrate according to an exemplary embodiment of the present invention includes forming a gate line, a gate pad lower electrode extending from the gate line, a common line parallel to the gate line, and an insulating layer covering them; ; Forming a data line crossing the gate line to define a pixel area, a data pad lower electrode extending from the data line, a thin film transistor connected to the gate line and the data line, and a protective layer covering the data line; A first contact hole penetrating the insulating film and the protective film to expose the common line, a second contact hole penetrating the protective film to expose the drain electrode of the thin film transistor, a gate pad penetrating the insulating film and the protective film Forming a third contact hole exposing a lower electrode and a fourth contact hole penetrating the passivation layer to expose the data pad lower electrode; A plurality of common electrodes connected to the common line through the first contact hole, a plurality of pixel electrodes connected to the drain electrode through the second contact hole, and a lower electrode of the gate pad through the third contact hole And forming a gate pad upper electrode connected to the gate pad upper electrode and a data pad upper electrode connected to the data pad lower electrode through the fourth contact hole, wherein the common electrode, the pixel electrode, and the gate pad upper electrode are formed. The data pad upper electrode is formed in a double structure including an opaque conductive layer and a transparent conductive layer.

The double structure is formed by sequentially laminating the opaque conductive layer and the transparent conductive layer and patterning the same by a mask process.

The double structure is formed by sequentially laminating the transparent conductive layer and the opaque conductive layer and then patterning the same by a mask process.

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Other objects and advantages of the present invention will become apparent from the following description of preferred embodiments of the present invention with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 3 to 6.

3 is a plan view illustrating one pixel area of a horizontal field-applied thin film transistor substrate according to an exemplary embodiment of the present invention, and FIG. 4 illustrates III-III ′, IV-IV ′, and V of the thin film transistor substrate illustrated in FIG. 3. Sectional drawing cut along the lines -V 'and VI-VI'.

The thin film transistor substrate illustrated in FIGS. 3 and 4 includes a gate line 102 and a data line 104 formed to intersect on the lower substrate 145 with a gate insulating layer 146 therebetween, and a thin film transistor formed at each intersection thereof. (106), a pixel electrode 114 and a common electrode 118 having a dual structure formed to form a horizontal electric field in the pixel region provided in the intersection structure, and a common line 116 connected to the common electrode 118. do.                     

The gate line 102 for supplying the gate signal and the data line 104 for supplying the data signal are formed in a cross structure to define a pixel area.

The common line 116 for supplying a reference voltage for driving the liquid crystal is formed on the same layer as the gate line 102 with the pixel region therebetween.

The thin film transistor 106 keeps the pixel signal of the data line 104 charged and held in the pixel electrode 114 in response to the gate signal of the gate line 102. To this end, the thin film transistor 106 includes a gate electrode 108 connected to the gate line 102, a source electrode 110 connected to the data line 104, and a drain electrode 112 connected to the pixel electrode 114. In addition, the active layer 148, the source electrode 110, and the drain electrode 112 overlapping each other with the gate electrode 108 and the gate insulating layer 146 therebetween to form a channel between the source electrode 110 and the drain electrode 112. ) And an ohmic contact layer 150 for ohmic contact between the active layer 148 and the active layer 148. The active layer 148 and the ohmic contact layer 150 also overlap the data line 104.

The pixel electrode 114 is formed in the pixel area on the passivation layer 152 and is connected to the drain electrode 112 of the thin film transistor 106 through the first contact hole 113 penetrating the passivation layer 152. It consists of slits.

The common electrode 118 is formed side by side to form a horizontal electric field with the pixel electrode 114 in the pixel area on the passivation layer 152 and passes through the passivation layer 152 and the gate insulating layer 146. It consists of a number of slits connected with common line 116 via 115.

Accordingly, a horizontal electric field is formed between the pixel electrode 114 supplied with the pixel signal through the thin film transistor 106 and the common electrode 118 supplied through the common line 116. The horizontal electric field causes liquid crystal molecules arranged in the horizontal direction between the thin film transistor substrate and the color filter substrate to rotate by dielectric anisotropy. The transmittance of light passing through the pixel region is changed according to the degree of rotation of the liquid crystal molecules, thereby realizing the gradation.

The gate line 102 is connected to a gate driver (not shown) through the gate pad 124. The gate pad 124 is exposed through the gate pad lower electrode 126 extending from the gate line 102, the gate insulating layer 152, and the third contact hole 127 penetrating through the passivation layer 154. The gate pad upper electrode 128 connected to the 126 is provided.

The data line 104 is connected to a data driver (not shown) through the data pad 130. The data pad 130 has a lower data pad exposed through the fourth contact hole 133 penetrating through the passivation layer 132 and the data pad lower electrode 132 extending from the data line 104 along with the semiconductor pattern thereunder. The data pad upper electrode 134 connected to the electrode 132 is provided.

Here, the pixel electrode 114 and / or the common electrode 118 are formed of a conductive layer of two or more layers. In order to prevent light leakage, at least one of the conductive layers of at least two layers is formed of an opaque conductive layer. In addition, at least one conductive layer should be made of a conductive material that does not oxidize well even when exposed. In addition, at least one layer must be sufficiently low in resistivity to be suitable for use as the pixel electrode 114 and the common electrode 118.

For example, the pixel electrode 114 and the common electrode 118 are formed in a double structure in which an opaque conductive layer 101 and a transparent conductive layer 103 are stacked as shown in FIG. 4. As the opaque conductive layer 101, a metal material such as Cr, Cu, Ti, Al, AlNd, or the like is used, and as the transparent conductive layer 103, a transparent conductive material such as ITO, IZP, ITZO, or the like is used. Accordingly, the resistance of the pixel electrode 114 and the common electrode 118 can be lowered than when only the transparent conductive layer is used. Accordingly, it is preferable that the pixel electrode 114 and the common electrode 118 have a thickness as low as possible so as not to affect the liquid crystal driving. The opaque conductive layer 101 has a minimum thickness capable of blocking light, and the transparent conductive layer 103 positioned above the oxidizing layer is not well oxidized and can only function to protect the opaque conductive layer 101. It is good to have a thickness of. In this case, since the common electrode 118 is formed in a different layer from the common line 116 which is limited in reducing the thickness due to a line resistance problem, it is advantageous to lower the thickness as much as possible.

The gate pad upper electrode 128 and the data pad upper electrode 134 are formed in the same double layer structure as the pixel electrode 114 and the common electrode 118. In this case, it is possible to obtain an effect of reducing the resistance of the pad portion than using only the transparent conductive layer. The pixel electrode 118, the common electrode 114, the gate pad upper electrode 128, and the data pad upper electrode 134 are formed by the same mask process. Specifically, the opaque conductive layer 101 and the transparent conductive layer 103 are sequentially stacked on the protective film 152, and then the opaque conductive layer 101 and the transparent conductive layer 103 are patterned by a photolithography process and an etching process. The pixel electrode 114, the common electrode 118, the gate pad upper electrode 128, and the data pad upper electrode 134 are formed.

Meanwhile, the opaque conductive layer 101 and the transparent conductive layer 103 may be formed by reversing the stacking order as shown in FIG. 5. This structure is suitable when it is advantageous to etch the opaque conductive layer 101 first and then etch the transparent conductive layer 103. In this case, as the opaque conductive layer 101, a conductive material having high corrosion resistance and strength such as Ti and high pad reliability is used.

On the other hand, when a conductive material having low pad reliability is used as the opaque conductive layer 101, the gate pad upper electrode 128 and the data pad upper electrode 134 are formed in a single structure of a transparent conductive layer as shown in FIG. . This is possible by forming the transparent conductive layer 103 and preventing the opaque conductive layer 101 from being deposited on the pad portion using a metal mask when forming the opaque conductive layer 101 thereon. Accordingly, the pad portion can maintain the pad reliability of the transparent conductive layer as it is.

As described above, the horizontal field-applied thin film transistor substrate and the method of manufacturing the same according to the present invention can lower the resistance by forming the common electrode and / or the pixel electrode in at least double including an opaque conductive layer and a transparent conductive layer. By preventing light leakage, the contrast can be improved.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

Claims (17)

A gate line and a data line defining a pixel region; A thin film transistor connected to the gate line and the data line; A common line parallel to the gate line; A plurality of common electrodes connected to the common line and formed in the pixel area; A plurality of pixel electrodes connected to the thin film transistor and formed in the pixel region to form a horizontal electric field with the common electrode; A gate pad lower electrode extending from the gate line; A gate pad upper electrode connected to the gate pad lower electrode; A data pad lower electrode extending from the data line; A data pad upper electrode connected to the data pad lower electrode, The common electrode, the pixel electrode, the gate pad upper electrode, and the data pad upper electrode have a dual structure including an opaque conductive layer and a transparent conductive layer. The common electrode is connected to the common line through a first contact hole penetrating through an insulating film and a protective film between the common electrode and the common line, The pixel electrode is connected to the drain electrode of the thin film transistor through a second contact hole penetrating the protective layer between the pixel electrode and the thin film transistor, The gate pad upper electrode is connected to the gate pad lower electrode through a third contact hole penetrating the insulating layer and the passivation layer; And the data pad upper electrode is connected to the data pad lower electrode through a fourth contact hole penetrating the passivation layer, respectively. delete delete delete delete delete The method of claim 1, The dual structure is a horizontal field applied thin film transistor substrate, characterized in that the opaque conductive layer is formed on the upper layer, or the transparent conductive layer is formed on the upper layer. delete Forming a gate line, a gate pad lower electrode extending from the gate line, a common line parallel to the gate line, and an insulating layer covering the gate line; Forming a data line crossing the gate line to define a pixel area, a data pad lower electrode extending from the data line, a thin film transistor connected to the gate line and the data line, and a protective layer covering the data line; A first contact hole penetrating the insulating film and the protective film to expose the common line, a second contact hole penetrating the protective film to expose the drain electrode of the thin film transistor, a gate pad penetrating the insulating film and the protective film Forming a third contact hole exposing a lower electrode and a fourth contact hole penetrating the passivation layer to expose the data pad lower electrode; A plurality of common electrodes connected to the common line through the first contact hole, a plurality of pixel electrodes connected to the drain electrode through the second contact hole, and a lower electrode of the gate pad through the third contact hole Forming a gate pad upper electrode connected to the gate pad upper electrode and a data pad upper electrode connected to the data pad lower electrode through the fourth contact hole; The common electrode, the pixel electrode, the gate pad upper electrode, and the data pad upper electrode are formed in a dual structure including an opaque conductive layer and a transparent conductive layer. The method of claim 9, The double structure, The method of claim 1, wherein the opaque conductive layer and the transparent conductive layer are sequentially stacked and then patterned by a mask process. The method of claim 9, The double structure, And sequentially patterning the transparent conductive layer and the opaque conductive layer, and then patterning the transparent conductive layer and the opaque conductive layer in a mask process. delete delete delete delete delete delete

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