KR101233145B1 - Liquid crystal display device - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device. In particular, in a liquid crystal display device in which a common electrode and a pixel electrode are formed on the same substrate, a liquid crystal display device in which an end of a gate line of an antistatic circuit is electrically connected to a ground voltage line. It is about.

To this end, an auxiliary ground voltage line of the same layer and the same material as the data line is formed, and the ends of the gate line and the auxiliary ground voltage line are electrically connected to each other through a contact hole.

Therefore, the increased gate line voltage generated during the high temperature operation is discharged to the ground voltage line, thereby preventing black spots (MURA).

Description

[0001] Liquid crystal display device [0002]

1 is a block diagram showing a basic configuration of a general liquid crystal display device.

2 is a block diagram illustrating a transverse electric field type liquid crystal display device.

3 is a block diagram illustrating a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 4 is a schematic enlarged view of portion A of the liquid crystal display shown in FIG. 3.

BRIEF DESCRIPTION OF THE DRAWINGS FIG.

100: liquid crystal panel 111: display area

112: non-display area 120: gate driver

122: gate TCP 124: gate line

125, 145, 165: antistatic circuit 140: data driver

142: data TCP 144: data line

150,152: first and the first LOG signal line group

166a, 166b, 167a, 167b: 1a, 1b, 2a and 2b common voltage lines

176,177: first and second ground voltage lines

178: grounding voltage extension line 179: auxiliary grounding voltage line

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device. More particularly, the present invention relates to a liquid crystal display device which prevents occurrence of black spots on an image by grounding ends of a plurality of gate lines arranged in a horizontal direction.

Among display devices, liquid crystal display devices have advantages of small size, thinness and low power consumption and are used in notebook computers, office automation devices, audio / video devices, and the like. In particular, an active matrix type liquid crystal display device using a thin film transistor (TFT) as a switching element is suitable for displaying a dynamic image.

FIG. 1 is a block diagram illustrating a basic configuration of a general liquid crystal display device, and includes a liquid crystal panel 1 displaying a large image and a driving circuit controlling the same. The driving circuit includes a gate driver 2 and a data driver. It consists of (4).

In the liquid crystal panel 1, the first substrate using the glass and the second substrate are bonded to each other by a predetermined distance, and the liquid crystal Clc is injected therebetween. In addition, as illustrated in FIG. 1, a plurality of gate lines GL and a plurality of data lines DL intersect to form a plurality of pixel regions, and in each pixel region, a thin film transistor TFT and a liquid crystal LC ) Is displayed to display an image by a light transmittance controlled according to the rotation angle of the liquid crystal molecules by the electric field between the pixel electrode and the common electrode.

The gate driver 2 performs on / off control of the thin film transistors T arranged on the liquid crystal panel 1 in response to control signals input from the outside. The gate driver GL of the gate driver 2 performs a gate line GL on the liquid crystal panel 1. By sequentially enabling the horizontal period (1H) by one horizontal line to sequentially drive the thin film transistors (T) on the liquid crystal panel 1 by one horizontal line, so that the analog image signals supplied from the data driver (4) are each thin film transistor ( To pixels connected to T).

The data driver 4 generates analog image signals in response to control signals and data signals input from the outside, and supplies the image signals to the liquid crystal panel 1 to control the rotation angle of the liquid crystal molecules.

Here, the gate driver 2 and the data driver 4 are configured in a tape carrier package (TCP) method in which a drive driver is mounted on a thin flexible film, and the gate driver 2 and the data driver 4 are installed. The mounted TCP is connected to the edge region of the liquid crystal panel 1 by a tab automated bonding method.

In addition, signal lines for supplying the supplied signals to the gate driver are formed at the edge of the liquid crystal panel in a line-on-glass (LOG) manner.

In general, the liquid crystal display device has a structure in which a common electrode is formed on a color filter substrate, which is a second substrate. That is, the liquid crystal display device having the structure in which the common electrode is formed perpendicular to the pixel electrode drives the liquid crystal by an electric field applied up and down, and thus has excellent characteristics such as transmittance and aperture ratio. It acts as a ground to prevent destruction of the liquid crystal cell due to static electricity. However, the liquid crystal drive by the electric field applied up-down has a disadvantage that the viewing angle characteristics are not excellent. Accordingly, in order to overcome the above disadvantages, an in-plane switching liquid crystal display device has been proposed.

Hereinafter, the transverse field type liquid crystal display device will be described in detail with reference to FIG. 2.

FIG. 2 is a block diagram illustrating a transverse electric field type liquid crystal display device, the gate line 24 and the data line 44 formed on the display area 11 of the liquid crystal panel 10, and the liquid crystal panel 10. A gate TCP 22 mounted with a gate driver 20 bonded to an outer end of the non-display area 12 in Fig. 8) and a data TCP 42 mounted with a data driver 40 are provided.

The liquid crystal panel 10 includes a first substrate on which various signal lines and a thin film transistor T are formed, a second substrate on which a color filter is formed, and liquid crystal injected into the first and second substrates. The liquid crystal panel 10 displays an image on the display area 11 by thin film transistors T formed at intersections of the gate line 24 and the data line 44. The first LOG signal line group 50 for supplying a control signal and a power supply voltage to the gate driver 20 in an edge region of the non-display region 12 of the first substrate positioned outside the display region 11. ) And the second LOG signal line group 52 are arranged.

The first and second LOG signal line groups 50 and 52 include a common voltage Vcom, a ground voltage GND, a power supply voltage VDD, a gate output enable signal GOE, a gate shift clock GSC, and a gate. Signal lines for supplying a start pulse (GSP) and the like are included. In FIG. 2, common voltage lines 66a, 66b, 67a, and 67b of the first and second LOG signal line groups 50 and 52 of the above signal lines are included. And only the ground voltage lines 76, 77 are shown.

The first common voltage line 66a of the first signal line group 50 is formed inside the gate TCP 22 and electrically connected to the first common voltage line 66b formed in the non-display area 12. The second common voltage line 67a of the second signal line group 52 is electrically connected to the second common voltage line 67b formed in the non-display area 12.

In addition, the first and second a common voltage lines 66b and 67a may be electrically connected to a main common voltage line 64 provided in the display area 11 and connected to the pixel.

The second ground voltage line 77 of the second signal line group 52 formed in parallel with the first ground voltage line 76 of the first signal line group 50 and the display area 11 therebetween. Is electrically connected through a ground voltage extension line 78 formed at a lower end of the non-display area 12.

In addition, the first and first common voltage lines 66a and 66b and the second and second b common voltage lines 67a and 67b respectively supply a common voltage to the pixel and receive a feedback of the supplied common voltage. Compensation for voltage drop is performed by comparison. This is because the common voltage supplied to the common voltage line on the non-display area 12 has a severe voltage drop as the transmission path transmitted in the liquid crystal panel 100 increases, so that an incomplete response of the liquid crystal at the lower end of the liquid crystal panel 100 occurs. Greenish phenomenon and shut-down crosstalk, which have green light, occur, and this is the proposed structure to improve this. In other words, the first common voltage line 66b and the second common voltage line 67a for supplying the common voltage to the liquid crystal panel 10 include a main common voltage line formed at the lower end of the liquid crystal panel 10. Since the voltage drop due to the parasitic capacitance or the capacitance component and the parasitic capacitance inside the formed pixel appears in the process of being transferred to 64, the first common voltage line 66a and the second common voltage line ( The common voltage is compensated by feeding back through 67b).

The main common voltage line 64 formed on the display area 11 of the liquid crystal panel 10 is a transverse electric field type liquid crystal display device, or the main common voltage line 64 is a storage-on-common type. In the case of a liquid crystal display device which is formed of a light emitting device, a plurality of horizontal line shapes are formed to supply a common voltage to each pixel in units of horizontal pixels.

In addition, the first ground voltage line 76 of the first LOG signal line group 50 passes through the gate TCP 22 to form the second ground voltage line 77 of the second LOG signal line group 52 formed side by side. And the ground voltage extension line 78 extending from the lower non-display area 12 of the display area 11.

The gate line 24 is electrically connected to the gate driver 20 mounted on the gate TCP 22, and crosses the display area 11 in a horizontal direction to prevent the second common voltage line 67a and the antistatic circuit. 25) are connected electrically.

The data line 44 is electrically connected to the data driver 40 mounted on the data TCP 42, and the ground voltage extension line 78 and the antistatic circuit 45 cross the display area 11 in a vertical direction. It is electrically connected with.

In the liquid crystal display having such a structure, a black spot (MURA) phenomenon occurs in an image when driving at a high temperature. This phenomenon is caused by an increase in the internal resistance of the gate line 24 and the data line 44 during the high temperature driving, thereby increasing the voltage of the gate line 24 and the data line 44, wherein the data The increased voltage of the line 44 is discharged through the antistatic circuit 45 through the ground voltage extension line 78, but the increased voltage of the gate line 24 is common to the second a that does not discharge the increased voltage This is because the voltage line and the antistatic circuit 25 are interposed therebetween.

As a result, the thin film transistor T of the pixel connected to the gate line 24 having the increased voltage is turned on to generate black spots.

The present invention has been made to solve the above problems, and an object of the present invention is to provide a liquid crystal display device that prevents black spots occurring during high temperature operation of the liquid crystal display device.

In order to achieve the above object, a liquid crystal display device according to an embodiment of the present invention comprises a substrate having a display area and a non-display area around the display area; A gate line formed horizontally on the substrate; A data line formed in a direction perpendicular to the substrate; A thin film transistor electrically connected to the gate line and the data line and disposed on the display area; An antistatic circuit provided at an end of the gate line; And a ground voltage line electrically connected to the antistatic circuit.

The ground voltage line may include: a first ground voltage line formed at a left end of the substrate;

A second ground voltage line formed in parallel with the first ground voltage line with the display area therebetween; A ground voltage extension line formed at a lower end of the substrate and having both ends electrically connected to the first ground voltage line and the second ground voltage line; And an auxiliary ground voltage line formed at the right end of the substrate in parallel with the second ground voltage line and electrically connected to the ground voltage extension line.

The ground voltage extension line is electrically connected to the data line through a contact hole.

The ground voltage extension line is formed on the same material and the same layer as the data line.

It is characterized in that it comprises a gate TCP and a data TCP bonded to the left end and the upper end of the substrate, the gate driving circuit and the data driving circuit mounted therein.

The substrate may include: a first common voltage line formed at a left end of the non-display area in a vertical direction; A second common voltage line formed in a vertical direction with the first common voltage line and the display area interposed at a left end of the non-display area; A plurality of main common voltages are formed on the display area in a horizontal direction and electrically connect the first common voltage line and the second common voltage line.

The first and second common voltage lines may be formed in a double-wire structure to respectively receive and compensate a supplied signal.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3 is a block diagram illustrating a liquid crystal display according to an exemplary embodiment of the present invention, and includes a gate line 124 and a data line 144 formed to intersect on a display area 111 of the liquid crystal panel 100. The gate TCP 122 includes a gate driver 120 bonded to an outer end of the non-display area 112 of the liquid crystal panel 100, and a data TCP 142 on which a data driver 140 is mounted. .

The liquid crystal panel 100 includes a first substrate on which various signal lines and a thin film transistor T are formed, a second substrate on which a color filter is formed, and liquid crystal injected into the first and second substrates. The liquid crystal panel 100 displays an image on the display area 111 by thin film transistors T formed at intersections of the gate line 122 and the data line 142.

The first LOG signal line group 150 for supplying a control signal and a power supply voltage to the gate driver 120 in an edge region of the non-display area 112 of the first substrate positioned outside the display area 111. ) And the second LOG signal line group 152 are arranged.

The first and second LOG signal line groups 150 and 152 have a common voltage Vcom, a ground voltage GND, a power supply voltage VDD, a gate output enable signal GOE, a gate shift clock GSC, and a gate start pulse. And a signal line for supplying a (GSP) light. In FIG. 3, the common voltage line 166a, 166b, 167a, and 167b of the first and second LOG signal line groups 150 and 152 and the ground voltage line among the signal lines. 176 and 177, and only the auxiliary ground voltage line 179 is shown.

The first common voltage line 166a of the first signal line group 150 is formed inside the gate TCP 122 and electrically connected to the first common voltage line 166b formed in the non-display area 112. The second common voltage line 167a of the second signal line group 152 is electrically connected to the second common voltage line 167b formed in the non-display area 112.

In addition, the first and second a common voltage lines 166a and 167a may be electrically connected to a main common voltage line 164 provided in the display area 111 and connected to the pixel.

The second ground voltage line 177 of the second signal line group 152 formed in parallel with the first ground voltage line 176 of the first signal line group 150 and the display area 111 therebetween. Is electrically connected through a ground voltage extension line 178 formed at a lower end of the non-display area 112.

In addition, the non-display area 112 is formed in parallel with the second ground voltage line 177 of the second signal line group 152 and has the second and second common voltage lines 167a and 167b therebetween. An auxiliary ground voltage line 179 is formed at the ground voltage extension line 178 and the P1 node P1.

In addition, the first and first common voltage lines 166a and 166b and the second and second b common voltage lines 167a and 167b respectively supply a common voltage to the pixel and receive a feedback of the supplied common voltage. Compensation for voltage drop is performed by comparison. That is, the first common voltage line 166b and the second common voltage line 167a which supply the common voltage to the liquid crystal panel 100 are connected to the main common voltage line 164 formed at the lower end of the liquid crystal panel 100. The voltage drop caused by the feedback is fed back through the first common line 166a and the second common line 167b to compensate for the common voltage.

The main common voltage line 164 formed on the display area 111 of the liquid crystal panel 100 includes a plurality of common voltage lines for supplying a common voltage to each pixel in units of horizontal pixels in the case of a horizontal field type liquid crystal display device. It consists of a horizontal line shape.

In addition, the first ground voltage line 176 of the first LOG signal line group 150 passes through the gate TCP 122, and the second ground voltage line 177 of the second LOG signal line group 152 formed side by side. ) And a ground voltage extension line 178 extending from the lower non-display area 112 of the display area 111.

The gate line 124 is electrically connected to the gate driver 120 mounted on the gate TCP 122. The auxiliary ground voltage line 179 and the antistatic circuit 125 cross the display area 111 in a horizontal direction. Are electrically connected from the P2 node (P2).

The data line 144 is electrically connected to the data driver 140 mounted on the data TCP 142, and crosses the display area 111 in the vertical direction to the ground voltage extension line 178 and the antistatic circuit 145. It is electrically connected with.

In the liquid crystal display according to the exemplary embodiment of the present invention described above, the internal resistance of the gate line 124 and the data line 144 is increased during high temperature driving, so that the gate line 124 and the data line 144 When the voltage is increased, the increased voltage of the data line 144 is discharged through the antistatic circuit 145 through the ground voltage extension line 178, and the increased voltage of the gate line 124 is also the antistatic circuit. Discharges through the auxiliary ground voltage line 179 via 125.

FIG. 4 is a schematic enlarged view of a portion A of the liquid crystal display shown in FIG. 3. Referring to FIG. 4, the auxiliary ground voltage line 179 is a main portion of the non-display area 112 of the liquid crystal panel 100. The liquid crystal panel is formed in parallel with the second and second b common voltage lines 167a and 167b electrically connected to the common voltage line 164, and electrically connected to the gate line 125 and the P2 node P2. (100) The ground voltage extension line 178 formed at the lower end of the non-display area 112 and the P1 node P1 are electrically connected.

Here, the auxiliary ground voltage line 179 is formed on the same layer as the data line (not shown), and thus, the gate line 125 and the ground voltage extension line 178 formed on another layer are different from each other. In order to be connected, the P1 node P1 and the P2 node P2 are electrically connected through a contact hole.

When the ground voltage extension line 178 is formed on the same layer as the data line DL, the contact hole of the P1 node P1 for electrical connection with the auxiliary ground voltage line 179 may be omitted. Can be.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention as defined in the appended claims. It can be understood that

In the transverse electric field type liquid crystal display device according to the present invention described above, the voltage according to the resistance component of the gate line that increases during high temperature driving is discharged through the auxiliary ground voltage line, thereby preventing malfunction of the thin film transistor, thereby driving stably. do.

Therefore, black spots generated during high temperature operation of the liquid crystal display device can be prevented, thereby realizing high quality images.

Claims (7)

A substrate having a display area and a non-display area around the display area; A gate line formed horizontally on the substrate; A data line formed in a direction perpendicular to the substrate; A thin film transistor electrically connected to the gate line and the data line and disposed on the display area; An antistatic circuit provided at an end of the gate line; A ground voltage line electrically connected to the antistatic circuit; The ground voltage line may include a first ground voltage line formed at a left end of the substrate, a second ground voltage line formed parallel to the first ground voltage line with the display area therebetween, and a lower side of the substrate. A ground voltage extension line formed at a stage and electrically connected to the first ground voltage line and the second ground voltage line, and formed at the right end of the substrate in parallel with the second ground voltage line; And an auxiliary ground voltage line electrically connected to the ground voltage extension line. delete The method according to claim 1, And the ground voltage extension line is electrically connected to the data line through a contact hole. The method according to claim 1, And the ground voltage extension line is formed on the same material and the same layer as the data line. The method according to claim 1, And a gate TCP and a data TCP bonded to the left and upper ends of the substrate and having a gate driving circuit and a data driving circuit mounted therein. The method according to claim 1, Wherein: A first common voltage line formed at a left end of the non-display area in a vertical direction; A second common voltage line formed in a vertical direction with the first common voltage line and the display area interposed at a left end of the non-display area; A plurality of main common voltages formed in the horizontal direction on the display area and electrically connecting the first common voltage line and the second common voltage line; A liquid crystal display device, characterized in that formed. The method according to claim 6, And the first and second common voltage lines are each formed in a double wire structure to receive and compensate a feedback signal.

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