KR101213837B1 - Organic Electro Luminescence Device And Driving Method Thereof - Google Patents

Abstract

The present invention relates to an organic electroluminescent display device and a driving method thereof, which can improve display quality by preventing image degradation.

The present invention provides an organic light emitting display device in which cell driving circuit portions for driving an organic light emitting cell are arranged in a matrix form, the cell driving circuit portion comprising: a first capacitor connected between a first node and a second node; A second capacitor connected between any one of the first node and the second node and a low potential voltage source; A first switch element forming a current path between the data line and the first node in response to a first logic value of the first signal supplied from the first scan line during the first to fourth periods; A second switch element forming a current path between the second node and a third node in response to a first logic value of a second signal supplied from a second scan line during a second period of time; A third switch element forming a current path between the organic light emitting cell and the third node in response to a second logic value of the second signal during a third period of time; And a fourth switch element forming a current path between the third node and the low potential voltage source in response to the voltage on the second node during the fourth period.

Description

Organic Electroluminescent Display and Driving Method Thereof {Organic Electro Luminescence Device And Driving Method Thereof}

1 is a view schematically showing one organic light emitting cell.

2 is a view schematically showing a conventional organic light emitting display device.

3 is a view showing a pixel cell driving circuit having the P-type driving switch element shown in FIG.

4 is a diagram illustrating line resistance in vertical and horizontal directions in a conventional organic electroluminescent display.

FIG. 5 is a diagram showing variation of driving voltage due to line resistance in an organic electroluminescent display device having a P-type driving switch element. FIG.

6 is a view showing a pixel cell driving circuit having an n-type driving switch element;

FIG. 7 is a diagram showing variation in driving voltage due to line resistance in an organic electroluminescent display having an n-type driving switch element. FIG.

8 is a diagram schematically illustrating an organic light emitting display device according to an embodiment of the present invention.

9 is a diagram showing a pixel cell driving circuit having an n-type driving switch element according to a first embodiment of the present invention;

10 is a waveform diagram for driving a pixel cell driving circuit in FIG. 9; FIG.

FIG. 11 is a diagram illustrating a current path formed in a driving circuit in period A of FIG. 10.

FIG. 12 is a diagram illustrating a current path formed in period B of FIG. 10.

FIG. 13 is a diagram illustrating a current path formed in period D of FIG. 10.

14 and 15 are experimental data showing the relationship between the drive current and the threshold voltage, the drive current and the low potential voltage source of the organic light emitting cell in the first embodiment of the present invention.

Fig. 16 is a view showing a pixel cell driving circuit having an n-type driving switch element according to the second embodiment of the present invention.

FIG. 17 is a view showing a current path formed in a driving circuit in period A of FIG.

FIG. 18 is a diagram illustrating a current path formed in period B of FIG. 10.

FIG. 19 is a diagram illustrating a current path formed in period D of FIG. 10.

20 is a diagram showing a pixel cell driving circuit having a p-type driving switch element according to a third embodiment of the present invention;

21 is a waveform diagram for driving a pixel cell driving circuit in FIG. 20;

Fig. 22 is a view showing a pixel cell driving circuit having a p-type driving switch element according to a fourth embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

2: cathode 4: electron injection layer

6: electron transport layer 8: light emitting layer

10 hole transport layer 12 hole injection layer

14: anode 128: timing controller

118: first scan driver 119: second scan driver

20,120: Data driver 16,116: Display panel

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an organic electroluminescent display, and more particularly, to an organic electroluminescent display and a method of driving the same, which can improve display quality by preventing image degradation.

2. Description of the Related Art Recently, various flat panel display devices capable of reducing weight and volume, which are disadvantages of cathode ray tubes (CRTs), have been developed. Such flat panel displays include a liquid crystal display, a field emission display, a plasma display panel, and an electro-luminescence (hereinafter, referred to as "EL"). Display).

Here, the EL display device is a self-luminous device that emits a fluorescent material by recombination of electrons and holes, and is roughly divided into inorganic EL and organic EL according to materials and structures. This EL display device has the advantage of having a fast response speed, such as a cathode ray tube, compared to a passive light emitting device that requires a separate light source like a liquid crystal display device.

FIG. 1 is a cross-sectional view illustrating an organic light emitting cell OLED for explaining a light emission principle of an organic EL display device. The organic light emitting cell OLED includes an electron injection layer 4, an electron transport layer 6, an emission layer 8, a hole transport layer 10, and a hole injection layer 12 stacked between the cathode 2 and the anode 14. It is provided.

When a voltage is applied between the anode 14, which is a transparent electrode, and the cathode 2, which is a metal electrode, electrons generated from the cathode 2 are directed toward the light emitting layer 8 through the electron injection layer 4 and the electron transport layer 6. Move. In addition, holes generated from the anode 14 move toward the light emitting layer 8 through the hole injection layer 12 and the hole transport layer 10. Accordingly, in the light emitting layer 8, light is generated by collision between electrons and holes supplied from the electron transport layer 6 and the hole transport layer 10 and recombination, and the light is externally transmitted through the anode 14 which is a transparent electrode. Is emitted so that the image is displayed.

In the related art organic EL display device using the organic light emitting cell OLED, pixel cells are arranged in regions defined by intersections of the scan lines SL1 to SLn and the data lines DL1 to DLm, as shown in FIG. 2. EL display panel 16 including the fields PE, a scan driver 18 for driving the scan lines SL1 to SLn, and a data driver 20 for driving the data lines DL1 to DLm. And a timing controller 28 for controlling the drive timing of each of the data driver 20 and the scan driver 18.

3 is a diagram illustrating a pixel cell PE having a conventional P-type driving TFT DT.

The pixel cells PE having the P-type driving TFT DT shown in FIG. 3 are a high potential voltage source VDD and an organic light emitting cell OLED connected between a supply voltage source VDD and a low potential voltage source VSS. And a cell driving circuit 30 for driving the organic light emitting cell OLED according to a driving signal supplied from each of the data line DL and the scan line SL.

The cell driving circuit 30 is connected to the driving transistor TFT DT connected between the supply voltage source VDD and the organic light emitting cell OLED, the scan line SL data line DL, and the driving TFT DT. A connected switching TFT SW and a storage capacitor Cst connected between the first node N1 and the high potential voltage source VDD between the driving TFT DT and the switching TFT SW are provided.

The gate terminal of the driving TFT DT is connected to the drain terminal of the switching TFT SW, the source terminal is connected to the high potential voltage source VDD, and the drain terminal is connected to the organic light emitting cell OLED. The gate terminal of the switching TFT SW is connected to the scan line SL, the source terminal is connected to the data line DL, and the drain terminal is connected to the gate terminal of the driving TFT DT.

The timing controller 28 supplies a data control signal for controlling the data driver 20 and a scan control signal for controlling the scan driver 18 by using synchronization signals supplied from an external system (for example, a graphics card). Create In addition, the timing controller 28 supplies a data signal supplied from an external system to the data driver 20.

The scan driver 18 generates a scan pulse SP in response to a scan control signal from the timing controller 28, and supplies the scan pulse SP to the scan lines SL1 to SLn to scan lines SL1. To SLn) are sequentially driven.

The data driver 20 supplies the data voltages to the data lines DL1 to DLm every horizontal period 1H in accordance with the data control signal from the timing controller 28. In this case, the data driver 20 has DLm output channels 21 that are matched one-to-one with the data lines DL1 through DLm.

Each of the pixel cells PE of the general EL display device is turned on when the scan pulse SP having a low state is input from the scan driver 18 to the scan line SL. do. When the switching TFT SW is turned on, the data voltage supplied from the data driver 20 to the data line DL is passed through the switching TFT SW so as to be synchronized with the scan pulse SP supplied to the scan line SL. Is supplied to the first node N1. The data voltage supplied to the first node N1 is stored in the storage capacitor Cst. The storage capacitor Cst stores the data voltage from the data line DL during the supply time of the scan pulse SP supplied to the scan line SL. The storage capacitor Cst holds the stored data voltage for one frame. That is, when the scan pulse SP supplied to the scan line SL is turned off, the storage capacitor Cst turns on the driving TFT DT by supplying the stored data voltage to the driving TFT DT. Accordingly, the organic light emitting cell OLED is turned on by the voltage difference between the high potential voltage source VDD and the low potential voltage source VSS, and the amount of current supplied from the high potential voltage source VDD via the driving TFT DT. The light is emitted in proportion to.

In the conventional organic EL display device having such a structure, the threshold voltage (Vth) between the TFTs in the panel becomes uneven due to the unstable output power of the laser during the polysilicon crystallization process of the polysilicon TFT. Characteristics become uneven. Although the same data voltage is supplied due to the nonuniformity of the device, there is a problem in that the image quality becomes nonuniform due to the change of the output current of the driving TFT DT.

In addition, in the conventional organic EL display device, the line resistance increases as the distance from the high potential voltage source VDD increases, thereby causing variations in the supply voltages supplied according to the position of each pixel. This will be described in more detail with reference to FIG. 4 as follows.

In general, the amount of output current (or " drive current I_OLED " of the organic light emitting cell OLED) of the organic light emitting cell OLED controlled by the driving TFT DT is expressed by Equation 1 below.

I_OLED = (1/2) × K (Vgs-Vth) ²

= (1/2) × K (Vdata-VDD-Vth) ² ------- (P-type)

= (1/2) × K (Vdata-VSS-Vth) ² ------- (N-type)

Where I_OLED is the drive current, VDD is the high potential voltage from the high potential voltage source, Vth is the threshold voltage of the driving TFT, and Vgs is the gate-source voltage of the driving TFT.

However, as the high potential voltage VDD in Equation 1 moves away from the high potential voltage source, its magnitude decreases due to the horizontal and vertical line resistances Rh and Rv. That is, the farther away from the supply voltage source, the current / resistance drop phenomenon occurs due to the line resistances Rh and Rv. In particular, when the screen is gradually enlarged, the size of the line resistances Rh and Rv becomes larger, thereby increasing the supply voltage deviation between the pixel cells PE. That is, as shown in FIG. 5, the high potential voltage supplied between each pixel cell PE becomes smaller as it moves away from the high potential voltage source. (VDD ^1th > VDD ^2th > VDD ^3th >.....> VDD ^nth )

For this reason, the current flowing through the nth organic light emitting cell OLED is represented by Equation 2 below.

I_OLED _nth = (1/2) × K (Vgs-Vth) ²

= (1/2) × K (Vdata-(VDD _{(n-1 th )} -R × (∑ (I_OLED-(I_OLED ₁₎ + I_OLED ₂ + I_OLED ₃ + _....... + I_OLED _{(n-1 th )} )} -Vth] ² (where ΣI_OLED represents the sum of the currents flowing in one line)

Accordingly, the driving current I_OLED of the organic light emitting cell OLED becomes smaller as the data voltage of the same magnitude is applied away from the high potential voltage VDD.

This problem of decreasing the driving current I_OLED of the organic light emitting cell OLED is equally applied to the pixel cell using the n-type TFT.

6 is a circuit diagram illustrating in detail a pixel cell PE using an n-type driving TFT, and FIG. 7 is a circuit diagram illustrating a state in which the pixel cells PE of FIG. 6 are connected in parallel.

In the pixel cell PE using the n-type driving TFT DT shown in FIGS. 6 and 7, an organic light emitting cell OLED is connected between the supply voltage source VDD and the driving TFT DT. Here, in the n-type pixel cell PE, the line resistance with respect to the supply voltage source VDD causes a variation in the drain / source voltage Vds of the driving TFT DT, but as shown in Equation 2, the saturation of the TFT is performed. Without affecting the saturation current, the line resistance (R) for the low potential voltage source (VSS) directly affects the saturation current by changing the gate / source voltage (Vgs).

That is, as the value of the low potential voltage source VSS supplied to each of the n-type pixel cells PE moves away from the low potential voltage source VSS in FIG. 7, the low potential voltage increases. In other words, the low potential voltage supplied between each pixel cell PE becomes smaller as it moves away from the low potential supply source (VSS ^1th <VSS ^2th). <VSS ^3th <..... <VSS ^nth ) Accordingly, the n th driving current I_OLED _nth may be expressed as in Equation 3 below.

I_OLED _nth = (1/2) × K (Vgs-Vth) ²

= (1/2) × K [Vdata-(VSS _{(n-1 th )} + R × (∑I_OLED-(I_OLED ₁ + I_OLED ₂ + I_OLED ₃ + _....... + I_OLED _{(n-1 th )} )} -Vth] ² (where ΣI_OLED represents the sum of the currents flowing in one line)

As described above, as the threshold voltage Vth and the driving current I_OLED of the driving TFT DT of each pixel cell PE become non-uniform, the image quality becomes non-uniform, thereby degrading display quality. Is generated.

Accordingly, an object of the present invention is to provide an organic electroluminescent display device and a driving method thereof which can improve display quality by preventing image degradation.

In order to achieve the above object, the present invention provides an organic light emitting display device in which a cell driving circuit portion for driving an organic light emitting cell is arranged in a matrix form, wherein the cell driving circuit portion is connected between a first node and a second node. A first capacitor; A second capacitor connected between any one of the first node and the second node and a low potential voltage source; A first switch element forming a current path between the data line and the first node in response to a first logic value of the first signal supplied from the first scan line during the first to fourth periods; A second switch element forming a current path between the second node and a third node in response to a first logic value of a second signal supplied from a second scan line during a second period of time; A third switch element forming a current path between the organic light emitting cell and the third node in response to a second logic value of the second signal during a third period of time; And a fourth switch element forming a current path between the third node and the low potential voltage source in response to the voltage on the second node during the fourth period.

The second signal is switched from a second logic value to a first logic value after the first period, and from the first logic value to the second logic value after the second period; The first signal is characterized by maintaining a first logic value for the first to fourth periods.

The data line may supply a reference voltage to the first switch during the first to third periods, and supply a data voltage during the fourth period.

The current flowing through the organic light emitting cell is controlled by the reference voltage and the data voltage.

A high potential power supply unit supplying high potential power to the organic light emitting cell; A low potential power supply unit supplying low potential power to the cell driving circuit unit; A first scan driver supplying a first signal to the first scan line; A second scan driver supplying a second signal to the second scan line; And a data driver for supplying a reference voltage to the data line during the first to third periods and then supplying a data voltage during the fourth period.

The first switch, the second switch, and the fourth switch may be formed of an n-type transistor, and the third switch may be formed of a p-type transistor.

The present invention provides an organic light emitting display device in which cell driving circuit portions for driving an organic light emitting cell are arranged in a matrix form, the cell driving circuit portion comprising: a first capacitor connected between a first node and a second node; A second capacitor connected between any one of the first node and the second node and a high potential voltage source; A first switch element forming a current path between the data line and the first node in response to a first logic value of the first signal supplied from the first scan line during the first to fourth periods; A second switch element forming a current path between the second node and a third node in response to a first logic value of a second signal supplied from a second scan line during a second period of time; A third switch element forming a current path between the organic light emitting cell and the third node in response to a second logic value of the second signal during a third period of time; And a fourth switch element forming a current path between the third node and the high potential voltage source in response to the voltage on the second node during the fourth period.

The second signal is switched from a second logic value to a first logic value after the first period, and from the first logic value to the second logic value after the second period; The first signal is characterized by maintaining a first logic value for the first to fourth periods.

The first switch, the second switch and the fourth switch is formed of a p-type transistor,

And the third switch is formed of an n-type transistor.

The present invention provides a method of driving an organic light emitting display device, in which a cell driving circuit unit for driving an organic light emitting cell is arranged in a matrix form, the first switch responding to a first logic value of a first signal during a first period. Forming a current path between the data line and the first node; Forming a current path between the second node and the third node by a second switch responsive to a first logic value of the second signal during a second period of time; Forming a current path between the organic light emitting cell and the third node in response to a second logic value of the second signal during a third period of time; And forming a current path between the third node and the low potential voltage source by a fourth switch responsive to a voltage on the second node for a fourth period of time.

In the second period and the third period, the current path is maintained between the data line and the first node by the first switch.

Supplying a reference voltage to the first switch during the first to third periods; The data voltage is supplied to the first switch during the fourth period.

The current flowing through the organic light emitting cell is controlled by the reference voltage and the data voltage.

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 8 to 22.

8 is a schematic view of an organic EL display device according to a first embodiment of the present invention.

In the organic EL display illustrated in FIG. 8, the pixel cells PE are arranged at respective regions defined by the intersections of the first and second scan lines 1SL1 to 1SLn and 2SL1 to 2SLn and the data lines DL1 to DLm. An EL display panel 116 including a light emitting diode, a first scan driver 118 for driving the first scan lines 1SL1 to 1SLn, and a second for driving the second scan lines 2SL1 to 2SLn. The data driver 120 for driving the scan driver 119 and the data lines DL1 to DLm, and the timing controller 128 for controlling the driving timing of each of the data driver 120 and the scan driver 118 are provided. Equipped.

The timing controller 128 controls the data control signal for controlling the data driver 120 and the first and second scan drivers 118 and 119 using the synchronization signals supplied from an external system (eg, a graphics card). Generate scan control signals for the device. In addition, the timing controller 128 supplies a data signal supplied from an external system to the data driver 120.

The first scan driver 118 generates the first scan pulse 1SP in response to the first scan control signal from the timing controller 128, and generates the first scan pulse 1SP from the first scan lines 1SL1 to 1. 1SLn) to sequentially drive the first scan lines 1SL1 to 1SLn.

The second scan driver 119 generates a second scan pulse 2SP in response to the second scan control signal from the timing controller 128, and generates the second scan pulse 2SP from the second scan lines 2SL1 to 2SL. 2SLn) to sequentially drive the second scan lines 2SL1 to 2SLn.

The data driver 120 supplies the data voltages to the data lines DL1 to DLm every horizontal period 1H according to the data control signal from the timing controller 128. In this case, the data driver 120 has DLm output channels 121 that are matched one-to-one with the data lines DL1 through DLm.

FIG. 9 is a circuit diagram illustrating in detail a pixel cell PE using the n-type driving TFT DT of FIG. 8.

The pixel cells PE illustrated in FIG. 9 are selected from among the first capacitor C1, the first node N1, and the second node N2 connected between the first node N1 and the second node N2. A second capacitor C2 connected between any one of the low potential voltage sources VSS and a data line in response to a first logic value of the first signal supplied from the first scan line 1SL during the first to fourth periods; Responding to the first logic value of the first switch element T1 forming a current path between the DL and the first node N1 and the second signal supplied from the second scan line 2SL for a second period of time. The second switch element T2 forming a current path between the second node N2 and the third node N3, and in response to the second logic value of the second signal during the third period, the organic light emitting cell The third switch element T3 forming a current path between the OLED and the third node N3, and the third node N3 and the low potential voltage source in response to the voltage on the two nodes N2 during the fourth period. VSS) And a driving switch element (DT) for forming a current path.

The structure and driving method of the pixel cells PE according to the first embodiment of the present invention having the structure will be described in detail below.

The pixel cells PE include a high potential voltage source VDD, an organic light emitting cell OLED connected between a high potential voltage source VDD and a low potential voltage source VSS, and an organic light emitting cell OLED and a low potential voltage source. A driving switch element DT connected between the VSS, a second switch element T2 connected between the driving switch element DT and the organic light emitting cell OLED, and supplied with a second scan signal scan2; A second scan signal scan2 is connected between the third node N3 and the gate terminal of the driving switch element DT between the source terminal of the third switch element T3 and the drain terminal of the driving switch element DT. The first switch element T1 to be supplied, the first switch element T1 connected to the data line DL and supplied with the data signal Vdata, the gate terminal of the driving switch element DT, and the first switch element ( Low potential and first node N1 between the first capacitor C1, the first capacitor C1, and the drain terminal of the first switch element T1 connected between the drain terminals of T1. A second capacitor C2 is connected between the voltage sources VSS.

Here, an N-type transistor (TFT) is used as the driving switch element, and a P-type TFT is used as the first to third switch elements.

The driving of the pixel cell PE of the organic EL display device according to the first exemplary embodiment having the above structure will be described in detail with reference to the driving waveform shown in FIG. 10.

First, in the period A, the first scan signal scan1 having a high level is supplied to the first switch element T1, and the second scan signal scan2 having a low level is supplied to the third and second switch elements T3 and T2. Is supplied. Accordingly, as shown in FIG. 11, the third switch element T3 and the first switch element T1 are turned on and the second switch element T2 is turned off so that the data line DL and the first node N1 are turned off. A current I path is formed between the first and second nodes, and the reference voltage Vref is supplied to the first node N1. Accordingly, the first node N1 is initialized to a sufficiently low voltage.

In the period B, a second scan signal scan2 of high level is supplied to the third switch element T3 and the second switch element T2 so that the second switch element T2 is turned on and the third switch element T3 is turned on. It is turned off and the first switch element T1 is kept turned on. Accordingly, as shown in FIG. 12, the sum of the low potential voltage VSS and the moon turn voltage Vth of the driving switch element DT is stored at the third node N3 (Vss + Vth), and the first capacitor The voltage VC1 stored in the C1 becomes the difference Vss + Vth-Vref between the voltage of the third node N3 and the reference voltage, and the voltage VC2 stored in the second capacitor C2 is the reference voltage Vref. The difference between the low potential voltage Vss (Vref-Vss) becomes. This is shown in equations (4) and (5).

VC1 = (Vss + Vth)-Vref

VC2 = Vref-Vss

In the C period, the low level second scan signal scan2 is supplied to the third switch element T3 and the second switch element T2 so that the second switch element T2 is turned off and the third switch element T3 is turned off. Is turned on, and the first switch element T1 is turned on.

Subsequently, in the D period, the data voltage Vdata is supplied so that the driving current I_OLED passing through the organic light emitting cell OLED, the third switch element T3 and the driving switch element DT as shown in FIG. Will flow. (Vref <Vdata)

Here, the voltage of the second node N2, that is, the gate voltage Vg of the driving TFT DT may be expressed as in Equation 6 by using Equations 1 to 5 below.

Vg = VC1 + VC2 + Vss

   = (Vss + Vth)-Vref + (Vdata-Vss) + Vss

   = Vss + Vth-Vref + Vdata

Therefore, the gate-source voltage Vgs of the driving switch element DT may be expressed as shown in Equation (7).

Vgs = Vth-Vref + Vdata

Substituting Equation 7 into Equation 1, the driving current I_OLED follows Equation 8.

I_OLED = (1/2) × K (Vdata-Vref) ²

It can be seen from Equation 8 that the driving current I_OLED for driving the organic light emitting cell OLED is independent of the threshold voltage Vth and the low potential voltage VSS of the driving switch element DT.

That is, the driving current I_OLED supplied to the organic light emitting cell OLED by the circuit configuration of the pixel cell PE of the present invention is applied to the threshold voltage Vth and the low potential voltage VSS of the driving switch element DT. Regardless, it is determined by the difference between the data voltage Vdata and the reference voltage Vref. Therefore, the image quality irregularity can be overcome regardless of the change in the threshold voltage Vth and the low potential voltage VSS. As a result, the display quality can be improved.

This effect can be confirmed by the experimental data shown in FIGS. 14 and 15.

FIG. 14 is experimental data showing the magnitude of the driving current I_OLED with the threshold voltage Vth of the driving switch element DT of the red pixel set to 1.0V, 1.5V, and 2.0V, respectively. . As can be seen from FIG. 13, a very small error of ± 2.2% is shown based on the threshold voltage Vth 1.5V and the driving current 1.2 전류.

FIG. 15 is experimental data showing the magnitude of the drive current Vth with the magnitude of the low potential voltage VSS set to 0.0V, 0.5V, and 1.0V, respectively. As can be seen in FIG. 15, a very small error of ± 0.8% is shown based on the low potential voltage VSS of 0.5V and the driving current I_OLED of 1.2 mA.

As described above, the organic light emitting display device and the driving method thereof according to the present invention provide a constant driving current I_OLED to the light emitting cell regardless of the variation of the threshold voltage Vth and the low potential voltage VSS of the driving switch element of the pixel cell. I can supply it. As a result, display quality is improved by improving problems such as unevenness of image quality.

16 is a circuit diagram illustrating a pixel cell PE of an organic light emitting display device according to a second embodiment of the present invention.

In the pixel cell PE shown in FIG. 15, the second capacitor C2 is disposed between the first capacitor C1 and the driving switch element DT in comparison with the pixel cells PE shown in FIGS. 8 and 9. Except that connected between the node (N2) and the low potential voltage source (VSS) has the same structure, the same reference numerals are given to the same configuration as in Figs. 8 and 9 and detailed description thereof will be omitted.

The driving waveform supplied to the pixel cell in the second embodiment of the present invention having such a configuration is the same as in FIG.

First, in the period A, the first scan signal scan1 having a high level is supplied to the first switch element T1, and the second scan signal scan2 having a low level is supplied to the third and second switch elements T3 and T2. Is supplied. Accordingly, the third switch element T3 and the first switch element T3 are turned on and the second switch element T2 is turned off so that the data line DL and the first node N1 are shown in FIG. 17. A current path is formed between the first and second nodes, and the reference voltage Vref is supplied to the first node N1. Accordingly, the first node N1 is initialized to a sufficiently low voltage.

In the period B, a second scan signal scan2 of high level is supplied to the third switch element T3 and the second switch element T2 so that the second switch element T2 is turned on and the third switch element T3 is turned on. It is turned off and the first switch element T1 is kept turned on. Accordingly, as shown in FIG. 18, the sum of the low potential voltage VSS and the threshold voltage Vth of the driving switch element DT is stored at the third node N3 (Vss + Vth), and the first capacitor The voltage VC1 stored in C1 becomes the difference Vss + Vth-Vref between the voltage of the third node N3 and the reference voltage, and the voltage VC2 stored in the second capacitor C2 is the threshold voltage Vth. Becomes the same as This is shown in Equations 9 and 10.

VC1 = (Vss + Vth)-Vref

VC2 = Vth

In the C period, the low level second scan signal scan2 is supplied to the third switch element T3 and the second switch element T2 so that the second switch element T2 is turned off and the third switch element T3 is turned off. Is turned on, and the first switch element T1 is turned on.

Subsequently, in the D period, the data voltage Vdata is supplied so that the driving current I_OLED passing through the organic light emitting cell OLED, the third switch element T3 and the driving switch element DT as shown in FIG. Will flow. (Vref <Vdata)

Here, the voltage of the second node N2, that is, the gate voltage Vg of the driving switch element DT may be expressed as shown in Equation (11).

Vg = {C1 / (C1 + C2)} × (Vdata-Vref) + (Vss + Vth)

Therefore, the gate-source voltage Vgs of the driving switch element DT may be expressed by Equation 12.

Vgs = {C1 / (C1 + C2)} × (Vdata-Vref) + (Vss + Vth)-Vss

Substituting Equation 12 into Equation 1, the driving current I_OLED follows Equation 13.

I_OLED = (1/2) × K × {C1 / (C1 + C2)} × (Vdata-Vref) ²

According to Equation 13, in the second embodiment of the present invention, the driving current I_OLED for driving the organic light emitting cell OLED is independent of the threshold voltage Vth and the low potential voltage VSS of the driving TFT DT. It can be seen that.

Therefore, the image quality irregularity can be overcome regardless of the change in the threshold voltage Vth and the low potential voltage VSS. As a result, the display quality can be improved.

20 is a circuit diagram illustrating in detail a pixel cell PE using a P-type driving switch element DT.

20 has a circuit configuration symmetrical with the structure of the pixel cell PE in the first embodiment of the present invention. That is, the driving switch element DT, the second switch element T2, and the first switch element T3 are formed of a P-type, and the third switch element T3 is of an n-type. Is formed. Therefore, the driving waveform supplied to the pixel cell PE in the third embodiment is also supplied with a waveform symmetrical with the waveform in FIG. 10 as shown in FIG.

Since the pixel cell PE is driven in the same manner as described in the first embodiment of the present invention, a detailed description thereof will be omitted.

The same conclusion as that of the old coin I_OLED for driving the organic light emitting cell OLED in the third embodiment of the present invention is the same as the result of Equation 8 in the first embodiment of the present invention.

That is, the driving current I_OLED supplied to the organic light emitting cell OLED by the circuit configuration of the pixel cell PE of the present invention is applied to the threshold voltage Vth and the low potential voltage VSS of the driving switch element DT. Regardless, it is determined by the difference between the data voltage Vdata and the reference voltage Vref. Therefore, the image quality irregularity can be overcome regardless of the change in the threshold voltage Vth and the low potential voltage VSS. As a result, the display quality can be improved.

FIG. 22 is a pixel cell according to the fourth embodiment of the present invention using a P-type driving switch element DT, and has a circuit configuration symmetrical with the structure of the pixel cell in the second embodiment of the present invention. . That is, the driving switch element DT, the second switch element T2, and the first switch element T1 are formed of a P-type, and the third switch element T3 is of an n-type. Is formed. The driving current I_OLED for driving the organic light emitting cell OLED of the pixel cell having the configuration follows Equation 13 in the second embodiment of the present invention.

The organic light emitting display device according to the third and fourth embodiments of the present invention using the P-type driving switch element DT is related to the change of the threshold voltage Vth and the high potential voltage VDD. It can overcome the image quality unevenness without. As a result, the display quality can be improved.

As described above, the organic electroluminescent display and its driving method according to the present invention according to the embodiment of the present invention is organic regardless of the variation of the threshold voltage, supply voltage and low potential voltage of the driving transistor of the pixel cell. It is possible to supply a constant driving current to the light emitting cell. As a result, display quality is improved by improving problems such as unevenness of image quality.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

Claims (16)

In an organic light emitting display device in which cell driving circuit portions for driving an organic light emitting cell are arranged in a matrix form, The cell driving circuit unit A first capacitor connected between the first node and the second node; A second capacitor connected between any one of the first node and the second node and a low potential voltage source; A first switch element forming a current path between the data line and the first node in response to a first logic value of the first signal supplied from the first scan line during the first to fourth periods; A second switch element forming a current path between the second node and a third node in response to a first logic value of a second signal supplied from a second scan line during a second period of time; A third switch element forming a current path between the organic light emitting cell and the third node in response to a second logic value of the second signal during a third period of time; And a fourth switch element forming a current path between the third node and the low potential voltage source in response to a voltage on the second node during a fourth period. The method of claim 1, The second signal is Switching from a second logic value to a first logic value after the first period, and switching from the first logic value to the second logic value after the second period; The first signal is And a first logic value for the first to fourth periods. The method of claim 2, The data line is Supply a reference voltage to the first switch during the first to third periods, And a data voltage for the fourth period. The method of claim 3, wherein The current flowing through the organic light emitting cell is And an organic light emitting display device controlled by the reference voltage and the data voltage. The method of claim 1, A high potential power supply unit supplying high potential power to the organic light emitting cell; A low potential power supply unit supplying low potential power to the cell driving circuit unit; A first scan driver supplying a first signal to the first scan line; A second scan driver supplying a second signal to the second scan line; And a data driver for supplying a reference voltage to the data line for the first to third periods and then for supplying a data voltage for the fourth period. The method of claim 1, The first switch, the second switch and the fourth switch is formed of an n-type transistor, And the third switch is a p-type transistor. In an organic light emitting display device in which cell driving circuit portions for driving an organic light emitting cell are arranged in a matrix form, The cell driving circuit unit A first capacitor connected between the first node and the second node; A second capacitor connected between any one of the first node and the second node and a high potential voltage source; A first switch element forming a current path between the data line and the first node in response to a first logical value of the first signal supplied from the first scan line during the first to fourth periods; A second switch element forming a current path between the second node and a third node in response to a first logic value of a second signal supplied from a second scan line during a second period of time; A third switch element forming a current path between the organic light emitting cell and the third node in response to a second logic value of the second signal during a third period of time; And a fourth switch element for forming a current path between the third node and the high potential voltage source in response to a voltage on the second node during a fourth period of time. The method of claim 7, wherein The second signal is Switching from a second logic value to a first logic value after the first period, and switching from the first logic value to the second logic value after the second period; The first signal is And a first logic value for the first to fourth periods. 9. The method of claim 8, The data line is Supply a reference voltage to the first switch during the first to third periods, And a data voltage for the fourth period. The method of claim 9, The current flowing through the organic light emitting cell is And an organic light emitting display device controlled by the reference voltage and the data voltage. The method of claim 7, wherein A low potential power supply unit for supplying low potential power to the organic light emitting cell; A high potential power supply unit supplying a high potential power to the cell driving circuit unit; A first scan driver supplying a first signal to the first scan line; A second scan driver supplying a second signal to the second scan line; And a data driver for supplying a reference voltage to the data line for the first to third periods and then for supplying a data voltage for the fourth period. The method of claim 7, wherein The first switch, the second switch and the fourth switch is formed of a p-type transistor, And the third switch is formed of an n-type transistor. A first capacitor connected between the first and second nodes to drive the organic light emitting cell, and a second capacitor connected between any one of the first and second nodes and either a high potential or low potential voltage source A first switch element forming a current path between the data line and the first node in response to a first logic value of the first signal supplied from the first scan line during the first period, and a second during the second period; A second switch element forming a current path between the second node and the third node in response to a first logic value of the second signal supplied from the scan line, and a second logic value of the second signal for a third period of time; A third switch element forming a current path between the organic light emitting cell and the third node in response to the current; and a current between the third node and the low potential voltage source in response to a voltage on the second node during a fourth period of time. Forming a pass Is a method for driving a cell driving circuit is the organic light emitting display devices arranged in a matrix having a fourth switching element, Forming a current path between a data line and the first node by the first switch element responsive to a first logic value of the first signal during the first period; Forming a current path between the second node and a third node by the second switch element responsive to a first logic value of the second signal during the second period of time; Forming a current path between the organic light emitting cell and the third node in response to a second logic value of the second signal during the third period of time; Forming a current path between the third node and a low potential voltage source by the fourth switch element responsive to a voltage on the second node during the fourth period. Driving method. The method of claim 13, The second period and the third period And a current path is formed between the data line and the first node by the first switch. 15. The method of claim 14, Supplying a reference voltage to the first switch during the first to third periods; And a data voltage is supplied to the first switch during the fourth period. 16. The method of claim 15, The current flowing through the organic light emitting cell is And a method of controlling the organic light emitting display device, characterized in that controlled by the reference voltage and the data voltage.

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