KR101213802B1 - Liquid crystal display device and method of driving the same - Google Patents

Abstract

Disclosed are a liquid crystal display device and a driving method thereof capable of improving image quality.

In the present invention, when the positive data or the negative data is supplied in units of two fields, the common voltage is supplied by adding or subtracting each field. For example, in the case of two-field positive data, the reduced common voltage may be supplied to the first field and the increased common voltage may be supplied to the second field. Similarly, in the case of two-field negative data, an increased common voltage may be supplied to the first field and a reduced common voltage may be supplied to the second field.

Therefore, in the present invention, when two fields of positive or negative data are supplied, the flicker phenomenon and the afterimage caused by the increase of the positive data of the second field by the positive data of the first field can be prevented. .

LCD, Interlacing, Polarity Signal Generator, Common Voltage Compensator, Flicker, Afterimage

Description

Liquid crystal display device and method of driving the same

1A is a screen showing pixel data of an odd field supplied by an interlace method on a liquid crystal panel;

1B is a screen displaying pixel data of an even field supplied by an interlace method on a liquid crystal panel;

FIG. 2 is a diagram showing pixel data of respective fields displayed over time in a conventional liquid crystal display device driven by an interlace method. FIG.

FIG. 3 is a diagram illustrating a change in data over time of one pixel on the odd horizontal lines illustrated in FIG. 2.

4 is a diagram illustrating pixel data of respective fields displayed over time in a conventional liquid crystal display device driven by an interlace method.

FIG. 5 is a diagram illustrating a change in data over time of one pixel on the odd horizontal lines illustrated in FIG. 4. FIG.

6 is a view for explaining the generation of flicker in the conventional liquid crystal display of FIG.

7 is a block diagram showing the configuration of a liquid crystal display device according to the present invention;

8 is a view illustrating in detail the polarity signal generator of FIG.

9 is a view illustrating in detail the common voltage compensator of FIG. 7;

FIG. 10 is a waveform diagram illustrating a signal generated by the polarity signal generator of FIG. 8. FIG.

FIG. 11 is a diagram for describing a common voltage compensated in the liquid crystal display of FIG. 7; FIG.

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device and a driving method thereof capable of improving image quality.

Cathode ray tubes (CRTs) are heavy and bulky. Accordingly, flat panel displays have been actively developed to overcome the disadvantages of the cathode ray tube. The flat panel display includes a liquid crystal display (LCD) device, a field emission display (FED) device, a plasma display panel (PDP), and an electroluminescence (EL) device. Electro-Luminescence display. The flat panel display displays a video signal received from the outside, for example, a TV video signal on a panel. In order to display such an image signal, the flat panel display apparatus includes a panel displaying the image signal and a driving unit for driving the panel to display the image signal.

According to the display method of the video signal is classified into progressive (progressive) method and interlace (Interlace) method.

In progressive mode, a video signal of one screen is displayed in units of one frame. Representative flat panel display apparatuses using such a progressive method include a computer monitor, a PDP and a liquid crystal display. The computer monitor, PDP and liquid crystal display are processed in a progressive manner. Accordingly, the video signal is supplied in units of frames.

The interlace method divides an image signal of one screen, that is, one frame into an odd field for displaying odd horizontal lines and an even field for displaying even horizontal lines. Accordingly, one frame is displayed in the order of the odd field and the even field. A representative display device of such an interlaced system is a television receiver. Today's television receivers are interlaced. Accordingly, the video signal for TV is provided in an interlaced manner at a broadcasting station, and is displayed in an interlaced manner on a television receiver.

Therefore, since a progressive video signal can be displayed in a liquid crystal display or a PDP, it is difficult to display a video signal for a TV.

The liquid crystal display includes a liquid crystal panel in which a plurality of pixels for displaying an image are arranged in a matrix, and a driving unit for driving the liquid crystal panel.

The liquid crystal panel includes a plurality of horizontal lines and a plurality of vertical lines, the pixels are defined by the horizontal lines and the vertical lines, and pixel electrodes are formed on the pixels. In addition, red (R), green (G), and blue (B) color filters are formed in a region corresponding to the pixels.

The driver generates a gate driver for sequentially supplying scan signals to the horizontal lines, a data driver for supplying a predetermined image signal to the vertical lines, and generates control signals for controlling the gate driver and the data driver. A timing controller is provided.

The horizontal lines are sequentially driven by the scan signals supplied from the gate driver, and an image signal supplied from the data driver is applied to the pixels via the vertical lines so that a predetermined image is obtained through the color filters. Is displayed. That is, the image signal of one frame is displayed in response to the horizontal lines driven sequentially.

Therefore, a progressive method is suitable for a liquid crystal display device in which the horizontal lines are sequentially driven. In other words, since the horizontal lines are sequentially driven regardless of the odd horizontal lines and the even horizontal lines, the progressive method is suitable.

Therefore, when the liquid crystal display device is used as a television receiver, since the interlaced video signal is provided from a broadcasting station, it is not easy to display such an interlaced video signal on the progressive liquid crystal display device.

In order to solve this problem, an interlaced video signal is converted from a liquid crystal display device into a progressive video signal and then displayed on a liquid crystal panel of the liquid crystal display device.

In this case, however, various devices (eg, a data converter, a frame memory, etc.) for converting the interlaced video signal into a progressive video signal are additionally provided in the liquid crystal display. There is a problem that is increased.

In order to solve this problem, a method of displaying an interlaced video signal on a liquid crystal display without converting it into a progressive video signal has been proposed.

As described above, an interlaced video signal composed of an odd field and an even field is supplied to the liquid crystal display. In the odd field, actual pixel data exists only on odd horizontal lines, and actual pixel data does not exist on even horizontal lines. On the contrary, in the even field, actual pixel data does not exist on the odd horizontal lines, but actual pixel data exists only on the even horizontal lines. Thus, a complete frame is formed including the odd field and the even field.

When the odd field is supplied, the liquid crystal display generates dummy pixel data on even horizontal lines by using actual pixel data existing on neighboring odd horizontal lines. In addition, when an even field is supplied, dummy pixel data on odd horizontal lines is generated using actual pixel data existing on neighboring even horizontal lines. Indeed, there may be various methods of generating the dummy pixel data. In this case, the dummy pixel data is at least smaller than the actual pixel data. Therefore, since the actual pixel data exists on the odd horizontal lines of the odd field and the dummy pixel data also exists on the even horizontal lines, the odd field can be configured as one complete frame. In addition, since dummy pixel data exists in odd horizontal lines of the even field and actual pixel data exists on the even horizontal lines, the even field may be configured as a complete frame.

The liquid crystal display sequentially drives each horizontal line to display pixel data of an odd field, and sequentially drives each horizontal line for next frame to display pixel data of an even field. Accordingly, the liquid crystal display may display an interlaced video signal including an odd field and an even field.

FIG. 1A illustrates a screen displaying pixel data of an odd field supplied by an interlace method on a liquid crystal panel, and FIG. 1B illustrates a screen displaying pixel data of an even field supplied by an interlace method on a liquid crystal panel.

As shown in FIG. 1A, in the case of an odd field, actual pixel data may be displayed on odd horizontal lines and dummy pixel data may be displayed on even horizontal lines.

As illustrated in FIG. 1B, in the case of an even field, dummy pixel data may be displayed on odd horizontal lines, and actual pixel data may be displayed on even horizontal lines.

As described above, the dummy pixel data may be generated using actual pixel data on neighboring horizontal lines.

As shown in FIG. 2, the interlaced video signal is inverted in field units and dot inverted to improve display quality.

In detail, in the interlaced video signal, the odd field and the even field are displayed by repetition of the odd field period and the even field period.

As shown in FIG. 3, in the odd field (OF) period, actual pixel data of positive polarity (+) is charged to a predetermined pixel on the horizontal horizontal lines based on the common voltage Vcom, and even field (EF) period The pixel is filled with negative pixel data of negative polarity. Subsequently, actual pixel data of positive polarity (+) is charged in the next odd field OF period and dummy pixel data of negative polarity (-) is charged in the next even field EF period. In this manner, the actual pixel data and the dummy pixel data are alternately charged in field units. As described above, since the dummy pixel data is calculated using actual pixel data between neighboring horizontal lines, the absolute value of the actual pixel data has a value much larger than the absolute value of the dummy pixel data. Accordingly, the voltage charged in the pixel on the odd horizontal lines and the pixel on the even horizontal lines has a positive polarity based on the common voltage Vcom as the odd field period and the even field period are repeated. It has an average voltage (DC voltage). Therefore, there is a problem in that a direct current voltage having a positive polarity (+) is induced in the pixel, and the afterimage is severely generated.

To solve this problem, as illustrated in FIG. 4, the polarity of the pixel data is inverted in units of two fields (or field and even field).

In detail, as shown in FIG. 5, in the first order field period, the actual pixel data of positive polarity (+) is charged to a predetermined pixel on the horizontal horizontal lines based on a common voltage Vcom, and the first even In the field period, positive pixel dummy pixel data is charged to the pixel, and in the second odd field period, the pixel is filled with actual pixel data of negative polarity (-), and in the second even field period, the pixel is charged. The negative pixel data of negative polarity is filled. In this manner, the polarity of the pixel data is inverted in units of two fields.

In this case, the actual pixel data of positive polarity (+) charged in the first odd field period and the dummy pixel data of positive polarity (+) charged in the first even field period are charged in the second odd field period. Since the actual pixel data of negative polarity (-) and the dummy pixel data of negative polarity (-) charged in the second even field period are canceled with each other, the average value (direct current voltage) of these data becomes almost zero. Therefore, the DC voltage is not induced to the pixel, and no afterimage occurs.

However, even if the afterimage is prevented by reversing the polarity of the pixel data in units of two fields, flicker may be continuously generated. That is, as shown in FIG. 6, the actual pixel data of positive polarity is filled in predetermined pixels on the horizontal lines in the odd field period. Subsequently, at even field time, the pixel is filled with positive dummy pixel data. In this case, since both the odd field period and the even field period have the same polarity (+), all of the actual pixel data charged in the odd field period are not discharged and some DC voltage remains. Therefore, the DC voltage remaining in the odd field period is combined with the dummy pixel data so that the dummy pixel data larger than the dummy pixel data is charged in the even field period. This process occurs repeatedly every even field period. Therefore, in the even field period, the desired image is not displayed due to the influence of the DC voltage remaining in the oven field period, thereby causing flicker. In particular, such flicker is more severe when pixel data of the same luminance is displayed in each field unit. For example, when the first odd field and the first even field are the same white, the value of the pixel data of the first even field is increased due to the DC voltage present on the horizontal lines of the first odd field. In addition, the same white is not realized in the first odd field and the first even field, and flicker is severely generated.

SUMMARY OF THE INVENTION An object of the present invention is to provide a liquid crystal display device and a driving method thereof capable of preventing afterimages and flicker in an interlace method.

According to a first embodiment of the present invention for achieving the above object, a liquid crystal display device includes a liquid crystal panel having a plurality of first and second lines arranged vertically and a predetermined common electrode; A gate driver supplying a scan signal to the first lines; A data driver configured to supply pixel data to the second lines at data voltages of which polarity is inverted in units of two fields; And a common voltage compensator configured to supply a variable common voltage added or subtracted in units of two fields to the common electrode.

According to a second exemplary embodiment of the present invention, a method of driving a liquid crystal display includes supplying pixel data at a data voltage of which polarity is inverted in units of two fields;

Supplying a common voltage as a variable common voltage added or subtracted in units of two fields; And

And displaying a predetermined image by the data voltage and the variable common voltage.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

7 is a block diagram showing the configuration of a liquid crystal display according to the present invention. 8 is a view illustrating in detail the polarity signal generator of FIG. 7.

In FIG. 7, the liquid crystal display according to the present invention includes a control unit 1, a gate driver 3, a data driver 4, a polarity signal generator 6, a common voltage compensator 10, and a liquid crystal panel 5. Equipped.

The controller 1 receives an interlaced video signal including an odd field and an even field from an external graphic card (not shown), and uses an even horizontal line using actual pixel data on neighboring odd horizontal lines of the odd field. Dummy pixel data on the field is generated and configured in one frame, and dummy pixel data on the odd horizontal lines is generated and configured in one frame using actual pixel data on neighboring even horizontal lines of the even field. That is, the controller 1 configures the odd field and even field of the interlaced video signal into frames. Of course, in the interlaced video signal, the odd field and the even field are combined to form one frame. In this case, in the odd field, actual pixel data exists only on odd horizontal lines, and actual pixel data does not exist on even horizontal lines. Also, in the even field, actual pixel data exists only on the even horizontal lines, and actual pixel data does not exist on the odd horizontal lines. As described above, such an interlaced video signal cannot be used in a liquid crystal display device driven in a progressive manner displayed sequentially. Accordingly, the controller 1 generates dummy pixel data on even horizontal lines in which no actual pixel data exists in the odd field, and also dummy pixels on odd horizontal lines in which no actual pixel data exists in the even field. By generating the data, the pixel data exists not only in the odd horizontal lines of the odd field but also in the even horizontal lines so as to be sequentially displayed on the liquid crystal display. Similarly, even in the even field, dummy pixel data is generated on odd horizontal lines in which actual pixel data does not exist, and thus may be sequentially displayed on the liquid crystal display. Thus, the odd field and the even field each constitute one frame. In other words, the field in the present invention corresponds to one frame.

For convenience of description, in the following description, it is assumed that actual pixel data existing on odd horizontal lines of an odd field and actual pixel data existing on even horizontal lines of an even field have the same gray level. Accordingly, dummy pixel data existing on even horizontal lines of the odd field have the same gray level as actual pixel data present on odd horizontal lines of the odd field. Similarly, dummy pixel data present on odd horizontal lines of an even field have the same gray level as actual pixel data present on even horizontal lines of an even field.

The controller 1 generates first control signals GSP, GSC, and GOE and second control signals SSP, SSC, and SOE for driving the gate driver 3 and the data driver 4. The first control signal is supplied to the gate driver 3, and the second control signal and the converted data are supplied to the data driver 4.

The gate driver 3 sequentially supplies scan signals to the liquid crystal panel 5 in response to the first control signal.

The pixel data of the present invention is displayed with polarity inversion in units of two fields (odd field and even field). To this end, the polarity signal generator 6 generates a bipolar signal and supplies it to the data driver 4.

As illustrated in FIG. 8, the polarity signal generator 6 includes a first D flip-flop 7 and a second D flip-flop 8 connected to the first D flip-flop 7.

The first D flip-flop 7 outputs the value of the input terminal D through the non-inverting terminal Q in response to the GSP signal. The GSP signal may be repeatedly generated in units of fields (even field or odd field) in the controller 1. The second D flip-flop 8 outputs the value of the input terminal D through the non-inverting terminal Q in response to the value output through the non-inverting terminal Q of the first D flip-flop 7. do. In this case, when the non-inverting terminal Q is outputted with a high state, the inverting terminal Q 'is outputted with a low state. Therefore, the non-inverting terminal Q and the inverting terminal Q 'may always output voltages opposite to each other.

10, a non-inverting terminal of the first D flip-flop 7 is applied when a high voltage is applied to the inverting terminal Q of the first D flip-flop 7. Q) outputs a low voltage. The previously output value is output to the second D flip-flop 8 by the low voltage output from the non-inverting terminal Q of the first D flip-flop 8. In this case, it is assumed that a low voltage is output to the inverting terminal Q 'of the second D flip-flop 8 and a high voltage is output to the non-inverting terminal Q. Therefore, during the first field period (first odd field period), the polarity signal generator 6 outputs a bipolar signal having a high state, and at the inverting terminal Q 'of the first D flip-flop 7. The high voltage is output and the low voltage is output from the non-inverting terminal Q.

In this case, a first GSP signal having a high state is input to the first D flip-flop 7. In response to the first GSP, a high voltage is output to the non-inverting terminal Q of the first D flip-flop 7. Therefore, a low voltage is output to the inverting terminal Q 'of the first flip-flop 7. Subsequently, in response to the voltage of the high state output from the non-inverting terminal Q of the first D flip-flop 7, the voltage of the high state of the non-inverting terminal Q of the second D flip-flop 8 is increased. Is output. Accordingly, a low voltage is output to the inverting terminal Q 'of the second D flip-flop 8. Therefore, during the second frame period (first even field period), the polarity signal generator 6 outputs a bipolar signal having a high state, and the inverting terminal Q 'of the first D flip-flop 7. The low voltage is outputted at and the high voltage is outputted at the non-inverting terminal Q.

Similarly, when a second GSP signal is input to the first D flip-flop 7 during a third frame period (second odd field period), the polarity signal generator 6 receives a low bipolar signal. The high voltage is output from the inverting terminal Q 'of the first D flip-flop 7 and the low voltage is output from the non-inverting terminal Q.

The bipolar signal is output from the polarity signal generator 6 by the same process as described above for each frame.

Therefore, the two polarity signals repeatedly have a high state voltage and a low state voltage every two frame periods (eg, the first odd field period and the first even field period). In this case, the non-inverting terminal Q of the first D flip-flop 7 has a low voltage during the first frame period, and has a high voltage and a low state for every other frame period. The voltage is repeatedly output in the order of. Similarly, the inverting terminal Q 'of the first D flip-flop 7 has a high voltage during the first frame period, and a low voltage and a high state during every other period. It is repeatedly output in the order of voltage.

Accordingly, the polarity signal generator 6 generates the two-polarity signal having the polarity inverted in units of two fields and supplies it to the data driver 5. In addition, the polarity signal generator 6 supplies the bipolar signal, the Q signal and the Q ′ signal of the first D flip-flop 7 to the common voltage compensator 10. The polarity signal has a range of 0V to several volts. That is, when the polarity signal is a voltage in a low state, it may be 0V, and in the case of a high state voltage, it may be several V.

The data driver 4 polarizes a predetermined data signal in units of two fields according to the bipolar signal supplied from the polarity signal generator 6 and outputs it. That is, pixel data of the same polarity is output for each pixel in units of two fields. For example, as shown in FIG. 11, actual pixel data of positive polarity (+) is output in a first odd field period for a specific pixel, and dummy pixel data of positive polarity (−) in a first even field period. Is output, actual pixel data of negative polarity (-) is output in the second odd field period, and negative pixel data of negative polarity (-) is output in the second even field period.

Meanwhile, as shown in FIG. 9, the common voltage compensator 10 includes a common voltage generator 12, a common voltage swing controller 14, and a common voltage variable unit 16.

The common voltage generator 12 generates a common voltage having a predetermined DC voltage. The common voltage is generated constantly regardless of the frame period. Conventionally, such a common voltage is supplied to the liquid crystal panel, and the liquid crystal is driven by the potential difference with the pixel data supplied from the data driver to display a predetermined image. In this case, since the pixel data has a gradation voltage having each level, the potential difference with the common voltage having a constant value is varied according to the gradation voltage to express the gradation of the image.

In the present invention, the common voltage having a constant DC voltage is not supplied to the liquid crystal panel 5, but the common voltage is supplied in a variable period according to the frame period.

The common voltage swing controller 14 receives the bipolar signal supplied from the polarity signal generator 6, the Q signal and the Q ′ signal output from the first D flip-flop 7, and receives the bipolar signal. Based on the selected signal, either the Q signal or the Q 'signal is supplied to the common voltage variable part 16 as a common voltage swing value.

The bipolar signal, the Q signal, and the Q 'signal are all output from the polarity signal generator 6. As shown in FIG. 10, the bipolar signal has a high state and a low state in units of two fields. It has a voltage repeatedly. For example, the second polarity signal has a high voltage during the first and second frame periods (the first odd field period and the first even field period), and the third and fourth frame periods (the second odd field period and the like). Has a low voltage during the second even field period), has a high voltage again during the fifth and sixth frame periods (third odd field period and third even field period), and has a seventh and eighth frame period. (Lower voltage during the fourth odd field period and the fourth even field period).

The Q signal has a low voltage during the first frame period, and has a high voltage and a low voltage repeatedly for two frame periods during the remaining frame periods except for the first frame period. The Q 'signal has a polarity opposite to that of the Q signal, and has a high state for the first frame period, and repeatedly has a low state voltage and a high state voltage for the remaining frame periods except for the first frame period. do.

The common voltage swing control unit 14 selects any one of a Q signal and a Q 'signal every two frame periods according to the bipolar signal to convert the selected signal to the common voltage variable unit 16 as a common voltage swing value. Supply.

As shown in FIG. 11, the common voltage swing control unit 14 selects a Q signal by a first bipolar signal (a second and a second frame period), and a second second polarity signal (a third and a fourth program). Q 'signal is selected by the frame period, Q signal is selected by the third bipolar signal (the fifth and sixth frame period), and Q signal is selected by the fourth bipolar signal (the seventh and eighth frame periods). The Q 'signal can be selected.

As can be seen from this, the common voltage swing control unit 14 may select and output a low voltage in a previous frame period and a high voltage in a subsequent frame period for each of the two polarity signals.

The common voltage variable part 16 includes a variable common voltage reflecting a common voltage swing value supplied from the common voltage swing controller to a common voltage having a constant DC voltage supplied from the common voltage generator 12. 10).

The common voltage swing value may be added to or subtracted from the common voltage. That is, when the common voltage swing value is a voltage in a low state, a variable common voltage in which the low voltage is subtracted from the common voltage may be generated. Similarly, when the common voltage swing value is a high state voltage, a variable common voltage to which the high state voltage is added may be generated from the common voltage.

For example, the common voltage is 3V, and the common voltage swing value is 4V when the voltage is in the high state, and 0V when the voltage is in the low state. In this case, when the common voltage swing value is a voltage in a high state, a variable common voltage of 7V may be generated by adding a high voltage (+ 4V) to the common voltage 3V. Similarly, when the common voltage swing value is a low voltage, a low common voltage (-4V) is subtracted from the common voltage 3V to generate a variable common voltage of -1V. Therefore, the common voltage variable part 16 supplies the common panel variable variable voltage, which is obtained by subtracting the common voltage swing value, to the liquid crystal panel 5.

The liquid crystal panel 5 includes a first substrate, a second substrate, and a liquid crystal layer injected between the first and second substrates.

For example, in the case of a twisted nematic (TN) mode liquid crystal panel, the first substrate has a plurality of horizontal lines and a plurality of vertical lines arranged vertically, and a plurality of thin film transistors are connected to the horizontal lines. A plurality of pixel electrodes are connected to the plurality of thin film transistors. Pixels are defined by the horizontal lines and the vertical lines. One pixel includes one thin film transistor and one pixel electrode.

In the second substrate, red (R), green (G), and blue (B) color filters are formed in a region corresponding to the pixel, and a black matrix is formed between each color filter, and the color filters and the A common electrode for supplying a common voltage is formed on the black matrix. The present invention can be equally applied to liquid crystal panels of other modes (eg, VA mode, OCB mode, IPS mode, etc.) as well as the TN mode.

The driving operation of the liquid crystal display device of the present invention configured as described above will be described.

First, predetermined data and a predetermined synchronization signal (eg, a vertical synchronization signal Vsync and a horizontal synchronization signal Hsync) are supplied to the controller 1.

The controller 1 generates gate control signals GSC, GSP, and GOE and data control signals SSC, SSP, SOE, and POL by using the synchronization signal. The gate control signal is supplied to the gate driver 3, and the data control signal is supplied to the data driver 4. The GSP signal is also supplied to the polarity signal generator 6. The data is also supplied to the data driver 4.

The gate driver 3 sequentially supplies a scan signal to the liquid crystal panel 5 in response to the gate control signal.

As shown in FIG. 8, the polarity signal generator 6 generates a bipolar signal inverted in polarity in units of two fields by using the GSP signal. In addition, the polarity signal generator 6 generates a Q signal and a Q 'signal from the non-inverting terminal Q and the inverting terminal Q' of the first D flip-flop 7.

The polarity signal generator 6 supplies the Q signal, the Q 'signal and the bipolar signal to the common voltage compensator 10, and the bipolar signal to the data driver 4.

The data driver 4 polarizes the data in units of two fields according to the bipolar signal and supplies the data to the liquid crystal panel 5. Although not shown, the liquid crystal display includes a gamma voltage generator for generating a gamma voltage for use as the analog data voltage such that the data driver 4 outputs the data, that is, the analog data voltage corresponding to the digital data. It may be provided.

Therefore, the data driver 4 polarizes the data supplied from the controller 1 in units of two fields and supplies the data to the liquid crystal panel 5 as an analog data voltage.

Meanwhile, as shown in FIG. 9, the common voltage compensator 10 may compare the common voltage generated by the common voltage generator 12 and the common voltage swing value generated by the common voltage swing controller 14. A variable common voltage is generated as an input. The common voltage swing control unit 14 selects any one of a Q signal and a Q 'signal in units of two fields by using the bipolar signal, and outputs the signal as a common voltage swing value. The common voltage variable unit 16 subtracts the common voltage swing value supplied from the common voltage swing control unit 14 to the common voltage supplied from the common voltage generator 12 and outputs the variable common voltage. The variable common voltage is supplied to the liquid crystal panel 5.

Therefore, the positive data voltage and the negative data voltage are supplied to each pixel of the liquid crystal panel 5 in units of two fields. In this case, the common voltage swings with a predetermined width in the odd field period and the even field period of the two field periods. As shown in FIG. 9, the predetermined width represents a common voltage swing value supplied from the common voltage swing controller 14.

For example, as shown in FIG. 11, when the positive data voltage is supplied during the two field periods, the common voltage is decreased by the common voltage swing value during the odd field period and the common voltage swing value during the even field period. Is increased by.

Similarly, when the negative data voltage is supplied during the next two field periods, the common voltage may be increased by the common voltage swing value during the odd field period and decreased by the common voltage swing value during the even field period.

Conventionally, since the DC voltage remaining in the odd field period is added to the data voltage in the even field period, the desired gray level or more is realized because the polarity (+) is equal to both the odd field period and the even field period, thereby causing flicker. Will occur.

The present invention has been proposed to prevent such a conventional flicker phenomenon. As shown in FIG. 11, when the same gray level is provided in units of two fields, a common voltage swing value is used in an odd field period of two field periods. The common voltage is increased by the common voltage swing value in the even field period, and the potential difference V1 between the actual pixel data in the odd field period and the common voltage and the potential difference V2 between the dummy pixel data in the even field period and the common voltage are reduced. By making the same, the same gradation can be implemented to prevent the flicker phenomenon. Of course, even if they do not have the same gradation in units of two fields, the common voltage may be decreased in the odd field period and the common voltage may be increased in the even field period to obtain desired luminance, thereby preventing the generation of flicker.

As described above, according to the present invention, the flicker phenomenon can be prevented by compensating the data voltage during the even field period increased by the DC voltage remaining during the odd field period by adding or subtracting the common voltage in each field unit. .

According to the present invention, even if a DC voltage remains in the odd field period, the residual image can be minimized since it is compensated in the even field period.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification should be defined by the claims.

Claims (17)

A liquid crystal panel having a plurality of first and second lines arranged vertically and a common electrode; A gate driver supplying a scan signal to the first lines; A data driver configured to supply pixel data to the second lines at a data voltage inverted in polarity in units of two fields; And And a common voltage compensator for supplying a variable common voltage subtracted in units of two fields to the common electrode. The display apparatus of claim 1, further comprising: a controller configured to generate a first control signal for driving the gate driver and a second control signal for driving the data driver; And And a polarity signal generator for generating a first signal, a second signal in phase with the first signal, and a bipolar signal for polarity inversion in units of the two fields. 3. The display device of claim 2, wherein the polarity signal generator comprises: a first D flip-flop generating the first and second signals; And a second D flip-flop connected in series with the first D flip-flop to generate the bipolar signal. 4. The liquid crystal display of claim 3, wherein the first D flip-flop is driven by a GSP signal of the first control signal. 4. The liquid crystal display of claim 3, wherein the second D flip-flop is driven by the first signal. The method of claim 2, wherein the common voltage compensator, A common voltage generator generating a common voltage; A common voltage swing controller configured to generate one of the first and second signals as a common voltage swing value according to the bipolar signal; And And a common voltage varying part configured to add or subtract the common voltage using the common voltage swing value. 7. The method of claim 6, wherein when the positive data voltage is supplied during the two field periods, the common voltage is decreased by the common voltage swing value during the first field period, and the common voltage is the common voltage during the second field period. The liquid crystal display device, characterized in that increased by a swing value. 7. The method of claim 6, wherein when the negative data voltage is supplied during the two field periods, the common voltage is increased by the common voltage swing value during the first field period, and the common voltage is the common voltage during the second field period. And a voltage swing value. The method of claim 6, wherein the common voltage swing control unit, When the first signal has a low state and a high state for each field, and the second signal has a high state and a low state for each field, the first signal is selected for the first two field periods, and the next two field periods. Wherein the second signal is selected. The liquid crystal display of claim 1, wherein the pixel data is input in an interlaced manner. The liquid crystal display device of claim 1, wherein the pixel data includes dummy pixel data calculated by using actual pixel data on horizontal lines adjacent to the actual pixel data. Supplying pixel data with a data voltage having polarity inverted in units of two fields; Supplying a common voltage as a variable common voltage added or subtracted in units of two fields; And And displaying an image by the data voltage and the variable common voltage. The method of claim 12, further comprising generating a first signal, a second signal in phase with the first signal, and a bipolar signal for polarity inversion in units of two fields. . The method of claim 13, wherein supplying the variable common voltage comprises: Generating a common voltage; Generating one of the first and second signals as a common voltage swing value according to the bipolar signal; And And adjusting the common voltage using the common voltage swing value. 15. The method of claim 14, wherein when the positive data voltage is supplied during the two field periods, the common voltage is decreased by the common voltage swing value during the first field period, and the common voltage is the common voltage during the second field period. A driving method of a liquid crystal display device, characterized in that it increases by a swing value. 15. The method of claim 14, wherein when the negative data voltage is supplied for two field periods, the common voltage is increased by the common voltage swing value during the first field period, and the common voltage is the common voltage during the second field period. And a swing value is reduced. The method of claim 14, wherein the generating of the common voltage swing value comprises: When the first signal has a low state and a high state for each field, and the second signal has a high state and a low state for each field, the first signal is selected for the first two field periods, and the next two field periods. Selecting a second signal during the driving of the liquid crystal display device.

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