KR101461017B1 - Apparatus and method for driving liquid crystal display device - Google Patents

Abstract

The present invention relates to a driving apparatus and a driving method of a liquid crystal display device which can compensate a data value according to a driving frequency, thereby improving a response speed of a liquid crystal and preventing image quality deterioration.

To this end, a driving apparatus of a liquid crystal display according to the present invention includes: a liquid crystal panel having a plurality of pixel regions; A data driver for driving data lines of the liquid crystal panel; A gate driver for driving gate lines of the liquid crystal panel; A data conversion unit for detecting a driving frequency by using at least one of synchronizing signals input from the outside and converting the gradation value of image data input from the outside according to the detected driving frequency to generate conversion data; And a timing controller for controlling the data and gate drivers to generate data and gate control signals by supplying the converted data to the data driver in accordance with the driving of the liquid crystal panel.

A liquid crystal response speed, a high-speed drive, a data conversion unit, a look-up table

Description

TECHNICAL FIELD [0001] The present invention relates to a driving apparatus and a driving method for a liquid crystal display device,

The present invention relates to a liquid crystal display device, and more particularly, to a driving device and a driving method of a liquid crystal display device which can compensate a data value according to a driving frequency, thereby improving a response speed of a liquid crystal and preventing image quality deterioration.

Generally, a liquid crystal display displays an image by adjusting the light transmittance of liquid crystal cells according to a video signal. An active matrix type liquid crystal display device in which a switching element is formed for each liquid crystal cell is suitable for displaying moving images. A thin film transistor (hereinafter referred to as "TFT") is mainly used as a switching element used in an active matrix type liquid crystal display device.

The liquid crystal display device has a disadvantage in that the response speed is slow due to inherent characteristics of the liquid crystal such as viscosity and elasticity. In particular, the liquid crystal response speed of the TN mode (twisted nematic mode) may vary depending on the physical properties of the liquid crystal material, the cell gap, and the like, but usually the rising time is 20 to 80 ms and the polling time is 20 to 30 ms. Since the response speed of the liquid crystal is longer than one frame period of the moving picture (National Television Standards Committee: 16.67 ms in the case of NTSC), the voltage charged in the liquid crystal cell goes to the next frame before reaching the desired voltage The motion blurring phenomenon that the screen becomes blurred appears in the video.

Referring to FIG. 1, in a liquid crystal display device according to the related art, when data VD is changed from one level to another level due to a slow response speed in a moving picture, the corresponding display luminance BL does not reach a desired luminance So that the desired color and brightness can not be expressed. As a result, the liquid crystal display device exhibits a motion blurring phenomenon in the moving image, and the display quality is deteriorated due to the decrease of the contrast ratio.

In order to solve the slow response speed of such a liquid crystal display device, U.S. Patent No. 5,495,265 and PCT International Publication No. WO 99/09967 disclose a method of modulating data according to whether data is changed using a lookup table Driving ") has been proposed. This high-speed driving method modulates data by the same principle as in Fig.

Referring to FIG. 2, the high-speed driving method according to the related art modulates the input data VD and applies the modulated data MVD to the liquid crystal cell to obtain a desired luminance MBL. This high-speed driving method compensates for the slow response speed of the liquid crystal by the modulation of the data value, thereby alleviating the motion blurring phenomenon in the moving image, thereby displaying an image with a desired color and brightness.

Specifically, the high-speed driving method according to the related art is performed in order to reduce the capacity burden of the memory in hardware implementation, as shown in FIG. 3, the upper bits (MSB) of the previous frame Fn- And then modulated. In other words, the high-speed driving method according to the related art compares the upper bit data MSB of the previous frame Fn-1 and the upper bit data MSb of the current frame Fn, and if there is a change between the upper bit data MSB, The corresponding modulation data MRGB is selected as the upper bit data MSB of the current frame Fn.

A high-speed driving apparatus in which such a high-speed driving method is implemented is as shown in Fig.

4, the high-speed driving apparatus according to the related art includes a frame memory 43 connected to the upper bit bus line 42 and a frame memory 43 connected to the output terminals of the upper bit bus line 42 and the frame memory 43 in common And a connected look-up table 44.

The frame memory 43 stores the upper bits (MSB) for one frame period and supplies the stored data to the look-up table 44. Here, the upper bit (MSB) is set to the upper 4 bits among the 8-bit source data (RGB).

Up table 44 stores the upper bit data MSB of the current frame Fn input from the upper bit bus line 42 and the upper bit data MSB of the previous frame Fn- (MSB), and selects the modulated data (MRGB) corresponding to the result. The modulated data MRGB is added to the lower bit data LSB from the lower bit bus line 41 and supplied to the liquid crystal display device.

However, since the conventional high-speed driving apparatus and method use only preset modulation data regardless of the driving frequency, for example, the frame frequency, there is a problem that the picture quality is deteriorated according to the change of the frame frequency. For example, when modulation data is set with reference to a 90 Hz driving liquid crystal display device, the image quality can be improved at 90 Hz driving. However, when the frame frequency is converted into 60 Hz, 120 Hz, or the like, the displayed image quality is degraded. That is, when the high-speed driving is performed at a frequency lower than the preset frame frequency, the response speed of the liquid crystal is excessively high, and when the high-speed driving is performed at a high frequency, the response speed of the liquid crystal is lowered, do.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and it is an object of the present invention to provide a driving apparatus for a liquid crystal display device and a driving method thereof, which can improve a response speed of a liquid crystal by compensating a data value according to a driving frequency, The purpose is to provide.

According to an aspect of the present invention, there is provided an apparatus for driving a liquid crystal display, including: a liquid crystal panel having a plurality of pixel regions; A data driver for driving data lines of the liquid crystal panel; A gate driver for driving gate lines of the liquid crystal panel; A data conversion unit for detecting a driving frequency by using at least one of synchronizing signals input from the outside and converting the gradation value of image data input from the outside according to the detected driving frequency to generate conversion data; And a timing controller for controlling the data and gate drivers to generate data and gate control signals by supplying the converted data to the data driver in accordance with the driving of the liquid crystal panel.

The data converter may include a frame memory for storing the image data in at least one frame unit and outputting the stored image data as previous data, comparing the previous data with currently input image data, and selecting and outputting first modulated data corresponding thereto A first look-up table, a frequency detector for detecting a frame frequency using at least one of the synchronization signals, and outputting a selection signal corresponding to the detected frame frequency, Up table, a first adder for adding the counted value to the first modulated data and outputting second modulated data, and a second adder for adding the second modulated data to the currently inputted video data and outputting the converted data And a second adder.

The frequency detector detects a frame frequency by receiving any one of the gate and data control signals, and supplies a selection signal corresponding to the detected frame frequency to the second look-up table.

Wherein the data conversion unit comprises: a frame memory for storing the image data in at least one frame unit and outputting stored image data as previous data; a frame memory for detecting a frame frequency using at least one of the synchronization signals, And outputs the comparison result and the modulated data corresponding to the set count value, and outputs the result of the comparison to the control unit A look-up table, and a third adder for adding the modulated data to the currently inputted video data and outputting the converted data.

Wherein the frequency detector detects a frame frequency by receiving any one of the gate and data control signals, and supplies a selection signal corresponding to the detected frame frequency to the look-up table.

And the data conversion unit is embedded in the timing controller.

According to another aspect of the present invention, there is provided a method of driving a liquid crystal display including a liquid crystal panel having a plurality of pixel regions, data and gate drivers for driving the liquid crystal panel, A method of driving a liquid crystal display (LCD) device having a timing controller for controlling a driver, the method comprising: detecting a driving frequency using at least one of synchronizing signals input from the outside; Converting the gradation value of the pixel to generate converted data; And arranging the converted data in accordance with the driving of the liquid crystal panel and supplying the converted data to the data driver and controlling the data and gate driver by generating a data and a gate control signal.

Wherein the conversion data generation step comprises the steps of storing the image data in units of frames and outputting the stored image data as previous data, comparing the previous data with currently input image data, and outputting first modulation data corresponding thereto, Detecting a frame frequency using at least one of the synchronization signals and outputting a selection signal corresponding to the detected frame frequency, outputting a coefficient value corresponding to the selection signal, Adding the count value to the modulated data to output second modulated data, and outputting the converted data by adding the second modulated data to the currently inputted video data.

The selection signal output step may include receiving a signal of either the gate or the data control signal to detect a frame frequency, and outputting a selection signal corresponding to the detected frame frequency.

The conversion data generation step may include storing the image data in units of at least one frame and outputting the stored image data as previous data, detecting a frame frequency using at least one of the synchronization signals, Outputting a corresponding selection signal, setting a coefficient value corresponding to the selection signal, comparing the previous data with currently input image data, selecting the comparison result value and the modulation data corresponding to the set coefficient value And outputting the converted data by adding the modulated data to the currently input image data.

The driving apparatus and the driving method of the liquid crystal display according to the present invention having the above characteristics can improve the response speed of the liquid crystal by compensating the data value according to the driving frequency and prevent the deterioration of the image quality of the display image .

Hereinafter, a driving apparatus and a driving method of a liquid crystal display according to an embodiment of the present invention will be described in more detail with reference to the accompanying drawings.

5 is a configuration diagram schematically showing a driving apparatus of a liquid crystal display according to an embodiment of the present invention.

The liquid crystal display device shown in Fig. 5 includes a liquid crystal panel 2 having a plurality of pixel regions; A data driver 4 for driving the data lines DL1 to DLm of the liquid crystal panel 2; A gate driver 6 for driving the gate lines GL1 to GLn of the liquid crystal panel 2; A driving frequency is detected using at least one of synchronizing signals DCLK, Hsync, Vsync, and DE input from the outside, and the gradation value of image data RGB input from the outside is converted according to the detected driving frequency A data conversion section (10) for generating conversion data (TData); The data and gate control signals GCS and DCS are supplied to the data driver 4 and the data and gate control signals GCS and DCS, And a timing controller 8 for controlling the timing controller 8.

The liquid crystal panel 2 includes a thin film transistor (TFT) formed in each pixel region defined by a plurality of gate lines GL1 to GLn and a plurality of data lines DL1 to DLm, a liquid crystal capacitor (Clc). The liquid crystal capacitor Clc is composed of a pixel electrode connected to the TFT and a common electrode facing the pixel electrode and the liquid crystal. The TFT supplies a data signal from each of the data lines DL1 to DLm to the pixel electrode in response to a scan pulse from each of the gate lines GL1 to GLn. The liquid crystal capacitor Clc charges the difference voltage between the data signal supplied to the pixel electrode and the common voltage supplied to the common electrode, and adjusts the light transmittance by varying the arrangement of the liquid crystal molecules according to the difference voltage. The storage capacitor Cst is connected in parallel to the liquid crystal capacitor Clc so that the voltage charged in the liquid crystal capacitor Clc is maintained until the next data signal is supplied. The storage capacitor Cst is formed by overlapping the pixel electrode with the previous gate line and the insulating film interposed therebetween. The storage capacitor Cst may be formed by overlapping the pixel electrode with the storage line and the insulating film interposed therebetween.

The data driver 4 receives a data control signal DCS from the timing controller 8, for example, a source start pulse SSP, a source shift clock SSC, a source output enable SOE (Source Output Enable) signal from the timing controller 8 to an analog voltage, that is, a video signal. Specifically, the data driver 4 latches the image data (Data) input according to the SSC, and then, in response to the SOE signal, applies a scan pulse to each of the gate lines GL1 to GLn, To each of the data lines DL1 to DLm. At this time, the data driver 4 selects a positive or negative gamma voltage having a predetermined level according to the gray level of the image data Data, and supplies the selected gamma voltage to each of the data lines DL1 to DLm as a video signal do.

The gate driver 6 outputs a gate control signal GCS from the timing controller 8, for example, a gate start pulse GSP, a gate shift clock GSC, a gate output enable Sequentially generates scan pulses in response to a gate output enable (GOE) signal, and sequentially supplies the scan pulses to the gate lines GL1 to GLn. In other words, the gate driver 6 shifts the GSP from the timing controller 8 according to the GSC to sequentially supply a scan pulse, for example, a gate-on voltage to the gate lines GL1 to GLn. Then, the gate-off voltage is supplied during the period when the gate-on voltage is not supplied to the gate lines GL1 to GLn. Here, the gate driver 6 controls the pulse width of the scan pulse in accordance with the GOE signal.

The data converter 10 receives at least one of synchronizing signals (DCLK, Hsync, Vsync, DE) input from the outside, and detects a driving frequency, for example, a frame frequency. The gradation value of the image data RGB input from the outside is converted in accordance with the detected frame frequency to generate the converted data TData and supplies the generated converted data TData to the timing controller 8. [ Here, the data conversion unit 10 may be incorporated in the timing controller 8. [ However, in the present invention, only the case where the data conversion unit 10 is formed outside the timing controller 8 will be described for convenience of explanation. The data conversion unit 10 will be described in more detail below with reference to the accompanying drawings.

The timing controller 8 arranges the converted data (TData) from the data converter (TData) so as to be suitable for driving the liquid crystal panel (2) and supplies the data to the data driver (4). A gate control signal GCS and a data control signal DCS are generated using external synchronization signals DCLK, DE, Hsync and Vsync to control the data driver 4 and the gate driver 6 .

6 is a block diagram showing the data conversion unit shown in FIG.

The data conversion unit 10 shown in FIG. 6 includes a frame memory 21 for storing input image data RGB in at least one frame and outputting stored image data RGB as previous data Fn-1, A first look-up table 22 for comparing the previous data Fn-1 from the frame memory 21 with the currently input image data Fn and selectively outputting the first modulated data MRGB corresponding thereto, A frequency detector 23 for detecting a frame frequency using at least one of synchronizing signals DCLK, DE, Hsync and Vsync from the outside and outputting a selection signal Fcs corresponding to the detected frame frequency, A second look-up table 24 for outputting coefficient values corresponding to the selection signal Fcs from the frequency detector 23, a second look-up table 24 for outputting first modulated data MRGB from the first look- Up table 24 and adds the coefficient value Coe from the second look-up table 24 to the second modulation data A first adder 25 for outputting the converted data MData and a second adder 25 for adding the second modulated data MData from the first adder 25 to the currently inputted video data Fn, And a second adder 26 are provided.

The frame memory 21 stores the input image data RGB in at least one frame unit. Then, the stored image data RGB is sequentially supplied to the first look-up table 22 with the previous data Fn-1.

The first look-up table 22 sequentially compares the previous data Fn-1 sequentially supplied from the frame memory 21 with the currently input image data Fn, that is, the current data Fn. Then, the first modulated data MRGB corresponding to the compared result is selected and supplied to the first adder 25. Here, the first modulated data MRGB is data in which the gray level value of the current data Fn is converted so that the liquid crystal can be driven at high speed.

The frequency detector 23 detects a frame frequency using at least one of synchronizing signals DCLK, DE, Hsync and Vsync input from the outside, for example, a vertical synchronizing signal Vsync or a horizontal synchronizing signal Hsync . Then, the selection signal Fcs corresponding to the detected frame frequency is generated and supplied to the second look-up table 24. On the other hand, in addition to the synchronizing signals DCLK, DE, Hsync, and Vsync, the frequency detecting unit 23 detects the gate and data control signals GCS and DCS supplied from the timing controller 8 to the gate and data drivers 4 and 6 Any one of the signals may be received to detect the frame frequency. In other words, the frequency detector 23 receives the GSP or DSP supplied from the timing controller 8 to the gate and data drivers 4 and 6, and detects the frame frequency. Here, the selection signal Fcs can be output with a value of 2 bits, 3 bits or 4 bits.

The second look-up table 24 outputs a coefficient value Coe corresponding to the selection signal Fcs input from the frequency detector 23. The second look- Here, the coefficient value Coe stored in the second look-up table 24 can be preset by the user and can be set to a predetermined experimental value according to each frame frequency as shown in Table 1 below .

Specifically, as shown in Table 1, coefficient values according to overshoot or undershoot of each frame frequency are stored in advance in the second look-up table 24 do. At this time, the coefficient value Coe according to the frame frequency of 90 Hz may be set as the reference coefficient value (Ref LUT Setting) in the second look-up table 24. [ In Table 1, the branch bit is the selection signal Fcs supplied from the frequency detector 23 to the second look-up table 24. [

Accordingly, the second look-up table 24 determines the frame frequency according to the input selection signal Fcs and supplies the coefficient value Coe corresponding to the overshoot or undershoot to the first adder 25 . Here, the overshoot or undershoot can be selected in accordance with the inversion driving method of the liquid crystal panel 2. [ That is, the overshoot or undershoot coefficient value Ceo is selected depending on whether the video signals supplied to the liquid crystal panel 2 are supplied in a positive polarity or a negative polarity. Generally, such an inversion driving method can be judged by receiving an inversion driving signal POL generated from the timing controller 8.

The first adder 25 adds the coefficient value Coe from the second look-up table 24 to the first modulated data MRGB from the first look-up table 22 to generate the second modulated data MRGB, MData). Then, the generated second modulated data (MData) is sequentially supplied to the second adder (26).

The second adder 26 generates the converted data TData by adding the second modulated data MData input from the first adder 25 to the currently inputted video data Fn. Then, the generated conversion data (TData) is supplied to the timing controller 8. [

Thereafter, the timing controller 8 arranges the converted data (TData) from the second adder 26 so as to be suitable for driving the liquid crystal panel 2, and supplies the data to the data driver 4. [

As described above, according to the driving apparatus of the liquid crystal display apparatus and the driving method thereof according to the embodiment of the present invention, the driving frequency is increased by adding the coefficient value Ceo to the first modulated data MRGB according to the frame frequency It is possible to prevent deterioration of the image quality of the displayed image.

7 is another configuration diagram illustrating the data conversion unit shown in FIG.

The data conversion unit 10 shown in FIG. 7 includes a frame memory 31 for storing image data (RGB) input from the outside in at least one frame unit and outputting stored image data RGB as previous data Fn-1 A frequency detector 33 for detecting a frame frequency using at least one of synchronizing signals DCLK, DE, Hsync and Vsync from the outside and outputting a selection signal Fcs corresponding to the detected frame frequency, Sets the coefficient value Coe corresponding to the selection signal Fcs input from the frequency detector 33 and outputs the previous data Fn-1 from the frame memory 31 to the currently inputted video data Fn A third look-up table 32 for comparing and outputting third comparison data DData corresponding to the comparison result and the set coefficient Coe, and a third look- The third modulated data (DData) from the look-up table 32 is Acid will be a third adder (34) for outputting the converted data (TData).

Here, each of the frame memory 31 and the frequency detector 33 in FIG. 7 has the same configuration as the frame memory 21 and the frequency detector 23 shown in FIG. 6 and performs the same operation. That is, the frame memory 31 of FIG. 7 stores the input image data RGB in at least one frame unit. Then, the stored image data RGB is sequentially supplied to the third look-up table 32 with the previous data Fn-1.

The frequency detector 33 detects a frame frequency using at least one of synchronizing signals DCLK, DE, Hsync and Vsync input from the outside, for example, a vertical synchronizing signal Vsync or a horizontal synchronizing signal Hsync . Then, the selection signal Fcs corresponding to the detected frame frequency is generated and supplied to the second look-up table 24. On the other hand, in addition to the synchronizing signals DCLK, DE, Hsync, and Vsync, the frequency detecting unit 23 detects the gate and data control signals GCS and DCS supplied from the timing controller 8 to the gate and data drivers 4 and 6 Any one of the signals may be received to detect the frame frequency. In other words, the frequency detector 23 receives the GSP or DSP supplied from the timing controller 8 to the gate and data drivers 4 and 6, and detects the frame frequency. Here, the selection signal Fcs can be output with a 3-bit value as shown in Table 1, and output with a 2-bit or 4-bit value (not shown).

Up table 32 sets a coefficient value Coe corresponding to the selection signal Fcs input from the frequency detector 33. The third look- Comparing the previous data Fn-1 from the frame memory 31 with the currently input image data Fn and comparing the comparison result and the third modulated data DData corresponding to the set coefficient Coe, . In other words, the coefficient value Coe corresponding to the selection signal Fcs is stored in the third look-up table 32, and the coefficient value Coe, the previous data Fn-1, Fn) corresponding to the third modulation data (DData). Therefore, the third look-up table 32 sequentially selects the third modulated data DData corresponding to the coefficient Coe, the previous data Fn-1 and the current data Fn, 34). Here, the third modulated data DData is data previously set by the previous experiment data Fn-1 and the current data Fn and predetermined experiment values according to the respective frame frequencies. Similarly, the third lookup table 32 stores the third modulated data DData according to the overshoot or undershoot of each frame frequency. The third modulated data (DData) according to the frame frequency of 90 Hz can be set as the reference value.

The third adder 34 adds the third modulated data DData from the third look-up table 32 to the current data Fn to generate the converted data TData. Then, the generated conversion data (TData) is supplied to the timing controller 8. [

Thereafter, the timing controller 8 aligns the converted data (TData) from the third adder 34 so as to be suitable for driving the liquid crystal panel 2, and supplies the data to the data driver 4. [

As described above, the driving apparatus of the liquid crystal display apparatus and the driving method thereof according to another embodiment of the present invention can reduce manufacturing cost by using one adder 34 and one look-up table 32 have. Then, by generating the third modulated data (DData) so as to correspond to the frame frequency, the image quality of the displayed image can be prevented from deteriorating.

While the present invention has been described in connection with what is presently considered to be the most practical and preferred embodiment, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims. Will be apparent to those of ordinary skill in the art.

1 is a waveform diagram showing a change in luminance according to data of a liquid crystal display device according to the related art.

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a method of driving a liquid crystal display device.

3 is a diagram showing modulation of higher bit data in a high-speed driving apparatus of a liquid crystal display device according to the related art.

4 is a configuration diagram showing a high-speed driving device of a liquid crystal display device according to related art.

5 is a configuration diagram schematically showing a driving apparatus of a liquid crystal display according to an embodiment of the present invention.

6 is a configuration diagram showing the data conversion unit shown in Fig.

FIG. 7 is another configuration diagram showing the data conversion unit shown in FIG. 5; FIG.

BRIEF DESCRIPTION OF THE DRAWINGS FIG.

2: liquid crystal panel 4: data driver

6: Gate driver 8: Timing controller

10: data converter 21, 31: frame memory

22: first look-up table 23, 33:

24: second look-up table 25: first adder

26: second adder 32: third look-up table

34: third adder

Claims (10)

A liquid crystal panel having a plurality of pixel regions; A data driver for driving data lines of the liquid crystal panel; A gate driver for driving gate lines of the liquid crystal panel; A data conversion unit for detecting a driving frequency by using at least one of synchronizing signals input from the outside and converting the gradation value of image data input from the outside according to the detected driving frequency to generate conversion data; And And a timing controller for supplying the converted data to the data driver in accordance with the driving of the liquid crystal panel and generating a data and gate control signal to control the data and gate driver, The data conversion unit Wherein the gray level value of the current frame image data is firstly converted so as to correspond to a gray level difference between the previous frame image data and the current frame image data, And generates the converted data by performing a difference conversion. The method according to claim 1, The data conversion unit A frame memory for storing the image data in at least one frame unit and outputting the stored image data as previous data, A first look-up table for comparing the previous data with currently input image data and selectively outputting first modulated data corresponding thereto, A frequency detector for detecting a frame frequency using at least one of the synchronization signals and outputting a selection signal corresponding to the detected frame frequency, A second look-up table for outputting a coefficient value corresponding to the selection signal, A first adder for adding the counted value to the first modulated data and outputting second modulated data, And a second adder for adding the second modulated data to the currently inputted video data and outputting the converted data. 3. The method of claim 2, The frequency detector Up table, and supplies a selection signal corresponding to the detected frame frequency to the second look-up table. The driving method of a liquid crystal display device according to claim 1, . The method according to claim 1, The data conversion unit A frame memory for storing the image data in at least one frame unit and outputting the stored image data as previous data, A frequency detector for detecting a frame frequency using at least one of the synchronization signals and outputting a selection signal corresponding to the detected frame frequency, A look-up table for setting a coefficient value corresponding to the selection signal, comparing the previous data with currently input image data, and outputting the comparison result value and modulation data corresponding to the set coefficient value, And a third adder for adding the modulated data to the currently inputted video data and outputting the converted data. 5. The method of claim 4, The frequency detector Wherein the control unit detects a frame frequency by receiving any one of the gate and data control signals, and supplies a selection signal corresponding to the detected frame frequency to the look-up table. The method according to claim 2 or 4, The data conversion unit Wherein the timing controller is incorporated in the timing controller. A driving method of a liquid crystal display device including a liquid crystal panel having a plurality of pixel regions, data and gate drivers for driving the liquid crystal panel, and a timing controller for controlling the data and gate drivers, Detecting a driving frequency using at least one of synchronizing signals input from the outside and converting the gradation value of image data input from the outside according to the detected driving frequency to generate converted data; And And arranging the converted data in accordance with driving of the liquid crystal panel and supplying the converted data to the data driver and controlling the data and gate driver by generating data and gate control signals, The conversion data generation step Wherein the gray level value of the current frame image data is firstly converted so as to correspond to a gray level difference between the previous frame image data and the current frame image data, And the conversion data is generated by performing the difference conversion. 8. The method of claim 7, The conversion data generation step Storing the image data in at least one frame unit and outputting stored image data as previous data, Comparing the previous data with currently input image data and selectively outputting first modulated data corresponding thereto, Detecting a frame frequency using at least one of the synchronization signals and outputting a selection signal corresponding to the detected frame frequency, Outputting a coefficient value corresponding to the selection signal, Adding the coefficient value to the first modulated data to output second modulated data, and And outputting the converted data by adding the second modulated data to the currently input image data. 9. The method of claim 8, The selection signal output step Detecting a frame frequency by receiving any one of the gate and data control signals, and And outputting a selection signal corresponding to the detected frame frequency. 8. The method of claim 7, The conversion data generation step Storing the image data in at least one frame unit and outputting stored image data as previous data, Detecting a frame frequency using at least one of the synchronization signals and outputting a selection signal corresponding to the detected frame frequency, Setting a coefficient value corresponding to the selection signal, Comparing the previous data with currently input image data and selectively outputting the comparison result value and the modulated data corresponding to the set count value, and And outputting the converted data by adding the modulated data to the currently inputted video data.

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