KR101212162B1 - Dual view display device and method for fabricating the same - Google Patents

Abstract

The present invention relates to a dual view display device capable of showing different images according to a viewing angle through a screen and a method of manufacturing the same. According to an aspect of the present invention, a liquid crystal display device includes: first pixels displaying a first image And a display panel having second pixels displaying a second image. A mask filter formed on a front surface of the display panel to transmit the first and second images to different viewing angle regions; The mask filter discloses a dual view display device having a plurality of blocking patterns formed on a front surface of the display panel with a transmissive portion interposed therebetween, and a manufacturing method thereof.

Viewing angle, dual view, mask filter, blocking pattern

Description

DUAL VIEW DISPLAY DEVICE AND METHOD FOR FABRICATING THE SAME}

1 is a cross-sectional view illustrating a dual view liquid crystal display device according to an exemplary embodiment of the present invention.

2 is a cross-sectional view illustrating a dual view liquid crystal display according to another exemplary embodiment of the present invention.

2 is a configuration diagram of an odd pixel and an even pixel illustrated in FIGS. 1 and 2.

4 is a view illustrating a manufacturing method of a top plate of a dual view liquid crystal display according to an exemplary embodiment of the present invention.

5 is a view for explaining a lower plate manufacturing method of the dual view liquid crystal display device according to an embodiment of the present invention.

FIG. 6 is a view illustrating a dual view liquid crystal display device in which the upper and lower plates illustrated in FIGS. 4 and 5 are attached.

<Description of the Simple Symbols in the Drawing>

10: lower plate 12: lower insulating substrate

13 thin film transistor array 14 color filter array

16: top plate 18: liquid crystal layer

20 mask filter 21 blocking pattern

22, 24: polarizing plate 23: transmissive portion

26 planarization layer 30 gate electrode

32: storage line 34: blocking pattern

36 gate insulating film 38 active layer

40: ohmic contact layer 42: semiconductor layer

44: source electrode 46: drain electrode

50: data line 51: protective film

52: black matrix 54: organic insulating film

55 contact hole 56 pixel electrode

58: common electrode 60: alignment layer

62: roller

The present invention relates to a display device of the present invention, and more particularly, to a dual view display device capable of showing different images according to a viewing angle and a method of manufacturing the same.

Popular flat panel display devices include liquid crystal display (LCD) using liquid crystal, plasma display panel (PDP) using discharge of inert gas, organic electroluminescent display (OLED) using organic light emitting diode, and the like. to be. Among them, the plasma display panel is applied only to a large TV, whereas the liquid crystal display and the organic electroluminescent display are applied to many fields in various sizes from small to large, such as mobile phones, portable computers, monitors, and TVs.

Herein, the liquid crystal display uses the electrical and optical characteristics of the liquid crystal. This is because liquid crystals have anisotropic properties that are different in physical property values such as refractive index and dielectric constant, and have an advantage of easily controlling molecular arrangement and optical properties. In other words, the liquid crystal display displays an image by adjusting the light transmittance by changing the arrangement direction of the liquid crystal molecules according to the electric field.

In more detail, the liquid crystal display displays an image through a liquid crystal panel in which a plurality of pixels are arranged in a matrix. Each pixel of the liquid crystal panel implements a desired color by using a combination of red, green, and blue sub-pixels that adjust light transmittance by varying a liquid crystal array according to a data signal. Each subpixel charges the data signal supplied to the pixel electrode through the thin film transistor and the difference voltage of the common voltage supplied to the common electrode to drive the liquid crystal. Since the liquid crystal panel is a non-light emitting device, the liquid crystal display includes a backlight unit for supplying light from the rear side of the liquid crystal panel.

Recently, in order to satisfy the needs of various users, development of a dual view liquid crystal display capable of displaying different images according to left and right viewing angles through one liquid crystal display is required.

Accordingly, the present invention provides a dual view display device capable of showing different images according to a viewing angle through one screen of a liquid crystal panel, and a method of manufacturing the same.

Another object of the present invention is to provide a dual view display device having a simple structure and process and a method of manufacturing the same in order to reduce manufacturing costs.

To this end, a dual view display device according to an aspect of the present invention includes a display panel having first pixels displaying a first image and second pixels displaying a second image; A mask filter formed on a front surface of the display panel to transmit the first and second images to different viewing angle regions; The mask filter has a plurality of blocking patterns formed on a front surface of the display panel with the transmission part interposed therebetween.

The display panel includes an upper plate on which the mask filter is formed, and a lower plate bonded to the upper plate with a liquid crystal layer interposed therebetween. The lower plate may include a thin film transistor array including a plurality of signal lines and a thin film transistor formed on an insulating substrate; A color filter array including a black matrix and a color filter formed on the thin film transistor array; And a pixel electrode formed on the color filter array and connected to the thin film transistor. In addition, a common electrode is formed on any one of the upper and lower plates to form an electric field with the pixel electrode. In addition, a spacer formed between the upper plate and the lower plate; An alignment layer formed on the inner surface of each of the upper and lower plates in contact with the liquid crystal layer is further included. The display panel may further include the upper plate on which the mask filter is formed and a polarizer plate attached to each of the lower plates. The display panel may further include a planarization layer formed between the upper plate and the polarizer on which the mask filter is formed. The planarization layer includes any one of an overcoat layer and an adhesive layer.

The first pixels are composed of a plurality of first pixel lines, the second pixels are composed of a plurality of second pixel lines, and the first and second pixel lines are alternately arranged. The blocking pattern has a line shape that is elongated in the same direction as the first and second pixel lines. The blocking pattern and the transmission part are alternately arranged. The transmission unit transmits the first image to the first viewing angle region and the second image to the second viewing angle region; The blocking pattern blocks the second image from being transmitted to the first viewing angle region and the first image is not transmitted to the second viewing angle region. The first and second viewing angle regions are left and right viewing angle regions based on a vertical center axis of the display panel.

According to another aspect of the present invention, there is provided a method of manufacturing a dual view display device, including: providing an upper plate on which a mask filter having a plurality of blocking patterns interposed between transmissive portions is formed; Preparing a lower plate; And bonding the upper and lower plates together. The method may further include forming a liquid crystal layer before or after bonding the upper and lower plates.

The preparing of the top plate may include forming the mask filter on the front surface of the top plate; The method may further include forming an alignment layer on the rear surface of the upper plate. The forming of the lower plate may include forming a thin film transistor array including a plurality of signal lines and a thin film transistor on an insulating substrate; Forming a color filter array including a black matrix and a color filter on the thin film transistor array; Forming a pixel electrode connected to the thin film transistor on the color filter array. The method may further include forming a common electrode on a rear surface of the upper plate before forming the mask filter. Alternatively, the method may further include forming a common electrode on the color filter array. And forming spacers on the lower plate before attaching the upper and lower plates; The method may further include forming an alignment layer on the lower plate.

Other features and advantages of the present invention in addition to the features of the present invention will become apparent from the description of the preferred embodiment of the present invention with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 1 to 6.

1 illustrates a cross-sectional structure of a dual view liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 illustrates a cross-sectional structure of a dual view liquid crystal display according to another exemplary embodiment of the present invention. 3 illustrates a configuration of the odd and even pixels illustrated in FIGS. 1 and 2.

The dual view liquid crystal display shown in FIGS. 1 and 2 includes a liquid crystal panel including lower and upper plates 10 and 16 bonded together with a liquid crystal layer 18 therebetween, and a mask filter formed on an outer surface of the upper plate 16. 20 and first and second polarizing plates 22 and 24 attached to the rear surface of the lower plate 10 and the front surface of the upper plate 15 on which the mask filter 20 is formed, respectively.

The liquid crystal panel is formed by bonding the lower plate 10 and the upper plate 16 together with a sealing material (not shown) with the liquid crystal layer 18 therebetween. The liquid crystal layer 18 may be injected after the lower plate 10 and the upper plate 16 are bonded together.

The lower plate 10 includes a thin film transistor array 13 formed on the lower insulating substrate 12 and a color filter array 14 formed on the thin film transistor array 13. The thin film transistor array 13 includes gate lines and data lines that cross each other insulated from each other and divide each subpixel area, and thin film transistors connected to the gate line and the data line to individually drive the subpixels. The color filter array 14 includes a black matrix for dividing each subpixel region, and a red (hereinafter R), green (hereinafter G) and blue (hereinafter B) color filter respectively formed in the subpixel region. On the color filter array 14, pixel electrodes connected to the thin film transistors are formed separately in each subpixel region. In addition, the common electrode for driving the liquid crystal layer 18 may be formed on the color filter array 14 by forming an electric field with the pixel electrode. An alignment film for determining the alignment of the liquid crystal layer is further formed on the inner surface of the lower plate 10 in contact with the liquid crystal layer 18.

A mask filter 20 is formed on the outer surface of the upper plate 16, and an alignment film is further formed on the inner surface of the upper plate 15 in contact with the liquid crystal layer 18. In addition, when the common electrode is not formed on the lower plate 10, the common electrode may be formed between the upper plate 16 and the alignment layer.

The mask filter 20 formed on the outer surface of the upper plate 16 has a structure in which blocking patterns 21 for blocking light are repeatedly arranged at regular intervals. In other words, the mask filter 20 has a structure in which the blocking pattern 21 and the transmission part 23 are alternately arranged. The blocking pattern 21 is formed of a metal material such as chromium (Cr) to partially block light. Also, when the blocking pattern 21 is connected to the ground power source, the blocking pattern 21 discharges static electricity introduced from the outside to block the flow into the liquid crystal panel. The blocking pattern 21 is formed in a vertical (column) line shape to selectively block light according to the first and second viewing angle regions, that is, the left and right viewing angle regions with respect to the vertical center axis. The blocking pattern 21 blocks light from two pixels adjacent to each other in the horizontal direction according to the left viewing angle or the right viewing angle, that is, the pixels of the odd pixels OP and the even pixels EP, and the transmission part 23 rests the rest. It transmits light from one pixel. In other words, the blocking pattern 21 blocks light from any one of the odd pixel (OP) lines and the even pixel (EP) lines arranged in the vertical (column) direction, and the transmissive portion 23 is the other one. It transmits light from the pixel line. Each pixel, that is, each of the odd and even pixels OP and EP is composed of R, G, and B subpixels as shown in FIG. 3.

For example, when viewing the liquid crystal panel from the left viewing angle, the blocking pattern 21 blocks light from the odd pixel OP, and the transmission part 23 transmits light from the even pixel EP. When viewed from the right viewing angle, the blocking pattern 21 blocks light from the even pixel EP and the transmission part 23 transmits light from the odd pixel OP. Accordingly, the A image displayed by the combination of the odd pixels OP may be viewed at the left viewing angle, and the B image displayed by the combination of the even pixels EP at the right viewing angle. To this end, an A image signal is supplied to the odd pixel OP and a B image signal is supplied to the even pixel EP.

The left and right viewing angles are the horizontal pitch L of one pixel, the line width W and thickness of the blocking pattern 21 in the mask filter 20, the line width L of the transmissive portion 23, that is, the interval between the blocking patterns 21, and The distance between the liquid crystal layer 18 and the mask filter 20, that is, the thickness D of the upper plate 16 is controlled. For example, as shown in FIG. 1, when the left viewing angle is -45 degrees and the right viewing angle is 45 degrees, the line width W of the blocking pattern 21 and the line width L of the transmissive part 23 of the mask filter 20 are equal to one pixel. It is set equal to the horizontal pitch L. Each of the blocking pattern 21 and the transmission part 23 is disposed to overlap with a portion of each of the two pixels OP and EP simultaneously over two adjacent pixels OP and EP.

The first polarizing plate 22 is attached to the outer surface of the lower plate 10, that is, the rear surface of the liquid crystal panel, and the second polarizing plate 24 is attached to the upper plate 16 having the mask filter 20, that is, the front surface of the liquid crystal panel. Each of the first and second polarizing plates 22 and 24 mainly consists of a polarizing film and an adhesive layer and is attached to the liquid crystal panel through the adhesive layer. In particular, the second polarizing plate 22 is attached to the blocking pattern 21 of the mask filter 20 through the adhesive layer. In addition, the second polarizing plate 22 may be attached to the upper insulating substrate 16 through an adhesive layer filled with the transmissive part 23 by being pushed by the attachment pressure. In this case, the thickness of the blocking pattern 21 is, for example, 1500 Å thin and the interval of the blocking pattern 21 is small, for example, about one pixel pitch L, and thus, the thickness of the blocking pattern 21, that is, the first due to the step difference. There is no fear that the flatness of the polarizing plate 22 will be uneven.

In some cases, that is, when the flatness of the second polarizing plate 22 is concerned due to the step of the blocking pattern 21, the mask filter 20 is attached before attaching the second polarizing plate 22 as shown in FIG. 2. The planarization layer 26 may be formed on the top plate 16 on which the top surface is formed to compensate for the step difference of the mask filter 20. As the planarization layer 26, an adhesion layer or an overcoat layer is used. Accordingly, since the second polarizing plate 22 is attached on the planarization layer 26, the second polarizing plate 22 has a uniform flatness.

As described above, the dual view liquid crystal display according to the present invention may show different images A and B according to left and right viewing angles with one display device using the mask filter 20 formed on the upper panel 16. As a result, when the mask cell is bonded onto the liquid crystal panel for the dual view, the structure and the manufacturing process may be simplified. In addition, since the mask filter 20 also blocks static electricity, a separate static electricity shielding layer is not required, thereby minimizing the addition of a manufacturing process due to the mask filter 20.

4 is a flowchart illustrating a method of manufacturing a top plate in a dual view liquid crystal display according to an exemplary embodiment of the present invention.

Referring to FIG. 4, a mask filter 20 is formed on the front surface of the upper plate 16 by a mask process. The mask filter 20 is formed by forming a metal layer such as chromium or the like on the entire surface of the upper plate 16 by a deposition method such as sputtering and then patterning the photolithography process and an etching process. In this case, the mask filter 20 has a structure in which the blocking pattern 21 and the transmission part 23 are alternately repeated. Subsequently, the upper plate 16 on which the mask filter 20 is formed is rotated 180 degrees, and then the alignment film 60 is formed on the rear surface of the upper plate 16 by using the printing roller 62.

Meanwhile, when a common electrode is required, a common electrode using a transparent conductive layer may be formed on the rear surface of the upper plate 16 before the mask filter 20 is formed on the upper surface of the upper plate 16.

FIG. 5 illustrates a method of manufacturing a lower plate in a dual view liquid crystal display according to an exemplary embodiment of the present invention. In particular, the structure of the lower plate of one sub-pixel is illustrated in detail. Here, the lower plate structure of the present invention is not limited to the structure shown in FIG.

5 shows a thin film transistor array including a gate line (not shown) and a data line 50, a thin film transistor TFT, and a storage capacitor Cst formed on the lower insulating substrate 12, and a thin film transistor. A color filter array including a black matrix 52 and a color filter 14 formed on the array, a pixel electrode 56 formed on the color filter array and connected to the thin film transistor TFT, a pixel electrode 56 and an electric field It includes a common electrode 58 to form a. The spacer 19 is further formed on the lower plate 10.

The thin film transistor array includes a gate line (not shown) and a data line 50, a thin film transistor TFT connected to the gate line and data line 50, and a storage capacitor Cst connected to the thin film transistor TFT. Include. The thin film transistor array further includes a blocking pattern 34 overlapping both sides of the data line 50 to block light leakage.

The thin film transistor TFT keeps the data signal from the data line 50 charged and held in the pixel electrode 56 in response to the scan signal of the gate line. For this purpose, the TFT may include a gate electrode 30 connected to the gate line, a source electrode 44 connected to the data line 50, and a drain facing the source electrode 44 and connected to the pixel electrode 56. The active layer 38, the active layer 38, and the source electrode overlapping the gate electrode 30 with the electrode 46 and the gate insulating layer 36 interposed therebetween to form a channel between the source electrode 44 and the drain electrode 46. An ohmic contact layer 40 formed for ohmic contact between the 44 and the drain electrode 46 is provided. The semiconductor layer 42 including the active layer 38 and the ohmic contact layer 40 is also formed to overlap the data line 50.

The storage capacitor Cst allows the data signal supplied to the pixel electrode 56 to be stably maintained even during the off period of the thin film transistor TFT. To this end, the storage capacitor Cst is formed such that the storage line 32 overlaps the drain electrode 48 extending from the thin film transistor TFT together with the semiconductor layer 42. The storage line 32 is formed on the lower insulating substrate 12 together with the gate electrode 30 and supplies a storage voltage, for example, a common voltage.

The blocking pattern 34 is formed to partially overlap each of both sides of the data line 50 to block light leakage from both sides of the data line 50. The blocking pattern 34 is formed on the lower insulating substrate 12 together with the gate electrode 30 and the storage line 32.

The passivation layer 51 is formed on the thin film transistor array. The color filter array includes a black matrix 52 and a color filter 14 formed on the passivation layer 51. The black matrix 52 generally overlaps the gate line and the data line 50 and the thin film transistor TFT to prevent light leakage. In the region where the data line 50 is formed, light leakage is sufficiently prevented by the blocking pattern 34 and the data line 50, so that a separate black matrix 52 may not be formed. The color filter 14 includes R, G, and B color filters formed in the corresponding subpixel area.

An organic insulating film 54 having a flat surface is formed on the color filter array. The pixel electrode 56 is connected to the drain electrode 48 through the organic insulating layer 54, the contact hole 55 passing through the color filter array and the passivation layer 51. The common electrode 58 forming a horizontal electric field with the pixel electrode 56 is formed on the organic insulating layer 54 in parallel with the pixel electrode 56.

The spacer 70 overlapping the black matrix 52 is formed on the lower plate, and an alignment layer is further formed on the lower plate on which the spacer 70 is formed. The spacer 70 supports the top plate so that the cell gap in which the liquid crystal layer is formed is kept constant.

Looking at the manufacturing method of the lower plate having such a configuration in detail as follows.

The first metal layer is deposited and patterned on the lower insulating substrate 12 to form a gate line, a gate electrode 30, a storage line 32, and a blocking pattern 34. Subsequently, the gate insulating layer 36, the amorphous silicon layer, and the doped amorphous silicon layer and the second metal layer are sequentially deposited, and then patterned from the second metal layer to the amorphous silicon layer. Accordingly, the semiconductor layer 42 is formed in a structure in which the active layer 38 and the ohmic contact layer 40 are stacked on the gate insulating layer 36, and the data line 50 and the source electrode 44 are formed on the semiconductor layer 42. And a drain electrode 46 is formed. After such a thin film transistor array is formed, a protective film 51 of an inorganic insulator is deposited thereon.

Subsequently, a black matrix material is deposited and patterned on the passivation layer 51 to form a black matrix 52. The R, G and B color filters are then sequentially formed on the protective film 51 by repeating three mask processes of forming and patterning a pigment layer of the corresponding color. After the color filter array is formed, an organic insulating layer 54 is formed and patterned thereon, and a contact hole 55 penetrating to the protective layer 51 is formed.

A transparent conductive layer is then deposited and patterned on the organic insulating film 54 to form the pixel electrode 56 and the common electrode 58. The pixel electrode 56 is connected to the drain electrode 46 through the contact hole 55.

After the lower plate 10 is completed, a spacer material is formed and patterned thereon to form a spacer 70 overlapping the black matrix 52, and an alignment layer is formed.

FIG. 6 illustrates a dual view liquid crystal display device in which the upper and lower plates illustrated in FIGS. 4 and 5 are attached.

In the dual view liquid crystal display shown in FIG. 6, the upper plate 16 having the mask filter 20 illustrated in FIG. 4 and the lower plate illustrated in FIG. 5 are bonded together using a sealing material with the liquid crystal layer 18 therebetween. Is formed. The spacer 70 formed on the lower plate supports the upper plate 16 to maintain a constant cell gap in which the liquid crystal layer 18 is formed. Here, the liquid crystal layer 18 is formed by dropping a liquid crystal onto either the upper plate 16 or the lower plate. Alternatively, the liquid crystal layer 18 may be formed by bonding the upper and lower plates and then injecting the liquid crystal through the liquid crystal injection hole.

Meanwhile, in the present invention, only the case where the mask filter 20 is formed in the liquid crystal display is described as an example, but the mask filter 20 of the present invention includes a plasma display panel (PDP), an organic electroluminescent display (OLED), and the like. The same may be applied to the top plate of the flat panel display device.

As described above, the dual view display device and the method of manufacturing the same according to the present invention can display different images according to left and right viewing angles even with one display device by forming a mask filter on the front surface of the top plate. Accordingly, the dual view display device and the manufacturing method thereof according to the present invention can simplify the structure and manufacturing process than when the mask cell is bonded onto the display device for the dual view. In addition, the dual view display device and the method of manufacturing the same according to the present invention can minimize the addition of the manufacturing process due to the mask filter because the mask filter also blocks the static electricity, so that a separate static shielding layer is not required.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

Claims (20)

A display panel having first pixels displaying a first image and second pixels displaying a second image; A mask filter formed on a front surface of the display panel to transmit the first and second images to different viewing angle regions; The mask filter has a plurality of blocking patterns formed on the front surface of the display panel with the transmission part interposed therebetween. And wherein the blocking pattern is formed of a metal material and is connected to a ground power source to discharge static electricity from the outside to block the static electricity from flowing into the display panel. The method of claim 1, The display panel includes a top plate on which the mask filter is formed, and a bottom plate bonded to the top plate with a liquid crystal layer interposed therebetween. The method of claim 2, The bottom plate is A thin film transistor array including a plurality of signal lines and a thin film transistor formed on an insulating substrate; A color filter array including a black matrix and a color filter formed on the thin film transistor array; A pixel electrode formed on the color filter array and connected to the thin film transistor, The display panel A common electrode formed on one of the upper and lower substrates to form an electric field with the pixel electrode; A spacer formed between the upper and lower plates; An alignment film formed on inner surfaces of each of the upper and lower plates in contact with the liquid crystal layer; A polarizing plate attached to an outer surface of the upper plate and the outer surface of the lower plate on which the mask filter is formed; And a planarization layer formed between an outer surface of the upper plate on which the mask filter is formed and the polarizing plate, And the planarization layer comprises any one of an overcoat layer and an adhesive layer. delete delete delete delete delete The method of claim 1, The first pixels are composed of a plurality of first pixel lines, the second pixels are composed of a plurality of second pixel lines, and the first and second pixel lines are alternately arranged. The blocking pattern has a line shape extending in the same direction as the first and second pixel lines, and the blocking pattern and the transmission part are alternately arranged. The transmission unit transmits the first image to the first viewing angle region and the second image to the second viewing angle region; The blocking pattern blocks the second image from being transmitted to the first viewing angle region and the first image is not transmitted to the second viewing angle region; And the first and second viewing angle regions are left and right viewing angle regions based on a vertical center axis of the display panel. delete delete delete delete Providing a top plate having a mask filter in which a plurality of transmission portions and a plurality of blocking patterns are alternately arranged; Preparing a lower plate; Bonding the upper and lower plates to form a display panel; The display panel has first pixels displaying a first image and second pixels displaying a second image. The mask filter transmits the first and second images to different viewing angle regions, respectively. The blocking pattern is formed of a metallic material and is connected to a ground power source to discharge static electricity from the outside to block the inflow of static electricity to the display panel. 15. The method of claim 14, And forming a liquid crystal layer before or after the upper and lower plates are bonded to each other. 15. The method of claim 14, Preparing the top plate is Forming the mask filter on the front surface of the upper plate; Forming an alignment layer on a rear surface of the upper plate, Forming the lower plate Forming a thin film transistor array including a plurality of signal lines and a thin film transistor on an insulating substrate; Forming a color filter array including a black matrix and a color filter on the thin film transistor array; Forming a pixel electrode connected to the thin film transistor on the color filter array, Before bonding the upper and lower plates, Forming a common electrode on a rear surface of the upper plate or forming a common electrode on the color filter array before forming the mask filter; Forming a spacer on the lower plate; And forming an alignment film on the lower plate. delete delete delete delete

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