KR101178344B1 - Back contact solar cell and method for fabricating the same - Google Patents

Abstract

PURPOSE: A back surface electrode type solar cell and a manufacturing method thereof are provided to minimize resistance losses by maximizing a contact area of a bus bar electrode and a finger line electrode. CONSTITUTION: A p-type doped layer(403) and an n-type doped layer(406) are formed on an inner back side of a substrate(401). A dielectric layer(408) is laminated on the back side of the substrate where the p-type doped layer and the n-type doped layer are included. An n-type finger line electrode(410) and a p-type finger line electrode(409) are respectively formed on the n-type doped layer and the p-type doped layer. An n-type bus bar electrode(413) is connected to the n-type finger line electrode. A p-type bus bar electrode(412) is connected to the p-type finger line electrode.

Description

Back contact solar cell and method of manufacturing the same {Back contact solar cell and method for fabricating the same}

The present invention relates to a back-electrode solar cell and a method for manufacturing the same, and more particularly, to a back-electrode solar cell and a method of manufacturing the same to suppress the recombination of minority carriers to improve the photoelectric conversion efficiency of the solar cell. will be.

A solar cell is a key element of photovoltaic power generation that directly converts sunlight into electricity, and is basically a diode composed of a p-n junction. In the process of converting sunlight into electricity by solar cells, when solar light enters into the silicon substrate of the solar cell, electron-hole pairs are generated, and electrons move to n layers and holes move to p layers by the electric field. Thus, photovoltaic power is generated between the pn junctions, and when a load or a system is connected to both ends of the solar cell, current flows to generate power.

On the other hand, a general solar cell has a structure in which a front electrode and a rear electrode are provided on the front and the rear, respectively, and as the front electrode is provided on the front surface, the light receiving area is reduced by the area of the front electrode. In order to solve the problem that the light receiving area is reduced, a back electrode solar cell has been proposed. The back electrode solar cell is characterized by maximizing the light receiving area of the solar cell by providing a (+) electrode and a (-) electrode on the back of the solar cell.

As shown in FIG. 1, the back electrode solar cell has a structure in which the p-type doping layer 102 and the n-type doping layer 103 are repeatedly arranged and disposed inside the back of the substrate 101, and the p-type doping layer ( 102 is connected to the p electrode 105 and the n-type doping layer 103 is connected to the n electrode 106. In this case, in order to prevent the p electrode 105 and the n electrode 106 from being short-circuited, a dielectric layer 104 is formed on the back surface of the substrate 101 and is selectively patterned to connect the doping layer and the electrode through the opening.

In such a back electrode solar cell, electrons (-) generated by photoelectric conversion inside the substrate 101 are moved to the n electrode 106 via the n-type doping layer 103, and the holes (+) It is moved to the p electrode 105 via the p-type doping layer 102. On the other hand, when the substrate 101 is an n-type silicon substrate 101, electrons are the major carriers and holes are the minor carriers, and electrons with the multiple carriers are the n-type doping layer 103. While stably collected through the n electrode 106, holes that are a minority carrier are likely to be recombined and disappear in the path collected through the p-type doping layer 102 and to the p electrode 105.

Specifically, holes (+), which are minority carriers generated inside the substrate 101, are recombined to contact the surface of the n-type doped layer 103 during movement (see ⓐ in FIG. 2), or the p-type doped layer 102. Even if the movement is successful, it disappears by combining with the surface defects existing on the back surface of the substrate 101 (see ⓑ of FIG. 2). The recombination of the minority carriers acts as a factor to lower the photoelectric conversion characteristics of the solar cell.

Meanwhile, referring to the back planar structure of the conventional back electrode solar cell, as shown in FIG. 3, the p-type doping layer (p +) 310 and the n-type doping layer (n +) 320 are engaged with each other in a comb-tooth shape. It is arranged in an interdigitated structure, and a doping layer for a bus bar is provided at both ends of the substrate. The p-type doping layer (p +) 310 and the n-type doping layer (n +) 320 having a comb tooth shape have a structure connected to the doping layers 350 and 360 for busbars located at both ends, respectively. Under such a structure, holes (+) collected by the p-type doping layer (p +) 310 are transferred to the p-type busbar 370 via the p-type fingerline 330, and the n-type doping layer (n +). Electrons (−) collected by the 320 are transferred to the n-type busbar 380 via the n-type fingerline 340 to perform photoelectric conversion of the solar cell.

However, the back electrode type solar cell having such a structure has a structure in which carriers collected from the fingerline are transferred to the busbar doping layer, so that the carrier transport distance is far, and the carrier in the process of being transferred from the fingerline to the busbar doping layer Are likely to disappear. In order to prevent this, the area of each doping layer p + (n +) and fingerline may be increased, but in this case, the collection efficiency of each doping layer p + (n +) from inside the substrate is deteriorated. . In addition, there is a problem that the carrier collection efficiency is lowered as much as the area provided with the bus bar doping layer.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object thereof is to provide a back electrode solar cell and a method of manufacturing the same, which can improve photoelectric conversion efficiency of a solar cell by suppressing recombination of minority carriers. .

In addition, an object of the present invention is to suppress the disappearance of the carrier by minimizing the carrier transport distance in the fingerline doping layer through the structure to omit the busbar doping layer. In addition, the present invention has another object to improve the carrier collection efficiency in the substrate by reducing the width of the fingerline doping layer, maximizing the number of fingerline doping layers disposed in the substrate. Another goal is to minimize resistive losses by maximizing contact area.

In order to achieve the above object, a back electrode solar cell according to the present invention includes an n-type crystalline silicon substrate, a p-type doping layer and an n-type doping layer, which are alternately repeated and arranged inside the rear surface of the substrate, and the p-type A dielectric layer stacked on a back surface of the substrate including a doping layer and an n-type doping layer, an n-type fingerline electrode and a p-type fingerline electrode formed on the n-type doping layer (n +) and p-type doping layer (p +), respectively; And a plurality of insulating masks formed on the n-type fingerline electrode and the p-type fingerline electrode and spaced apart in the length direction of the n-type and p-type fingerline, respectively. The horizontal region (first horizontal region) and the horizontal region (second horizontal region) including the insulating masks of the p-type fingerline electrodes do not overlap each other, and the n-type fingerline electrode is disposed on the first horizontal region. N connected with A bus bar electrode is provided, and a p-type bus bar electrode connected to a p-type fingerline electrode is provided on the second horizontal region, and an interface between the p-type doping layer or the n-type doping layer and the inside of the substrate is provided at a first interface. The surface of the back surface of the substrate is a second interface, the surface area of the p-type doping layer at the first interface is larger than the surface area of the n-type doping layer, the surface area of the n-type doping layer at the second interface is p-type It is characterized by being larger than the surface area of the doped layer.

Some regions of the p-type doping layer and the n-type doping layer overlap each other, in which the p-type doping layer is provided on the upper portion, the n-type doping layer is provided on the lower portion, and the p-type doping layer is formed at the first interface. The type doping layer forms a horizontally expanded form, and the n-type doping layer forms a form of horizontally expanded at the second interface.

Each of the n-type doped layer n + and the p-type doped layer p + is formed from one end of the substrate to the other end. In addition, only n-type fingerline electrodes are selectively exposed by the insulating mask in the first horizontal area to be connected to an n-type busbar electrode, and only p-type fingerline electrodes are formed by the insulating mask in the second horizontal area. This is selectively exposed to connect with the p-type busbar electrode.

The width D ₂ of the n-type busbar electrode and the p-type busbar electrode is smaller than the width D ₁ of the insulating mask, and the line width of each of the n-type and p-type fingerline electrodes is n-type. It is equal to or smaller than the line width of the doped layer (n +) and p-type doped layer (p +).

Method of manufacturing a back-electrode solar cell according to the present invention comprises the steps of preparing an n-type crystalline silicon substrate, applying a p-type doping source at a predetermined interval on the back of the substrate, and heat-treating the substrate, Forming a diffusion byproduct layer on the p-type doping layer and forming a diffusion byproduct layer on the p-type doping layer and removing a portion of the diffusion by-product layer in the rear surface of the substrate. Exposing a portion of the region, and applying an n-type doping source on the entire surface of the back surface of the substrate, followed by heat treatment to form an n-type doping layer on the back surface of the substrate where the first p-type doping source is not applied. And partially converting a portion of the p-type doped layer exposed by partially removing the diffusion byproduct layer to an n-type doped layer, forming a dielectric layer on the back surface of the substrate, and forming the n-type doped layer (n +). And p-type Forming an n-type fingerline electrode and a p-type fingerline electrode electrically connected to the doping layer p +, respectively, and lengths of the n-type and p-type fingerline on the n-type fingerline electrode and the p-type fingerline electrode And forming a plurality of insulating masks along the direction, the horizontal region including the insulating masks of each n-type fingerline electrode (first horizontal region) and the insulating masks of each p-type fingerline electrode. The horizontal regions (second horizontal regions) are different from each other and do not overlap each other, and form an n-type busbar electrode connected to an n-type fingerline electrode on the first horizontal region and on the second horizontal region. and forming a p-type busbar electrode connected to the p-type fingerline electrode.

The area A _{1 to} which the p-type doping source is applied is larger than the area of the area where the p-type doping source is not doped.

Forming an n-type fingerline electrode and a p-type fingerline electrode electrically connected to the n-type doping layer (n +) and the p-type doping layer (p +), respectively, the n-type and p-type doping layer (n +) applying a conductive paste on the dielectric layer corresponding to the (p +) region; firing the conductive paste to form n-type and p-type fingerline electrodes; and a metal material of the conductive paste penetrates through the dielectric layer to form n-type and and a process of electrically connecting the p-type doped layer (n +) (p +).

The forming of the n-type fingerline electrode and the p-type fingerline electrode electrically connected to the n-type doping layer (n +) and the p-type doping layer (p +), respectively, may include etching and removing a portion of the dielectric layer. Exposing the n-type doping layer (n +) and the p-type doping layer (p +), and depositing a metal material on the exposed n-type and p-type doping layers (n +) (p +) to form an n-type fingerline electrode and and forming a p-type fingerline electrode.

The back electrode solar cell and a method of manufacturing the same according to the present invention have the following effects.

Maximizing the area of the p-type doped layer and minimizing the area of the n-type doped layer in the n-type substrate may increase the probability that holes, which are minority carriers, are collected into the p-type doped layer. In addition, by minimizing the p-type doped layer exposed on the surface of the back surface of the substrate, it is possible to suppress the recombination of the holes by the surface defects.

In addition, since the bus bar doping layer as in the prior art is not required, a finger line doping layer may be formed in a region where the bus bar doping layer is to be formed, thereby improving carrier collection efficiency.

As the busbar electrode is provided on the fingerline electrode, the area of the busbar electrode can be enlarged without consideration of the busbar doping layer, thereby improving the electrical characteristics between the busbar electrode and the fingerline electrode. . As such, as the electrical characteristics of the busbar electrode are improved, the pattern width of the fingerline doping layer may be minimized, thereby increasing the carrier collection efficiency in the substrate.

1 is a cross-sectional view of a back electrode solar cell according to the prior art.
2 is a reference diagram for explaining a factor of the minority carrier recombination in the back-electrode solar cell according to the prior art.
Figure 3 is a rear view of a back electrode solar cell according to the prior art.
Figure 4 is a block diagram of a back electrode solar cell according to an embodiment of the present invention.
5 is a reference diagram for explaining the movement path of the minority carrier in the back-electrode solar cell according to an embodiment of the present invention.
6A to 6K are cross-sectional views illustrating a method of manufacturing a back electrode solar cell according to an embodiment of the present invention.

Hereinafter, a back electrode solar cell and a method of manufacturing the same according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings. 4 is a configuration diagram of a back electrode solar cell according to an embodiment of the present invention.

Referring to FIG. 4, a back electrode solar cell according to an embodiment of the present invention first includes a crystalline silicon substrate 401 of a first conductivity type. In this case, the first conductivity type is the opposite conductivity type to the second conductivity type, hereinafter, the first conductivity type will be described based on the n type and the second conductivity type p.

The p-type doping layer 403 and the n-type doping layer 406 are repeatedly disposed in the rear surface of the n-type silicon substrate 401. Each of the p-type doping layer 403 and the n-type doping layer 406 is formed to a predetermined depth from the surface of the back surface of the substrate 401 to the inside of the substrate 401, and for convenience of description, the p-type doping layer is in contact with the inside of the substrate 401. The surface of the doping layer 403 (or n-type doping layer 406) is referred to as the first interface, and the p-type doping layer 403 (or n-type doping layer 406) exposed to the surface of the back surface of the substrate 401. The surface of) will be referred to as a second interface.

In the present invention, the p-type doping layer 403 and the n-type doping layer 406 is characterized in that the surface area is different from each other according to the first interface and the second interface. Specifically, the surface area of the p-type doped layer 403 is larger than the n-type doped layer 406 in the case of the first interface, and the surface area of the n-type doped layer 406 is the p-type doped layer 403 in the case of the second interface. Is greater than the surface area. As described above, by increasing the surface area of the p-type doped layer 403 and the surface area of the n-type doped layer 406 relatively small at the first interface, a small number of carriers, that is, holes, in the substrate 401 are firstly formed. While suppressing recombination at the surface of the n-type doped layer 406 at the interface, it is possible to improve the probability that holes can be collected into the p-type doped layer 403.

Further, the p-type doping layer 403 and the n-type doping layer 406 are adjacently repeated and disposed, and the p-type doping layer 403 and the n-type doping according to the first and second interfaces as described above. In order to satisfy that the layer 406 has different surface areas, some regions of the p-type doped layer 403 and the n-type doped layer 406 have an overlapping structure. That is, in a case where the p-type doping layer 403 and the n-type doping layer 406 are repeatedly arranged, the p-type doping layer 403 is provided on the upper part and the n-type doping layer 406 on the lower part. It has a structure provided. Accordingly, the p-type doped layer 403 extends horizontally at the first interface, and the n-type doped layer 406 extends horizontally at the second interface. As such, as the n-type doped layer 406 extends horizontally at the second interface, the area where the p-type doped layer 403 contacts the surface of the back surface of the substrate 401 is minimized. Holes that are minority carriers can be prevented from recombining with surface defects on the back surface of the substrate 401 (see FIG. 5).

To summarize the structure and effects thereof of the p-type doping layer 403 and the n-type doping layer 406 as described above, 1) the surface area of the p-type doping layer 403 at the first interface is n-type doping layer ( It is possible to suppress the recombination of holes in the n-type substrate 401 to the surface of the n-type doping layer 406 by making it relatively larger than the surface area of the 406, 2) the n-type doping layer 406 at the second interface The surface area of the p-type doping layer 403 is made larger than the surface area of the p-type doping layer 403, thereby ultimately minimizing the area where the p-type doping layer 403 contacts the surface of the back surface of the substrate 401. Recombination with surface defects on the back surface of the substrate 401 may be minimized.

Meanwhile, a dielectric layer 408 is provided on the back surface of the substrate 401 including the p-type doping layer 403 and the n-type doping layer 406. In addition, an n-type fingerline electrode 410 and a p-type fingerline electrode 409 are provided, and the n-type fingerline electrode 410 includes an n-type doping layer 406 (n +) and the p-type fingerline The electrode 409 is electrically connected to the p-type doped layer 403 (n +). In this case, the line width of each of the p-type and n-type fingerline electrodes 409 and 410 is the same as that of the n-type doping layer 406 (n +) and the p-type doping layer 403 (p +). It must be smaller than that.

An insulating mask 411 is locally provided on the n-type fingerline electrode 410 and the p-type fingerline electrode 409. Specifically, an insulating mask 411 having a predetermined area on the n-type fingerline electrode 410 and the p-type fingerline electrode 409 is n-type fingerline electrode 410 and p-type fingerline electrode 409. Is provided at regular intervals along the longitudinal direction of the. The insulating masks 411 of the n-type fingerline electrodes 410 are repeatedly arranged and arranged in the horizontal direction, and the insulating masks 411 of the p-type fingerline electrodes 409 are also arranged in the horizontal direction. It forms a structure that is repeated and arranged.

In addition, a horizontal area (second horizontal area B) including the insulating masks 411 of each n-type fingerline and a horizontal area (first horizontal area A) including the insulating masks 411 of each p-type fingerline ) Are different from each other and do not overlap. Accordingly, only n-type fingerline electrodes 410 are exposed in the second horizontal region B, and only p-type fingerline electrodes 409 are exposed in the first horizontal region A. FIG.

An n-type busbar electrode 413 is provided on the second horizontal area B to be electrically connected to the n-type fingerline electrodes 410 exposed in the second horizontal area, and the first horizontal area A is provided. The p-type busbar electrode 412 is provided to be electrically connected to the exposed p-type fingerline electrodes 409. In this case, the width D ₂ of the n-type busbar electrode 413 and the p-type busbar electrode 412 should be smaller than the width D ₁ of the insulating mask 411.

In the back-electrode solar cell according to the present invention, it can be seen that the bus bar doping layer of the prior art is not provided, and the n-type doping layer 406 (n +) is also provided in the region where the busbar doping layer is provided. The p-type doped layer 403 (p +) is provided. Accordingly, carriers (+) (−) can be collected in all regions of the substrate 401, and cell efficiency can be improved.

In addition, since the p-type and n-type busbar electrodes 412 and 413 are provided on the p-type and n-type fingerline electrodes 409 and 410 without the need for a busbar doping layer, the busbar electrodes It is possible to selectively enlarge the area of the electrode, thereby maximizing the contact area between the busbar electrode and the fingerline electrode, thereby improving the electrical characteristics between the busbar electrode and the fingerline electrode. This busbar electrode is in contact with the structure (see FIG. 3). In addition, since the busbar electrode is directly provided on the fingerline electrode, there is no need to use a conductive paste containing a glass frit as in the prior art, and the busbar electrode may be formed only of a metal material having a low specific resistance. The resistance characteristics of the busbar electrodes can be improved.

As such, as the electrical characteristics of the busbar electrode are improved, there is room for reducing the widths of the n-type doping layer 406 (n +) and the p-type doping layer 403 (p +), and thus the inside of the substrate 401. By reducing the collecting distance of the carrier to be collected in the doped layer (n +) (p +) in the it is possible to increase the collection efficiency.

Next, a method of manufacturing a back electrode solar cell according to an embodiment of the present invention will be described. On the other hand, the back electrode solar cell according to the present invention is characterized in the structure of the doping layer, finger line and bus bar provided on the back of the substrate 401, the structure (doping layer, finger provided on the back of the substrate 401) Lines and bus bars) will be described below, and detailed description of the structure formed on the entire surface of the substrate 401 will be omitted. Therefore, the manufacturing process for the components required for the back electrode solar cell in addition to the doped layer, finger line and bus bar can be selectively applied.

First, as shown in FIG. 6A, an n-type crystalline silicon substrate 401 is prepared. Then, a doping source including p-type impurities (for example, boron (B)) is applied on the rear surface of the substrate 401 at a predetermined interval. At this time, the region A ₁ to which the doping source containing the p-type impurity (hereinafter referred to as p-type doping source 402) is applied is the region A ₂ to which the p-type doping source 402 is not applied. The area must be greater than (A ₁ 〉 A ₂ ). The p-type doping source 402 may be applied in the form of a paste or spray, or may be deposited by a deposition method such as chemical vapor deposition (PECVD) or atmospheric vapor deposition (APCVD). In addition, the p-type ion implantation layer may be formed using an ion implantation method inside the substrate in the region where the p-type doping source 402 is to be applied without applying the p-type doping source 302.

In the state where the p-type doping source 402 is applied, when the heat treatment is performed, the p-type doping layer 403 is formed at a predetermined interval inside the rear surface of the substrate 401, and each p on the rear surface of the substrate 401 is formed. On the type doping layer 403, a BSG (boro-silicate glass) film 404, which is a diffusion byproduct, is formed (FIG. 6B). The BSG film 404 is formed by the reaction of the p-type impurity (B) in the p-type doping source 402 with the silicon (Si) of the substrate 401. On the other hand, when the p-type ion implantation layer is formed in place of the p-type doping source, the BSG film may be formed on the p-type ion implantation layer by heat treatment under an oxidizing atmosphere.

In this state, a portion of the BSG film 404 is selectively removed to expose a portion of the p-type doped layer 403 (see FIG. 6C). Then, a doping source containing n-type impurities (for example, phosphorus (P)) on the entire surface of the back surface of the substrate 401 including the BSG film 404 (hereinafter, n-type doping source 405 ) Is applied (see FIG. 6D), and heat treatment is performed. Similar to the p-type doping source 402, the n-type doping source 405 may be applied in the form of a paste or spray, or may be deposited by a deposition method such as chemical vapor deposition (PECVD) or atmospheric vapor deposition (APCVD). The n-type ion implantation layer may be formed using an ion implantation method inside the substrate in the region where the n-type doping source 405 is to be applied without applying the n-type doping source 05.

Accordingly, the n-type dopant layer 406 is formed by diffusing n-type impurities in the back surface of the substrate 401 in the region A ₂ to which the p-type doping source 402 is not applied (see FIG. 6E). In addition, n-type impurities are also diffused in the p-type doping layer 403 from which the BSG film 404 is partially removed, so that the p-type doping layer 403 near the surface of the back surface of the substrate 401 has an n-type doping layer ( 406, the p-type doped layer 403 located relatively far from the surface of the backside of the substrate 401 remains intact.

As a result, in the case where the BSG film 404 is removed, an n-type doping layer 406 is formed near the surface of the back surface of the substrate 401, and a p-type doping layer 403 is formed thereunder. The n-type doped layer 406 and the p-type doped layer 403 overlap with each other in a vertical structure. On the other hand, a PSG film 407, which is a diffusion byproduct layer, is formed on the n-type doping layer 406. If the PSG film 407 and the remaining BSG film 404 are removed, the p-type according to an embodiment of the present invention is removed. The structures of the doped layer 403 and the n-type doped layer 406 are completed (see FIG. 6F). In this case, the PSG film 407 and the remaining BSG film 404 may be used as the dielectric layer 408 to be described later without removing the PSG film 407 and the remaining BSG film 404.

Looking at the structure of the completed p-type doping layer 403 and n-type doping layer 406, the p-type doping layer 403 and the n-type doping layer 406 is arranged adjacent to each other and overlapping, At one interface (the interface between the doping layer and the substrate 401), the p-type doping layer 403 is expanded, and at the second interface (the surface of the back surface of the substrate 401), the n-type doping layer 406 is formed. You can see that this is an extended form.

In the state where the p-type doping layer 403 and the n-type doping layer 406 are formed, the dielectric layer 408 is formed on the entire back surface of the substrate 401 as shown in FIG. 6G. The dielectric layer 408 selectively blocks a short between a bus bar formed through a subsequent process and the n-type doped layer 406 (n +) or the p-type doped layer 403 (p +). do. In addition, the dielectric layer 408 may be formed using a chemical vapor deposition process, a physical vapor deposition process, thermally grown silicon oxide layer, atomic layer deposition (SiO2). , Silicon nitride film (SiNx), aluminum oxide film (Al2O3), silicon carbide film (SiC), or an oxide-based or non-oxide dielectric material, and may be composed of a double or multi-layer structure.

In this state, the n-type fingerline electrode 410 and the p-type fingerline electrode 409 electrically connected to the n-type doping layer 406 (n +) and the p-type doping layer 403 (p +), respectively. To form (see FIG. 6I). The n-type fingerline electrode 410 and the p-type fingerline electrode 409 may be formed using two methods.

In the first method, a portion of the dielectric layer 408 is etched and removed while the dielectric layer 408 is stacked to expose an n-type doping layer 406 (n +) and a p-type doping layer 403 (p +). (See FIG. 6H), a metal material is deposited on the exposed n-type doped layer 406 (n +) and p-type doped layer 403 (p +) (see FIG. 6I) to form an n-type fingerline electrode 410 and The p-type finger line is completed. In this case, the metal material may be laminated using screen printing or the like.

Meanwhile, in etching and removing a portion of the dielectric layer 408, only a part of the doping layer may be exposed in addition to the method of exposing all of the doping layers n + and p + as shown in FIG. 6H. In this case, the dielectric layer 408 may be selectively etched so that an exposure pattern having a predetermined shape is repeated. In detail, the dielectric layer 408 is etched and removed to repeat a unit pattern having a circular, square, or oval shape. And a portion of the n-type doped layer 406 (n +) (p +) may be selectively exposed. Accordingly, the fingerline electrode has a structure connected to the partially exposed doped layer (n +) (p +).

The second method is as follows. Screen printing a conductive paste on the dielectric layer 408 and then firing the metal component in the conductive paste through the dielectric layer 408 to fire-through the p-type and n-type fingerline electrodes 409. The n-type fingerline electrode 410 is connected to the n-type doping layer 406 (n +) and the p-type fingerline electrode 409 is a p-type doping layer 403 (p +). ), As shown in FIG. 6I.

With the n-type fingerline electrode 410 and the p-type fingerline electrode 409 formed, a local insulating mask 411 is locally applied on the n-type fingerline electrode 410 and the p-type fingerline electrode 409. Laminated.

Specifically, as shown in FIG. 6J, an insulating mask 411 having a predetermined area is formed on the n-type fingerline electrode 410 at a predetermined interval, and the same on the p-type fingerline electrode 409. The insulating mask 411 is formed at regular intervals. At this time, the insulating mask 411 provided in each n-type fingerline electrode 410 and the insulating mask 411 provided in each p-type fingerline electrode 409 have the same horizontal position. In this case, the horizontal position refers to a position in a direction perpendicular to the length direction of the n-type or p-type fingerline electrode 409. Hereinafter, the region where the insulating masks 411 are repeatedly arranged and arranged in the horizontal direction is horizontal. This is called an area.

Meanwhile, a region (second horizontal region B) including insulation masks 411 provided in the horizontal direction in each of the n-type fingerline electrodes 410 is provided in the horizontal direction in each of the p-type fingerline electrodes 409. The region including the insulating masks 411 (the first horizontal region A) has different regions. That is, the first horizontal region and the second horizontal region do not overlap each other. Accordingly, only n-type fingerline electrodes 410 are exposed in the second horizontal region B, and only p-type fingerline electrodes 409 are exposed in the first horizontal region A. FIG.

In this state, as shown in FIG. 6K, the conductive paste is applied on the first horizontal area A and the second horizontal area B, and then heat-treated to form the n-type busbar in the second horizontal area B. FIG. An electrode 413 is formed, and a p-type busbar electrode 412 is formed in the first horizontal region A. As only the n-type fingerline electrodes 410 are exposed and repeatedly disposed in the first horizontal region A, the n-type busbar electrode 413 is electrically connected to only the n-type fingerline electrodes 410. The p-type busbar electrode 412 is electrically connected to the p-type fingerline electrodes 409 as only the p-type fingerline electrodes 409 are exposed and repeatedly arranged in the second horizontal region B. To form a connected state. Meanwhile, the width D ₂ of the n-type busbar electrode 413 and the p-type busbar electrode 412 should be smaller than the width of the insulating mask 411. When the width of the busbar electrode is larger than the width D ₁ of the insulating mask 411, different conductive types (<n-type busbar electrode 413 and p-type fingerline electrode 409> or <p-type bus) This is because the bar electrode 412 and the n-type fingerline electrode 410 are short-circuited.

401: n-type substrate 402: p-type doping source
403 p-type doping layer 404 BSG film
405: n-type doping source 406: n-type doping layer
407 PSG film 408 dielectric layer
409: p-type fingerline electrode 410: n-type fingerline electrode
411: insulating mask 412: p-type busbar electrode
413 n-type busbar electrode

Claims (17)

n-type crystalline silicon substrate;
A p-type doping layer and an n-type doping layer which are alternately repeated and disposed inside the rear surface of the substrate;
A dielectric layer stacked on a back surface of the substrate including the p-type and n-type doped layers;
An n-type fingerline electrode and a p-type fingerline electrode respectively formed on the n-type doped layer (n +) and the p-type doped layer (p +); And
Comprising a plurality of insulating masks formed on the n-type finger line electrode, p-type finger line electrode spaced apart in the longitudinal direction of the n-type and p-type fingerline,
The horizontal area (first horizontal area) including the insulating masks of each n-type fingerline electrode and the horizontal area (second horizontal area) including the insulating masks of each p-type fingerline electrode do not overlap each other.
An n-type busbar electrode connected to the n-type fingerline electrode is provided on the first horizontal region, and a p-type busbar electrode connected to the p-type fingerline electrode is provided on the second horizontal region,
The interface between the p-type doping layer or the n-type doping layer and the inside of the substrate is a first interface,
The surface of the back of the substrate is a second interface,
The surface area of the p-type doped layer at the first interface is larger than the surface area of the n-type doped layer, and the surface area of the n-type doped layer at the second interface is larger than the surface area of the p-type doped layer. Solar cells.
The method of claim 1, wherein a portion of the p-type doping layer and the n-type doping layer has an overlapping structure, the p-type doping layer is provided on the upper portion, the n-type doping layer is provided on the lower portion,
The p-type doped layer forms a horizontally extended form at the first interface, and the n-type doped layer forms a horizontally expanded form at the second interface.
The back electrode solar cell of claim 1, wherein each of the n-type doped layer (n +) and the p-type doped layer (p +) is formed from one end of the substrate to the other end.
The semiconductor device of claim 1, wherein only n-type fingerline electrodes are selectively exposed by the insulating mask in the first horizontal area, and are connected to an n-type busbar electrode, and p-type by the insulating mask in the second horizontal area. A back electrode type solar cell, wherein only fingerline electrodes are selectively exposed to be connected to a p-type busbar electrode.
The back electrode solar cell of claim 1, wherein a width D ₂ of the n-type bus bar electrode and the p-type bus bar electrode is smaller than a width D ₁ of the insulating mask.
The line width of each of the n-type finger line electrode and the p-type finger line electrode is the same or smaller than the line width of the n-type doping layer (n +), p-type doping layer (p +). Back-electrode solar cell.
preparing an n-type crystalline silicon substrate;
Applying a p-type doping source at regular intervals on the back side of the substrate;
Heat-treating the substrate to form a p-type doped layer spaced apart and repeated inside the rear surface of the substrate and to form a diffusion byproduct layer on the p-type doped layer;
Removing a portion of the diffusion byproduct layer to expose a portion of the p-type doped layer;
By applying an n-type doping source on the entire surface of the back of the substrate and then heat treatment,
Forming an n-type doping layer on the back side of the substrate where the first p-type doping source is not applied, and partially removing the diffusion byproduct layer to convert a portion of the exposed p-type doping layer into an n-type doping layer;
Forming a dielectric layer on the back side of the substrate;
Forming an n-type fingerline electrode and a p-type fingerline electrode electrically connected to the n-type doping layer (n +) and the p-type doping layer (p +), respectively; And
And forming a plurality of insulating masks along the length direction of the n-type and p-type fingerlines on the n-type fingerline electrode and the p-type fingerline electrode.
The horizontal area (first horizontal area) including the insulating masks of each n-type fingerline electrode and the horizontal area (second horizontal area) including the insulating masks of each p-type fingerline electrode are different from each other and do not overlap each other. ,
Forming an n-type busbar electrode connected to the n-type fingerline electrode on the first horizontal region and forming a p-type busbar electrode connected to the p-type fingerline electrode on the second horizontal region. Method of manufacturing a back-electrode solar cell characterized in that it further comprises.
The method of claim 7, wherein the interface between the p-type doping layer or the n-type doping layer and the inside of the substrate is a first interface, the surface of the back surface of the substrate is a second interface,
The surface area of the p-type doped layer at the first interface is larger than the surface area of the n-type doped layer, and the surface area of the n-type doped layer at the second interface is larger than the surface area of the p-type doped layer. Manufacturing method of solar cell.
The method of claim 7, wherein the area of the region (A ₁ ) to which the p-type doping source is applied is larger than the area of the region where the p-type doping source is not doped.
The method of claim 7, wherein a portion of the p-type doped layer and the n-type doped layer have an overlapping structure, in which the p-type doped layer is provided on the upper portion, and the n-type doped layer is provided on the lower portion.
The p-type doped layer forms a horizontally extended form at the first interface, the n-type doped layer forms a horizontally expanded form at the second interface.
The method of claim 7, wherein each of the n-type doped layer (n +) and the p-type doped layer (p +) is formed from one end of the substrate to the other end.
8. The semiconductor device of claim 7, wherein only n-type fingerline electrodes are selectively exposed by the insulating mask in the first horizontal area to be connected to an n-type busbar electrode, and the p-type is connected by the insulating mask in the second horizontal area. A method of manufacturing a back-electrode solar cell, wherein only the fingerline electrodes are selectively exposed and connected to the p-type busbar electrode.
The method of claim 7, wherein the forming of the n-type fingerline electrode and the p-type fingerline electrode electrically connected to the n-type doping layer (n +) and the p-type doping layer (p +), respectively,
Applying a conductive paste on a dielectric layer corresponding to the n-type and p-type doped layer (n +) (p +) regions;
Firing the conductive paste to form n-type and p-type fingerline electrodes and allowing the metal material of the conductive paste to be electrically connected to the n-type and p-type doped layers (n +) (p +) through the dielectric layer. Method of manufacturing a back-electrode solar cell, characterized in that comprising a.
The method of claim 7, wherein the forming of the n-type fingerline electrode and the p-type fingerline electrode electrically connected to the n-type doping layer (n +) and the p-type doping layer (p +), respectively,
Etching and removing a portion of the dielectric layer to expose an n-type doped layer (n +) and a p-type doped layer (p +),
Forming an n-type fingerline electrode and a p-type fingerline electrode by laminating a metal material on the exposed n-type and p-type doped layers (n +) (p +). Method for producing a battery.
The method of claim 7, wherein the width D ₂ of the n-type busbar electrode and the p-type busbar electrode is smaller than the width D ₁ of the insulating mask.
The line width of each of the n-type fingerline electrode and the p-type fingerline electrode is formed to be the same as or smaller than that of the n-type doping layer (n +) and the p-type doping layer (p +). Method for producing a back-electrode solar cell, characterized in that.
The method of claim 7, wherein the p-type doping source or the n-type doping source is applied in the form of a paste or spray or deposited by chemical vapor deposition.

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