KR101171733B1 - Packing Materials of Semiconductor Integrated Circuit for Single Type Package which Contains Tungsten Compounds - Google Patents

Packing Materials of Semiconductor Integrated Circuit for Single Type Package which Contains Tungsten Compounds Download PDF

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KR101171733B1
KR101171733B1 KR1020090082956A KR20090082956A KR101171733B1 KR 101171733 B1 KR101171733 B1 KR 101171733B1 KR 1020090082956 A KR1020090082956 A KR 1020090082956A KR 20090082956 A KR20090082956 A KR 20090082956A KR 101171733 B1 KR101171733 B1 KR 101171733B1
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integrated circuit
semiconductor integrated
tungsten
encapsulant
thermal expansion
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KR20090100330A (en
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박영웅
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박영웅
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Priority to PCT/KR2010/005973 priority patent/WO2011028042A2/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293Organic, e.g. plastic
    • H01L23/295Organic, e.g. plastic containing a filler
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/552Protection against radiation, e.g. light or electromagnetic waves
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

본 발명은 반도체 집적회로(Integrated Circuit)를 보호하기 위한 일체형 패키지의 봉지재(Packing Material)에 대한 기술로써, 에폭시 몰딩 컴파운드(EMC)의 주재료로 WO3, FeWO4, MnWO4, CaWO4, CuWO4, WC, W2C, WB, WB2, WS2, WS3, WSi2, 8Ta2O5-18WO3, Ta2O5-WO3, 11Ta2O5-4WO3 와 같은 텅스텐 화합물을 사용하여, 집적회로 내부에서 발생하는 열 충격 및 외부의 핵전자기파 공격으로부터 반도체 집적회로를 보호할 수 있도록 하였다.The present invention relates to a sealing material of an integrated package for protecting a semiconductor integrated circuit (WO3, FeWO4, MnWO4, CaWO4, CuWO4, WC, W2C) as a main material of an epoxy molding compound (EMC). Tungsten compounds such as WB, WB2, WS2, WS3, WSi2, 8Ta2O5-18WO3, Ta2O5-WO3, 11Ta2O5-4WO3 to protect semiconductor integrated circuits from thermal shocks and external nuclear electromagnetic wave attacks I could do it.

반도체, 집적회로, 봉지재, 패키지, 열팽창계수, 열전도도, 핵전자기파Semiconductor, integrated circuit, encapsulant, package, coefficient of thermal expansion, thermal conductivity, nuclear electromagnetic wave

Description

텅스텐화합물을 함유하는 일체형 패키지를 위한 반도체 집적회로의 봉지재 {Packing Materials of Semiconductor Integrated Circuit for Single Type Package which Contains Tungsten Compounds}Packing materials of semiconductor integrated circuit for single type package which contains tungsten compounds

본 발명은 전자장비의 핵심부품에 해당하는 반도체 집적회로(Integrated Circuit)를 보호하기 위한 일체형 패키지의 봉지재(Packing Material)에 대한 기술로써, 패키지 내부에서 발생하는 열 충격 및 외부의 핵전자기파 공격으로부터 집적회로를 보호하기 위한 기술에 해당한다.The present invention relates to a sealing material of an integrated package for protecting a semiconductor integrated circuit, which is a core component of electronic equipment, and is a technology for preventing thermal shock and external nuclear electromagnetic waves from occurring inside a package. Corresponds to the technology for protecting integrated circuits.

반도체 집적기술은 하루가 다르게 발전하고 있으며, 소규모집적회로(SSI), 중규모집적회로(MSI), 대규모집적회로(LSI), 초대규모집적회로(VLSI), 극초집적회로(ULSI) 수준으로 발전하고 있다. 반도체 집적회로는 집적도에 비례하여 열 충격이나 진동 등 주변환경에 의한 영향으로 인하여 고장이 발생할 확률이 커진다고 할 수 있으며 특히, 수십 킬로미터 이상의 상공에서 원자폭탄이 폭발하는 경우 지상에 위치한 전자장비가 고장을 일으키는 주된 이유가 전자기파에 의한 반도체 집적회로의 손상 때문이라는 것이 보고된 바 있다. 본 발명에서는 반도체 집적회로의 패키지에 있어서, 회로 내부에서 발생하는 열 충격을 최소화하고 이와 동시에 핵전자기파를 차폐하기 위한 기능을 부여할 수 있는 봉지재를 소개하고자 하며, 열 충격을 최소화하기 위한 봉지재 기술은 이미 많이 소개된 바 있으므로 생략하고 핵전자기파의 차폐원리를 간략하게 설명하면 다음과 같다.Semiconductor integrated technology is developing differently every day, and it is being developed to small integrated circuit (SSI), medium integrated circuit (MSI), large integrated circuit (LSI), ultra large integrated circuit (VLSI), ultra integrated circuit (ULSI). have. Semiconductor integrated circuits have a higher probability of failure due to the influence of surrounding environment such as heat shock or vibration, in proportion to the degree of integration.In particular, when an atomic bomb explodes over several tens of kilometers, ground-based electronic equipment may fail. It has been reported that the main reason for this is due to damage to the semiconductor integrated circuit by electromagnetic waves. In the present invention, in a package of a semiconductor integrated circuit, it is intended to introduce an encapsulant that can impart a function for minimizing thermal shock generated inside the circuit and at the same time shielding nuclear electromagnetic waves, and an encapsulant for minimizing thermal shock. Since the technology has already been introduced a lot, briefly explaining the shielding principle of nuclear electromagnetic waves as follows.

핵 폭발시 방출하는 총 에너지의 약 5%는 7MeV의 즉발감마선(Prompt Gamma Rays)의 형태로 방출하며 약 10%는 6MeV의 지발감마선(Delayed Gamma Rays)으로 방출하는데, 핵 폭발 후 초기에 생성하는 이런 고에너지의 감마선은 지상으로 도달하는 과정에서 공기분자와 전자쌍생성, 컴프턴산란 및 광전효과를 포함한 기타 상호작용을 통하여 그 에너지가 점차 낮아지게 되므로, 지표면에서 관찰할 수 있는 전자기파는 수백킬로 전자볼트 이하의 에너지 분포를 갖게 될 것이라고 예측할 수 있다(공개특허 10-2009-0089836). 본 발명에서는 핵 폭발 초기에 방출되는 6MeV 이상의 감마선 및 1GHz 이하에 해당되는 일반적으로 알려진 전자기파와 구분하기 위하여, 수백킬로 전자볼트 이하의 전자기파 방사선을 핵전자기파라(NEMP, Nuclear Electromagnetic Pulse)고 정의하였다.About 5% of the total energy released during a nuclear explosion is in the form of 7 MeV of prompt Gamma Rays, and about 10% is emitted in 6MeV of Delayed Gamma Rays, which are generated early after the nuclear explosion. As these high energy gamma rays reach the ground, their energy is gradually lowered through other interactions including air molecules and electron pairing, compton scattering, and photoelectric effects. It can be expected to have an energy distribution of less than volts (Patent 10-2009-0089836). In the present invention, in order to distinguish from gamma rays of 6MeV or more and general electromagnetic waves corresponding to 1 GHz or less, which are emitted at the beginning of a nuclear explosion, electromagnetic radiation of several hundred kilo electron volts or less is defined as Nuclear Electromagnetic Pulse (NEMP).

핵전자기파로부터 전자장비를 보호하기 위한 기존의 방법이라 하면, 알루미늄 호일 등 전도성 물질로 감싸거나 전자장비가 위치한 주변의 벽을 고밀도 차폐벽돌로 보강하는 방법이 제시되어 있으나, 전자의 경우에는 그 효과가 입증되었다고 할 수 없으며 후자의 경우는 비용이 많이 드는 방법에 해당된다고 할 수 있다. 일반적으로 반도체 집적회로는 '도4'와 같이 일체형 패키지의 형태로 보호하고 있으므로 봉지재의 성분에 원자번호가 높은 중금속 성분을 첨가한다면 핵전자기파로부터 발생하는 문제는 쉽게 해결될 수 있을 것이라 여겨지지만, 봉지재가 갖추어야 할 요구조건들을 고려해야 하는 문제점에 봉착할 수 있다.Conventional methods for protecting electronic equipment from nuclear electromagnetic waves have been proposed, such as wrapping with a conductive material such as aluminum foil or reinforcing the wall around the electronic equipment with a high-density shielding brick. It can't be proven, and the latter is an expensive method. In general, since semiconductor integrated circuits are protected in the form of an integrated package as shown in FIG. 4, if a heavy metal component having a high atomic number is added to the components of the encapsulation material, the problems arising from nuclear electromagnetic waves may be easily solved. One can face the problem of considering the requirements of the ashes.

본 발명에서 해결해야 할 과제는, 반도체 웨이퍼(Wafer)의 열팽창계수에 가장 근접한 열팽창계수, 높은 열전도도 및 낮은 유전율(dielectric constant) 등 일체형 패키지의 봉지재가 갖추어야 할 요구조건을 만족하면서 핵전자기파 방사선을 차폐하는 기능을 추가한 집적회로의 봉지재를 구현하는 것이다. The problem to be solved in the present invention is to provide nuclear electromagnetic radiation while satisfying the requirements of the encapsulant of the integrated package, such as the thermal expansion coefficient closest to the thermal expansion coefficient of the semiconductor wafer, high thermal conductivity and low dielectric constant (dielectric constant). An encapsulant of an integrated circuit having a shielding function is implemented.

일체형 패키지의 봉지재에 있어서 가장 중요한 특성 중의 하나는 열팽창계수인데, 혼합물에 있어서의 열팽창계수가 혼합물을 구성하고 있는 성분별 열팽창계수에 각각의 혼합비를 곱한 값의 합과 같다고 가정한다면, 에폭시수지(Epoxy Resin)의 열팽창계수를 5.40E-5, 용융실리카(Fused Silica)의 열팽창계수를 5.40E-7, 실리콘웨이퍼(Si-Wafer)의 열팽창계수를 4.00E-6이라고 하였을 때 에폭시수지 6.47% 중량비에 용융실리카 93.53% 중량비를 혼합하게 되면 실리콘웨이퍼와 같은 열팽창계수를 갖는 에폭시 몰딩 컴파운드(EMC, Epoxy Molding Compound)를 만들 수 있다는 것을 단순계산을 통하여 알 수 있다. 본 발명을 구현하기 위한 과제 해결의 수단은, 중금속을 용융실리카 대신 사용하되 반도체 웨이퍼의 열팽창계수에 가장 근접한 열팽창계수를 유지하는 일체형 패키지의 봉지재를 구현하는 것이라 할 수 있다.One of the most important characteristics of the encapsulant of the integrated package is the coefficient of thermal expansion, which is the epoxy resin (assuming that the coefficient of thermal expansion in the mixture is equal to the sum of the product of the mixing ratio multiplied by the respective mixing ratio. Epoxy resin 6.47% by weight when thermal expansion coefficient of epoxy resin is 5.40E-5, thermal expansion coefficient of fused silica is 5.40E-7 and thermal coefficient of silicon wafer is 4.00E-6 It can be seen from the simple calculation that mixing 93.53% by weight of the melted silica into an epoxy molding compound (EMC) having a thermal expansion coefficient such as a silicon wafer. Means for solving the problem to implement the present invention, by using a heavy metal in place of the molten silica can be said to implement an encapsulant of the integrated package that maintains the thermal expansion coefficient closest to the thermal expansion coefficient of the semiconductor wafer.

에폭시 몰딩 컴파운드 봉지재의 원료 및 실리콘웨이퍼의 열팽창계수Epoxy Molding Compound Encapsulant and Silicon Wafer Thermal Expansion Coefficient MaterialsMaterials Epoxy ResinEpoxy Resin Fused SilicaFused silica Si-WaferSi-Wafer Thermal Expansion Coefficient (cm/cm-℃)Thermal Expansion Coefficient (cm / cm- ℃) 5.40E-55.40E-5 5.40E-75.40E-7 4.00E-64.00E-6

본 발명의 사용으로, 반도체 웨이퍼(Wafer)의 열팽창계수에 가장 근접한 열팽창계수, 높은 열전도도 및 낮은 유전율(dielectric constant) 등 일체형 패키지의 봉지재가 갖추어야 할 요구조건을 만족하면서 핵전자기파 방사선을 차폐하는 기능을 추가한 집적회로의 봉지재를 구현할 수 있게 되었다.With the use of the present invention, a function of shielding nuclear electromagnetic radiation while satisfying the requirements of the encapsulant of an integrated package, such as the coefficient of thermal expansion closest to the coefficient of thermal expansion of a semiconductor wafer, high thermal conductivity and low dielectric constant, must be provided. The encapsulation material of the integrated circuit can be implemented.

텅스텐(W)은 열팽창계수가 가장 낮은 금속이면서 이와 동시에 다양한 형태의 화합물(WO3, FeWO4, MnWO4, CaWO4, CuWO4, WC, W2C, WB, WB2, WS2, WS3, WSi2, 8Ta2O5-18WO3, Ta2O5-WO3, 11Ta2O5-4WO3, etc.) 합성이 가능하며 특히, 탄탈륨(Ta)을 포함하는 텅스텐 산화물은 열팽창계수가 매우 낮은 것으로 알려져 있다. 탄탈륨과 텅스텐의 복합산화물 중에서 11Ta2O5-4WO3는 열팽창계수가 용융실리카와 거의 같은 6.00E-7이므로, 혼합물의 열팽창계수가 구성성분별의 열팽창계수에 각각의 혼합비를 곱한 값의 합과 같다고 가정한다면, 에폭시수지 6.37% 중량비에 11Ta2O5-4WO3 93.63% 중량비를 혼합하면 실리콘웨이퍼와 같은 열팽창계수를 갖는 에폭시 몰딩 컴파운드를 만들 수 있음을 단순계산을 통하여 알 수 있다. 또한, 열팽창계수가 음의 값을 갖는 Ta2O5-WO3 및 8Ta2O5-18WO3와 같은 화합물을 사용한다면 주어진 열팽창 계수의 범위 안에서 원하는 물성을 얻기 위한 여러 성분을 추가할 여력도 있을 것이므로 맞춤식 에폭시 몰딩 컴파운드 봉지재의 제조가 가능할 것이며, 탄탈륨 역시 텅스텐과 같은 중금속에 해당하는 물질이므로 탄탈륨의 증가에 따라 텅스텐 성분이 줄어든다는 것은 핵전자기파 방사선을 차폐하기 위한 목적 달성에 있어서 그다지 큰 문제가 되지 않으리라는 것을 '표2'를 통하여 알 수 있다. 본 발명을 설명하는데 있어서 에폭시 몰딩 컴파운드와 봉지재를 구분하여 표현하였는데, 봉지재는 에폭시 몰딩 컴파운드 뿐만 아니라 페놀수지를 포함하는 다양한 유기고분자 수지를 결합제로 하고 성능개량제까지 첨가한 유기고분자 몰딩 컴파운드, 금속 및 세라믹 형태를 모두 포함하는 넓은 의미로 사용하였다.Tungsten (W) is the metal with the lowest coefficient of thermal expansion and at the same time various types of compounds (WO3, FeWO4, MnWO4, CaWO4, CuWO4, WC, W2C, WB, WB2, WS2, WS3, WSi2, 8Ta2O5-18WO3, Ta2O5-WO3) , 11Ta2O5-4WO3, etc.) can be synthesized. In particular, tungsten oxide containing tantalum (Ta) is known to have a very low coefficient of thermal expansion. Among the complex oxides of tantalum and tungsten, 11Ta2O5-4WO3 has a coefficient of thermal expansion of 6.00E-7 which is almost the same as that of molten silica, so assuming that the coefficient of thermal expansion of the mixture is equal to the sum of the product of the respective mixing ratios. It can be seen from the simple calculation that the epoxy resin compound having the thermal expansion coefficient, such as silicon wafer, can be made by mixing the ratio of 11Ta2O5-4WO3 93.63% by weight with 6.37% by weight of epoxy resin. In addition, if a compound such as Ta2O5-WO3 and 8Ta2O5-18WO3 having a negative coefficient of thermal expansion is used, it will be possible to add various components to obtain desired properties within a given coefficient of thermal expansion, thereby producing a customized epoxy molding compound encapsulant. Since tantalum is also a heavy metal such as tungsten, the decrease in tungsten content with increasing tantalum will not be a big problem in achieving the purpose of shielding nuclear electromagnetic radiation. This can be seen through. In describing the present invention, the epoxy molding compound and the encapsulant are expressed separately, and the encapsulant is an organic polymer molding compound, a metal, and an organic polymer molding compound, in which not only an epoxy molding compound but also various organic polymer resins including phenol resins are added as binders and performance modifiers are added. It was used in a broad sense including all ceramic forms.

주요 원소의 밀도 및 입사 에너지별 질량에너지 감쇄계수Mass energy attenuation coefficient of density and incident energy of main elements 구 분
division
밀 도
(g/cm3)
density
(g / cm3)
질량에너지감쇄계수(cm2/g)Mass Energy Reduction Factor (cm2 / g)
0.01MeV0.01MeV 0.05MeV0.05MeV 0.10MeV0.10MeV 0.50MeV0.50 MeV Si(Silicon)Si (Silicon) 2.332.33 33.8933.89 0.440.44 0.180.18 0.090.09 Cu(Copper)Cu (Copper) 8.928.92 215.90215.90 2.612.61 0.460.46 0.080.08 Ba(Barium)Ba (Barium) 3.513.51 186.00186.00 13.7913.79 2.202.20 0.100.10 Ta(Tantalum)Ta (Tantalum) 16.6916.69 237.90237.90 5.725.72 4.304.30 0.140.14 W(Tungsten)W (Tungsten) 19.2519.25 96.9196.91 5.955.95 4.444.44 0.140.14 Epoxy ResinEpoxy Resin 1.201.20 2.092.09 0.210.21 0.170.17 0.100.10

탄탈륨과 텅스텐의 혼합산화물에 대한 전기 및 열적 특성 (출처: Refractory Ceramic Compositions and Methods for Preparing Same, US patent 3,969,123, July 13, 1976)Electrical and thermal properties of mixed oxides of tantalum and tungsten (Source: Refractory Ceramic Compositions and Methods for Preparing Same, US patent 3,969,123, July 13, 1976) CompositionsCompositions W,%W,% Electrical Resistivity
(Ω-cm)
Electrical Resistivity
(Ω-cm)
Thermal Expansion Coefficient
(cm/cm-℃)
Thermal Expansion Coefficient
(cm / cm- ℃)
11Ta2O5-4WO311Ta2O5-4WO3 12.912.9 200E+6200E + 6 +0.6E-6+ 0.6E-6 Ta2O5-WO3Ta2O5-WO3 27.527.5 11E+611E + 6 -2.0E-6-2.0E-6 8Ta2O5-18WO38Ta2O5-18WO3 42.942.9 5E+65E + 6 -5.0E-6-5.0E-6

또한, 반도체 집적회로의 고장 원인이 되는 전하의 분극현상이 에폭시 몰딩 컴파운드의 높은 유전율(dielectric constant) 때문이라는 것이 밝혀진바 있으므로(등록특허 10-0575086) 상대적으로 높은 전기전도성을 갖는 텅스텐 화합물은 전하의 분극현상을 예방하기 위한 반도체 집적회로를 설계한다는 관점에 있어서 유리하게 작용할 수도 있을 것이다. 다만, 그 배합 조성에 따라 전기전도도를 낮추어야 하는 문제에 봉착할 수도 있을 것이며 이런 경우에 한하여 반도체 집적회로와 봉지재 사이에 얇은 필름형태의 전기절연물질을 도입하면 문제를 해결할 수 있을 것이다. 결국, 본 발명에서 소개하고 있는 텅스텐 화합물을 주원료로 사용하는 봉지재는 반도체 집적회로에 접촉하는 형태의 일체형 패키지 제작이 가능하다고 할 수 있을 것이다.In addition, since it has been found that the polarization of charge, which causes the failure of semiconductor integrated circuits, is due to the high dielectric constant of the epoxy molding compound (registered patent 10-0575086), a tungsten compound having a relatively high electrical conductivity is used. It may work advantageously in terms of designing a semiconductor integrated circuit to prevent polarization. However, depending on the compounding composition may be encountered a problem that the electrical conductivity must be lowered, in this case only if the introduction of a thin film-type electrical insulating material between the semiconductor integrated circuit and the encapsulant will be able to solve the problem. As a result, the encapsulant using the tungsten compound introduced in the present invention as a main raw material can be said to be able to manufacture an integrated package in the form of contacting a semiconductor integrated circuit.

본 발명의 이해를 돕기 위하여 다음과 같은 가상의 실시예를 들어 설명하고자 하며 본 발명은 이에 국한되지 않는다. ① 에폭시수지와 경화제 혼합물 15.4% 중량비와 8Ta2O5-18WO3 분말 84.60% 중량비를 균일하게 혼합하여 에폭시 몰딩 컴파운드를 만드는 단계, ② 에폭시 몰딩 컴파운드를 약 2mm 두께로 성형?경화하여 주어진 규격의 성형체를 만드는 단계, ③ 반도체 집적회로를 전기절연물질 용액에 넣었다가 꺼내 건조?경화시켜 집적회로의 표면에 약 0.1mm 정도로 전기절연물질을 코팅하는 단계, ④ 반도체 집적회로와 '②'의 단계에서 미리 만들어진 성형체를 경화되지 않은 에폭시 몰딩 컴파운드를 사용하여 견고하게 접착시켜는 단계를 거치면 텅스텐을 함유하는 에폭시 몰딩 컴파운드를 봉지재로 하는 일체형 패키지를 완성할 수 있을 것이며, 텅스텐을 함유한 에폭시 몰딩 컴파운드가 전기전도도에 있어서 문제될 것이 없다고 판단되면 '③'의 단계는 생략할 수 있을 것이다.In order to help the understanding of the present invention, the following hypothetical embodiments will be described and described, but the present invention is not limited thereto. ① to make epoxy molding compound by uniformly mixing 15.4% weight ratio of epoxy resin and hardener mixture and 84.60% weight ratio of 8Ta2O5-18WO3 powder, ② molding and curing epoxy molding compound to about 2mm thickness to make molded body of given specification, ③ Put the semiconductor integrated circuit into the electric insulating material solution, remove it, dry it, and harden it to coat the electric insulating material on the surface of the integrated circuit by about 0.1mm. ④ Harden the molded body prepared in the step of semiconductor integrated circuit and '②'. Tightly bonding with an unmolded epoxy molding compound will result in a complete package with an epoxy molding compound containing tungsten as the encapsulant. Tungsten-containing epoxy molding compound is a problem in electrical conductivity. If it is judged that there is nothing to be done, the step of ③ can be omitted. .

일체형 패키지의 봉지재 재질에 있어서는, 현재 가장 많이 사용되고 있는 에폭시 몰딩 컴파운드 뿐만 아니라 페놀수지를 포함하는 다양한 유기고분자 수지를 결합제로 하고 또한 각종 성능개량제까지 첨가된 유기고분자 몰딩 컴파운드의 형태도 가능할 것이며, 텅스텐이 산화에 특히 안정한 금속이라는 것을 고려한다면 약 1mm 두께의 텅스텐 금속판으로 봉지재를 구성하는 것도 가능하다고 할 수 있을 것이며, 삼산화텅스텐(WO3)이 세라믹의 황색안료로 사용되고 있다는 것을 고려한다면 텅스텐을 함유하는 세라믹 형태의 봉지재도 충분히 가능할 것이다. 또한, '도2'에서와 같이 텅스텐 금속의 열팽창계수는 실리콘웨이퍼의 열팽창계수와 비슷하므로 에폭시 몰딩 컴파운드에 텅스텐 금속판을 붙인 형태의 봉지재도 가능할 것이다. 텅스텐을 함유하는 에폭시 몰딩 컴파운드에 있어서 텅스텐이 차지하는 비율은 핵전자기파 방사선의 차폐성능을 결정하는 중요한 요소에 해당될 수 있는데, 에폭시수지 4% 중량비에 탄화텅스텐(WC) 96% 중량비 함유하는 것을 텅스텐을 최대로 함유할 수 있는 컴파운드 조성이라고 가정한다면, 화합물의 형태로 봉지재에 함유될 수 있는 텅스텐의 최대량은 약 90% 까지라고 할 수 있을 것이다.In the case of the encapsulant material of the integrated package, it is possible to form not only epoxy molding compound, which is currently used most, but also organic polymer molding compound including various organic polymer resins including phenolic resin as a binder and various performance modifiers. Considering that it is a particularly stable metal for oxidation, it may be possible to construct an encapsulant with a tungsten metal plate having a thickness of about 1 mm, and considering that tungsten trioxide (WO 3) is used as a yellow pigment for ceramics, Encapsulants in ceramic form will also be possible. In addition, since the thermal expansion coefficient of the tungsten metal is similar to that of the silicon wafer as shown in FIG. 2, an encapsulant having a tungsten metal plate attached to the epoxy molding compound may be possible. The proportion of tungsten in the epoxy molding compound containing tungsten may be an important factor in determining the shielding performance of nuclear electromagnetic radiation. Tungsten containing 96% by weight of tungsten carbide (WC) in 4% by weight of epoxy resin Assuming that the maximum compound composition can be contained, the maximum amount of tungsten that can be contained in the encapsulant in the form of a compound may be up to about 90%.

도 1. 비중이 1.2인 에폭시수지에 실리콘(Si), 구리(Cu), 바륨(Ba) 및 텅스텐(W)을 중량비로 각각 1%, 5% 및 50% 첨가한 에폭시 몰딩 컴파운드를 가정하였을 때, 핵전자기파 중에서 에너지가 0.01MeV 내지 0.50MeV에 해당하는 핵전자기파 방사선의 차폐율을 컴파운드의 두께별로 구분하여 나타낸 것으로서, 텅스텐을 50% 함유한 컴파운드는 2mm의 두께만으로 0.1MeV 이하의 핵전자기파 방사선을 약 100% 차단한다는 것을 알 수 있다.(도면에서 11Ta2O5-4WO3 및 8Ta2O5-18WO3은 탄탈륨과 텅스텐의 복합산화물에 해당한다)Figure 1. Assuming an epoxy molding compound in which 1%, 5% and 50% of silicon (Si), copper (Cu), barium (Ba) and tungsten (W) are added to the epoxy resin having a specific gravity of 1.2 by weight, respectively. Among the nuclear electromagnetic waves, the shielding rate of the nuclear electromagnetic radiation corresponding to the energy of 0.01 MeV to 0.50MeV is shown by the thickness of the compound.The compound containing 50% of tungsten contains the nuclear electromagnetic radiation of 0.1 MeV or less with only 2mm thickness. It can be seen that it blocks about 100% (11Ta2O5-4WO3 and 8Ta2O5-18WO3 correspond to the composite oxide of tantalum and tungsten in the figure).

도 2. 주요 원소 및 화합물에 대한 열팽창계수를 나타낸 것으로서, 용융실리카 약 94% 중량비와 에폭시수지 약 6% 중량비를 혼합한 에폭시 몰딩 컴파운드의 열팽창계수가 실리콘웨이퍼의 열팽창계수와 계산적으로 같게 된다는 것을 알 수 있으며, 텅스텐 화합물을 사용하는 경우 실리콘웨이퍼와 비슷한 열팽창계수를 나타내는 에폭시 몰딩 컴파운드의 조합이 충분히 가능하다는 것을 알 수 있다.(도면에서 Si는 실리콘, Ge는 게르마늄, W는 텡스텐, Au는 금, Pb는 납, Crystalline Silica는 결정형실리카, Fused Silica는 용융실리카, Epoxy는 에폭시수지, Si-Wafer는 실리콘웨이퍼를 각각 나타낸다.)Figure 2 shows the thermal expansion coefficients for the major elements and compounds, and it is found that the thermal expansion coefficient of the epoxy molding compound mixed with about 94% by weight of molten silica and about 6% by weight of epoxy resin is calculated to be equal to the thermal expansion coefficient of the silicon wafer. In the case of using a tungsten compound, it can be seen that a combination of epoxy molding compounds exhibiting a coefficient of thermal expansion similar to that of a silicon wafer is sufficiently possible (in the drawing, Si is silicon, Ge is germanium, W is tungsten, and Au is gold. Pb is lead, Crystalline Silica is crystalline silica, Fused Silica is fused silica, Epoxy is epoxy resin and Si-Wafer is silicon wafer.)

도 3. 주요 원소 및 화합물에 대한 열전도도를 나타낸 것으로서, 용융실리카와 에폭시로 구성된 기존의 에폭시 몰딩 컴파운드는 열전도의 관점에서는 일체형 패키지의 봉지재로서 불리하다는 것을 알 수 있다.Figure 3 shows the thermal conductivity of the main elements and compounds, it can be seen that the conventional epoxy molding compound composed of molten silica and epoxy is disadvantageous as the encapsulant of the integrated package in terms of thermal conductivity.

도 4. 일체형 패키지의 내부구조를 설명하기 위한 그림이며, 반도체 집적회로를 구성하는 웨이퍼(Wafer)를 에폭시 몰딩 컴파운드(EMC) 봉지재가 견고하게 감싸고 있는 것을 알 수 있다.4. It is a figure for demonstrating the internal structure of an integrated package, and it turns out that the epoxy molding compound (EMC) sealing material is firmly surrounding the wafer which comprises a semiconductor integrated circuit.

본 발명을 설명하는데 있어서 반도체 웨이퍼와 실리콘웨이퍼를 구분하여 표현하였는데, 반도체 웨이퍼는 실리콘웨이퍼 뿐만 아니라 게르마늄웨이퍼 및 집적회로 구현이 가능한 모든 반도체 재질의 웨이퍼를 포함하는 의미로 사용하였다.In the description of the present invention, a semiconductor wafer and a silicon wafer are distinguished from each other, and the semiconductor wafer is used to include not only a silicon wafer but also a germanium wafer and a wafer of all semiconductor materials capable of implementing an integrated circuit.

Claims (3)

삭제delete 텅스텐을 함유하는 일체형 패키지를 위한 반도체 집적회로의 봉지재에 있어서,In an encapsulant of a semiconductor integrated circuit for an integrated package containing tungsten, 텅스텐을 10% 중량비 내지 90% 중량비 함유하되, WO3, FeWO4, MnWO4, CaWO4, CuWO4, WC, W2C, WB, WB2, WS2, WS3, WSi2, 8Ta2O5-18WO3, Ta2O5-WO3, 11Ta2O5-4WO3 의 형태로 사용한 것을 특징으로 하는, 텅스텐을 함유한 일체형 패키지를 위한 반도체 집적회로의 봉지재Tungsten 10% to 90% by weight, in the form of WO3, FeWO4, MnWO4, CaWO4, CuWO4, WC, W2C, WB, WB2, WS2, WS3, WSi2, 8Ta2O5-18WO3, Ta2O5-WO3, 11Ta2O5-4WO3 An encapsulant of a semiconductor integrated circuit for an integrated package containing tungsten, characterized by being used 반도체 집적회로의 일체형 패키지에 있어서,In an integrated package of a semiconductor integrated circuit, 청구항 2의 봉지재를 반도체 집적회로에 접촉하는 형태로 사용하는 것을 특징으로 하는, 반도체 집적회로의 일체형 패키지An integrated package of a semiconductor integrated circuit, characterized in that the encapsulant of claim 2 is used in contact with the semiconductor integrated circuit.
KR1020090082956A 2009-09-03 2009-09-03 Packing Materials of Semiconductor Integrated Circuit for Single Type Package which Contains Tungsten Compounds KR101171733B1 (en)

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PCT/KR2010/005973 WO2011028042A2 (en) 2009-09-03 2010-09-03 Packing material containing tungsten and integrated package
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Citations (3)

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JPH10286845A (en) * 1997-04-15 1998-10-27 Seiko Epson Corp Manufacture of resin sealing mold and resin sealing type semiconductor device
JP2001511202A (en) * 1997-01-30 2001-08-07 スペース エレクトロニクス,インコーポレイテッド Cross-reference to methods and compositions for ionizing radiation shielding materials
KR100575086B1 (en) * 2004-11-11 2006-05-03 삼성전자주식회사 Semiconductor package with conductive molding compound and manufacturing method thereof

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Publication number Priority date Publication date Assignee Title
KR20080023996A (en) * 2006-09-12 2008-03-17 주식회사 하이닉스반도체 Semiconductor package

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001511202A (en) * 1997-01-30 2001-08-07 スペース エレクトロニクス,インコーポレイテッド Cross-reference to methods and compositions for ionizing radiation shielding materials
JPH10286845A (en) * 1997-04-15 1998-10-27 Seiko Epson Corp Manufacture of resin sealing mold and resin sealing type semiconductor device
KR100575086B1 (en) * 2004-11-11 2006-05-03 삼성전자주식회사 Semiconductor package with conductive molding compound and manufacturing method thereof

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