KR101171325B1 - Light emitting device having a plurality of light emitting cells and method of fabricating the same - Google Patents

Abstract

A light emitting device having a plurality of light emitting cells is disclosed. The light emitting device includes a thermally conductive substrate having a higher thermal conductivity than a sapphire substrate, such as a SiC substrate. A plurality of light emitting cells are connected in series on the thermally conductive substrate. Meanwhile, a semi-insulating buffer layer is interposed between the thermally conductive substrate and the light emitting cells. The semi-insulating buffer layer may be, for example, AlN or semi-insulating GaN. By adopting a thermally conductive substrate having a higher thermal conductivity than that of the sapphire substrate, the heat dissipation performance can be improved as compared with the conventional sapphire substrate, so that the maximum light output of the light emitting device driven under a high voltage AC power source can be increased. In addition, the anti-insulation buffer layer may be employed to prevent leakage current through the thermally conductive substrate and increase of leakage current between the light emitting cells.

Light-emitting diodes, ac power, semi-insulated silicon carbide, semi-insulated buffer layers, semi-insulated gallium nitride

Description

LIGHT EMITTING DEVICE HAVING A PLURALITY OF LIGHT EMITTING CELLS AND METHOD OF FABRICATING THE SAME

1 is a cross-sectional view for describing a light emitting device having a plurality of light emitting cells according to an embodiment of the present invention.

2 is a circuit diagram illustrating a light emitting device including a bridge rectifier according to an embodiment of the present invention.

3 to 7 are cross-sectional views illustrating a method of manufacturing a light emitting device having a plurality of light emitting cells according to an embodiment of the present invention.

The present invention relates to a light emitting device and a method of manufacturing the same, and more particularly to a light emitting device having a plurality of light emitting cells connected in series in a single chip and a method of manufacturing the same.

A light emitting diode is a photoelectric conversion semiconductor device having a structure in which an N-type semiconductor and a P-type semiconductor are bonded to each other, and emit light by recombination of electrons and holes. Such light emitting diodes are widely used as display devices and backlights. In addition, the light emitting diode consumes less power and has a longer lifespan than existing light bulbs or fluorescent lamps, thereby replacing its incandescent lamps and fluorescent lamps, thereby expanding its use area for general lighting.

The light emitting diode is repeatedly turned on and off in accordance with the direction of the current under AC power. Therefore, when the light emitting diode is directly connected to an AC power source, the light emitting diode does not emit light continuously and is easily damaged by reverse current.

In order to solve the problem of the light emitting diode, a light emitting diode that can be directly connected to a high voltage AC power source is disclosed in International Publication No. WO 2004/023568 (Al) "Light-Emitting Device Having Light-Emitting Components". EMITTING ELEMENTS, which was disclosed by SAKAI et. Al.

According to WO 2004/023568 (Al), the LEDs are two-dimensionally connected in series on an insulating substrate such as a sapphire substrate to form an LED array. These two LED arrays are connected in anti-parallel on the sapphire substrate. As a result, a single chip light emitting device that can be driven by an AC power supply is provided.

However, the sapphire substrate has a relatively low thermal conductivity, which leads to poor heat dissipation. This limit of heat dissipation leads to a limit of the maximum light output of the light emitting device. Therefore, continuous improvement on the light emitting device is required to increase the maximum light output under high voltage AC power supply.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide an improved light emitting device capable of increasing maximum light output under high voltage AC power.

Another technical problem of the present invention is to provide a light emitting device having a plurality of light emitting cells connected in series that can prevent an increase in leakage current through the substrate even when using an electrically conductive substrate.

Another technical problem of the present invention is to provide an improved light emitting device manufacturing method capable of increasing the maximum light output under a high voltage AC power supply, without increasing the leakage current through the substrate.

In order to solve the above technical problem, the present invention discloses a light emitting device having a plurality of light emitting cells. The light emitting device according to an aspect of the present invention includes a thermally conductive substrate having a higher thermal conductivity than a sapphire substrate. A plurality of light emitting cells are connected in series on the thermally conductive substrate. Meanwhile, a semi-insulating buffer layer is interposed between the thermally conductive substrate and the light emitting cells. By adopting a thermally conductive substrate having a higher thermal conductivity than that of the sapphire substrate, the heat dissipation performance can be improved as compared with the conventional sapphire substrate, so that the maximum light output of the light emitting device driven under a high voltage AC power source can be increased. In addition, the anti-insulation buffer layer may be employed to prevent leakage current through the thermally conductive substrate and increase of leakage current between the light emitting cells.

Here, the thermally conductive substrate means a substrate of a material having a relatively high thermal conductivity compared to the sapphire substrate. In addition, "semi-insulating" generally refers to a high resistance material having a specific resistance of approximately 10 ⁵ Ω · cm or more at room temperature, and is used to include an insulating material unless otherwise specified.

The thermally conductive substrate may be an aluminum nitride (AlN) or silicon carbide (SiC) substrate. In addition, the SiC substrate may be a semi-insulating or N-type silicon carbide (SiC) substrate. AlN and SiC substrates have about 10 times more thermal conductivity than sapphire substrates. Therefore, by adopting an AlN or SiC substrate, it is possible to provide a light emitting device having improved heat dissipation performance as compared with a light emitting device employing a sapphire substrate.

The semi-insulating buffer layer may be undoped aluminum nitride (AlN). AlN has a suitable crystal structure between the SiC substrate and the group III nitride.

Alternatively, the semi-insulated buffer layer may be semi-insulated gallium nitride (GaN). The semi-insulating gallium nitride (GaN) may be undoped gallium nitride (GaN) or gallium nitride doped with an electron acceptor. In general, undoped GaN exhibits semi-insulating or N-type semiconductor characteristics depending on the type of the substrate. When the undoped GaN exhibits N-type semiconductor characteristics, the GaN may be doped with an electron acceptor to provide semi-insulated GaN.

The electron acceptor may be an alkali metal, an alkaline earth metal or a transition metal, and in particular, may be Fe. Fe can be employed to grow a semi-insulating GaN buffer layer without affecting the structural properties of GaN.

Each of the light emitting cells includes an N-type semiconductor layer, an active layer, and a P-type semiconductor layer. The light emitting cells are electrically connected to the N-type semiconductor layers and the P-type semiconductor layers of adjacent light emitting cells by metal wires, respectively.

The light emitting device according to another aspect of the present invention includes a semi-insulating substrate. The semi-insulating substrate may be an AlN or SiC substrate. A plurality of light emitting cells are connected in series on the semi-insulating substrate. According to this aspect, since a plurality of light emitting cells are formed directly on an AlN or semi-insulating SiC substrate, the manufacturing process can be simplified.

The present invention also discloses a method of manufacturing a light emitting device having a plurality of light emitting cells. The light emitting device manufacturing method includes preparing a thermally conductive substrate having a higher thermal conductivity than a sapphire substrate. A semi-insulating buffer layer is formed on the thermally conductive substrate, and an N-type semiconductor layer, an active layer, and a P-type semiconductor layer are formed on the semi-insulating buffer layer. Thereafter, the N-type semiconductor layer, the active layer, and the P-type semiconductor layer are patterned to form a plurality of light emitting cells each of which a portion of the N-type semiconductor layer is exposed. Subsequently, the N-type semiconductor layer of each light emitting cell and the P-type semiconductor layer of the light emitting cell adjacent thereto are connected to form metal wires for connecting the light emitting cells in series. Accordingly, an improved light emitting device capable of increasing the maximum light output under a high voltage AC power supply can be manufactured.

The thermally conductive substrate may be an AlN substrate, a semi-insulated or N-type SiC substrate.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments are provided as examples to ensure that the spirit of the present invention to those skilled in the art will fully convey. Therefore, the present invention is not limited to the embodiments described below, but may be embodied in other forms. And, in the drawings, the width, length, thickness, etc. of the components may be exaggerated for convenience. Like numbers refer to like elements throughout.

1 is a cross-sectional view illustrating a light emitting device in which a plurality of light emitting cells are connected in series according to an embodiment of the present invention.

Referring to FIG. 1, the light emitting device of the present invention includes a thermally conductive substrate 110, a buffer layer 120 formed on the substrate 110, and a plurality of light emitting cells 100-1 patterned on the buffer layer 120. To 100-n), and metal wires 170-1 to 170-n for connecting the plurality of light emitting cells 100-1 to 100-n in series.

The thermally conductive substrate 110 is a substrate of a material having a higher thermal conductivity than the sapphire substrate. The thermally conductive substrate 110 may be an AlN substrate, a semi-insulated or N-type SiC substrate.

The buffer layer 120 is used to mitigate the lattice mismatch between the semiconductor layers to be formed thereon and the substrate 110. In addition, in some embodiments of the present invention, the buffer layer 120 is used to insulate the light emitting cells 100-1 to 100-n from the substrate 110. In addition, the light emitting cells should be electrically separated from each other. Thus, the buffer layer 120 is formed of a semi-insulating material film. When the substrate 110 is a semi-insulating AlN or semi-insulating SiC substrate, the buffer layer 120 may be omitted.

In this embodiment, the semi-insulating buffer layer 120 may be an AlN or semi-insulating gallium nitride (GaN) layer. Since undoped AlN generally exhibits insulating properties, the AlN may be undoped AlN. On the other hand, undoped GaN generally exhibits N-type semiconductor or semi-insulating properties, depending on the growth method and substrate material. Thus, when undoped GaN has semi-insulating properties, the semi-insulating GaN is undoped GaN. On the other hand, when the undoped GaN exhibits the N-type semiconductor characteristics, the electron acceptor is doped to offset it. The electron acceptor may be an alkali metal, an alkaline earth metal or a transition metal, in particular iron (Fe) or chromium (Cr).

A method of forming a semi-insulating GaN layer on a sapphire substrate is described by Heikman et al. "Growth of Fe doped semi-insulated GaN by metal organic chemical vapor deposition" (Growth of Fe doped semi It is published in Applied Physics Letters, published July 15, 2002 under the title -insulating GaN by metalorganic chemical vapor deposition. Hakeman et al. Formed a semi-insulating GaN layer on a sapphire substrate using a MOCVD technique using ferrocene (ferrocene, Cp ₂ Fe) as a precursor.

Generally, undoped GaN formed using MOCVD techniques on a sapphire substrate becomes N-type GaN. This is because residual oxygen atoms act as donors in the GaN layer. Therefore, by doping the metal materials acting as the electron acceptor, such as Fe to offset the electron donor, it is possible to form a semi-insulated GaN.

The technique of forming the semi-insulated GaN by doping the electron acceptor can be equally applied in the embodiments of the present invention. For example, the undoped GaN formed on the SiC substrate may be N-type GaN by impurities such as Si, and thus, the semi-insulated GaN buffer layer 120 may be formed by doping a metal material such as Fe. . In this case, the electron acceptor need not be doped over the entire thickness of the semi-insulating buffer layer 120, and the electron acceptor such as Fe may be doped only in part of the thickness of the buffer layer 120.

The electron acceptor may be doped using ion implantation techniques.

As illustrated, the semi-insulating buffer layer 120 may be continuous between the light emitting cells 100-1 to 100-n, but may be separated.

Meanwhile, each of the plurality of light emitting cells 100-1 to 100-n includes a nitride semiconductor layer PN bonded.

In the present embodiment, each of the light emitting cells includes an N-type semiconductor layer 130, an active layer 140 formed in a predetermined region on the N-type semiconductor layer 130, and a P-type semiconductor formed on the active layer 140. Layer 150. At least a portion of an upper surface of the N-type semiconductor layer 130 is exposed. Ohmic metal layers 160 and 165 may be formed on the N-type semiconductor layer 130 and the P-type semiconductor layer 150. In addition, a high concentration N-type semiconductor tunneling layer or a semi-metal layer having a concentration of 1 × 10 ¹⁹ to 1 × 10 ²² / cm ³ is formed on the N-type semiconductor layer 130 or the P-type semiconductor layer 150. A transparent electrode layer (not shown) may be further formed thereon.

The N-type semiconductor layer 130 is an N-type Al _x In _y Ga _1-xy N (0 ≦ x, y ≦ 1) film and may include an N-type cladding layer. In addition, the P-type semiconductor layer 150 is P-type Al _x In _y Ga _1-xy N (0 ≦ x, y ≦ 1), and may include a P-type cladding layer.

The N-type semiconductor layer 130 may be formed by doping silicon (Si), and the P-type semiconductor layer 150 may be formed by doping zinc (Zn) or magnesium (Mg).

The active layer 140 is an area where electrons and holes are recombined and includes InGaN. The emission wavelength emitted from the light emitting cell is determined according to the type of material constituting the active layer 140. The active layer 140 may be a multilayer film in which a quantum well layer and a barrier layer are repeatedly formed. The barrier layer and the well layer may be binary to quaternary compound semiconductor layers represented by general formula Al _x In _y Ga _1-xy N (0 ≦ x, y, x + y ≦ 1).

The light emitting cells are connected in series through metal wires 170-1 to 170-n-1. In the present embodiment, the metal wires are connected in series with the number of light emitting cells 100-1 to 100-n that can be driven by an AC power supply. That is, the number of light emitting cells 100 to be connected in series is limited by an AC driving voltage / current applied to the light emitting device and a voltage required to drive a single light emitting cell. For example, under a 220V AC voltage, about 67 LEDs for driving 3.3V may be connected in series. In addition, at 110V AC voltage, approximately 34V driving light emitting cells may be connected in series.

As shown in FIG. 1, in the light emitting device in which n light emitting cells 100-1 to 100-n are connected in series, the N-type semiconductor layer 130 and the second of the first light emitting cell 100-1 are provided. The P-type semiconductor layer 150 of the light emitting cell 100-2 is connected through the first metal wiring 170-1, and the N-type semiconductor layer 130 and the third of the second light emitting cell 100-2 are connected. The P-type semiconductor layer (not shown) of the light emitting cell (not shown) is connected through the second metal wiring 170-2. Then, the n-type semiconductor layer (not shown) of the n-th light emitting cell (not shown) and the p-type semiconductor layer 150 of the n-th light emitting cell 100-n -1 are n-th metal wiring. The N-type semiconductor layer 130 of the n-th light emitting cell 100-n-1 and the P-type semiconductor layer 150 of the n-th light emitting cell 100-n are connected to each other through 170-n-2. ) Is connected through the n-th metal wiring 170-n-1.

The series-connected light emitting cells constitute an LED array, as disclosed in WO 2004/023568 (Al). On the other hand, the light emitting device has two LED arrays connected in parallel to each other, can be used for illumination under AC power. A P-type pad for electrically connecting an AC power source to the P-type semiconductor layer 150 of the first light emitting cell 100-1 and the N-type semiconductor layer 130 of the n-th light emitting cell 100-n, respectively; An N-type pad (not shown) may be formed.

Alternatively, the light emitting device may include a bridge rectifier composed of diodes for rectifying an alternating current. The circuit diagram of the light emitting device including the bridge rectifier is shown in FIG.

Referring to FIG. 2, the light emitting cells 41a, 41b, 41c, 41d, 41e, and 41f form an LED array 41 connected in series. Meanwhile, a bridge rectifier including diodes D1, D2, D3, and D4 is disposed between the AC power source 45, the LED array 41, and the ground and the LED array 41. The diodes D1, D2, D3, and D4 are formed by the same process as the light emitting cells. That is, the bridge rectifier can be manufactured using light emitting cells.

The anode terminal of the LED array 41 is connected to the node between the diodes D1 and D2, and the cathode terminal is connected to the node between the diodes D3 and D4. Meanwhile, the terminal of the AC power supply 45 is connected to the node between the diodes D1 and D4, and the ground is connected to the node between the diodes D2 and D3.

When the AC power supply 45 has a positive phase, the diodes D1 and D3 of the bridge rectifier are turned on and the diodes D2 and D4 are turned off. Thus, current flows to ground via the diode D1 of the bridge rectifier, the LED array 41 and the diode D3 of the bridge rectifier.

On the other hand, when the AC power source 45 has a negative phase, the diodes D1 and D3 of the bridge rectifier are turned off and the diodes D2 and D4 are turned on. Thus, current flows through the diode D2 of the bridge rectifier, the LED array 41 and the diode D4 of the bridge rectifier to the AC power source.

As a result, by connecting the bridge rectifier to the LED array 41, the AC array 45 can be used to drive the LED array 41 continuously. Here, although the terminals of the bridge rectifier are configured to be connected to the AC power source 45 and the ground, the both ends may be configured to be connected to both terminals of the AC power source.

According to the present embodiment, one LED array may be electrically connected to and driven by an AC power source, thereby increasing the use efficiency of the LED array.

Hereinafter, a method of manufacturing a light emitting device having a plurality of light emitting cells will be described.

3 to 7 are cross-sectional views illustrating a method of manufacturing a light emitting device according to an embodiment of the present invention.

Referring to FIG. 3, a semi-insulating buffer layer 120 is formed on the thermally conductive substrate 110. The thermally conductive substrate 110 may be an AlN or SiC substrate. In addition, the SiC may be half-stranded or N-type.

In general, SiC single crystal substrates have the characteristics of N-type semiconductors. This is known to be because nitrogen (N) contained in the SiC substrate acts as an electron donor. Therefore, an electron acceptor such as vanadium (Va) can be doped to grow a semi-insulating SiC single crystal. Meanwhile, a method of growing semi-insulated SiC crystals without doping vanadium has been disclosed in US Pat. No. 6,814,801. These techniques can be used to provide semi-insulated SiC substrates. In addition, by implanting an electron acceptor such as iron, vanadium, carbon or silicon (Si) using an ion implantation technique on the surface of the SiC substrate, a portion of the top of the SiC can be converted into a semi-insulating SiC layer.

The semi-insulating buffer layer 120 is formed using metal organic chemical vapor deposition (MOCVD), molecular beam growth (MBE) or hydride vapor phase growth (HVPE). The buffer layer 120 may be an AlN or semi-insulating GaN layer. The semi-insulating GaN layer may be an undoped GaN or a GaN layer doped with an electron acceptor. The electron acceptor may be an alkali metal, an alkaline earth metal or a transition metal, in particular iron (Fe) or chromium (Cr). The electron acceptor may be doped using a precursor during the formation of the GaN layer, or may be doped using an ion implantation technique after forming the GaN layer.

When using an N-type SiC substrate, the semi-insulating buffer layer 120 electrically insulates the light emitting cells from the N-type SiC substrate to prevent leakage current through the substrate. In the case of using a semi-insulating SiC substrate, the process of forming the semi-insulating buffer layer 120 may be omitted.

Referring to FIG. 4, an N-type semiconductor layer 130, an active layer 140, and a P-type semiconductor layer 150 are formed on the semi-insulating buffer layer 120. These semiconductor layers 130, 140, 150 may be formed continuously in the same process chamber. The N-type semiconductor layer 130, the active layer 140, and the P-type semiconductor layer 150 may be formed using a MOCVD, MBE, or HVPE method, and may be formed in multiple layers, respectively. A high concentration N-type semiconductor tunneling layer or a semimetal layer having a concentration of 1 × 10 ¹⁹ to 1 × 10 ²² / cm ³ may be formed on the N-type semiconductor layer 130 or the P-type semiconductor layer 150, and a transparent electrode layer thereon. (Not shown) may be further formed.

Referring to FIG. 5, the light emitting cells 100-1 to 100-n are formed by patterning the P-type semiconductor layer 150, the active layer 140, and the N-type semiconductor layer 130. Each of these layers can be patterned using photo and etching techniques. For example, a photoresist pattern is formed on the P-type semiconductor layer 150, and the P-type semiconductor layer 150, the active layer 140, and the N-type semiconductor layer 130 are sequentially etched using the photoresist pattern as an etching mask. Accordingly, separated light emitting cells are formed. In this case, the semi-insulating buffer layer 120 may be etched to expose the substrate 110.

Referring to FIG. 6, a portion of the upper surface of the N-type semiconductor layer 130 is exposed by patterning the P-type semiconductor layer 150 and the active layer 140 of the separated light emitting cells 100-1 to 100-n. Let's do it. The patterning process may be performed using a photo and etching process. That is, a photoresist pattern is formed on the substrate 110 having the separated light emitting cells 100-1 to 100-n, and the photoresist pattern is used as an etching mask to form the P-type semiconductor layer 150 and the active layer 140. Etch a part of). As a result, the N-type semiconductor layer 130 is exposed to a portion where the P-type semiconductor layer and the active layer are etched.

The etching process may be performed by a wet or dry etching process. The dry etching process may be a dry etching process using plasma.

Referring to FIG. 7, the P-type ohmic metal layer 160 and the N-type ohmic metal layer 165 are formed on the P-type semiconductor layer 150 and the N-type semiconductor layer 130, respectively.

The ohmic metal layers 160 and 165 may be formed using a metal deposition process after opening a region where the ohmic metal layers 160 and 165 are to be formed using a photoresist pattern (not shown). The P-type ohmic metal layer 160 and the N-type ohmic metal layer 165 may be formed by the same process, or may be formed by separate processes. The ohmic metal layers 160 and 165 may be formed of at least one material layer of Pb, Sn, Au, Ge, Cu, Bi, Cd, Zn, Ag, Ni, and Ti.

Thereafter, the N-type ohmic metal layers 165 and the P-type ohmic metal layers 160 of the adjacent light emitting cells are connected to the metal wires 170-1 to 170-n-1. The metal wires may be formed through an air bridge process or a step-cover process.

The air bridge process is disclosed in International Publication No. WO 2004/023568 (Al), which is briefly described. First, a first photoresist pattern having an opening exposing the ohmic metal layers 160 and 165 is formed on a substrate on which the light emitting cells and the ohmic metal layers 160 and 165 are formed. Thereafter, the metal material layer is thinly formed by using an electron beam evaporation technique. The metal layer is formed on the entire surface of the opening and the first photoresist pattern. Subsequently, a second photoresist pattern is formed to expose regions between adjacent light emitting cells to be connected and the metal material layer of the openings. Thereafter, gold and the like are formed using a plating technique, and then the first and second photoresist patterns are removed with a solution such as solvent. As a result, only wirings connecting adjacent light emitting cells remain, and all other metal material layers and photoresist patterns are removed.

Meanwhile, the step cover process includes forming an insulating layer on a substrate having light emitting cells and an ohmic metal layer. The insulating layer is patterned using photolithography and etching techniques to form openings that expose the ohmic metal layers 160 and 165 on the P-type semiconductor layer and the N-type semiconductor layer. Subsequently, an electron beam deposition technique or the like is used to form a metal layer filling the opening and covering the insulating layer. Thereafter, the metal layer is patterned using photolithography and etching techniques to form interconnects that connect adjacent light emitting cells. Such a step cover process is possible in various modifications. Using the step cover process, the wiring is supported by the insulating layer, thereby increasing the reliability of the wiring.

On the other hand, P-type pads and N-type pads are formed in the light emitting cells 100-1 and 100-n located at both ends to connect AC power.

In the drawings, the light emitting cells are shown arranged in a row, but for convenience of description, the light emitting cells may have various shapes on a plane, as shown in International Publication No. WO 2004/023568 (Al). Can be arranged as.

According to the present invention, it is possible to improve the heat dissipation performance of the light emitting device, it is possible to provide a light emitting device having an increased maximum output under a high voltage AC power supply. In addition, it is possible to provide a light emitting device having a plurality of light emitting cells which can prevent an increase in leakage current through the substrate by adopting a semi-insulating substrate or a semi-insulating buffer layer.

Claims (17)

A thermal conductive substrate having a higher thermal conductivity than a sapphire substrate; A plurality of series of light emitting cells connected in series on the thermally conductive substrate; A semi-insulating buffer layer interposed between the thermally conductive substrate and the light emitting cells; Each of the light emitting cells includes an N-type semiconductor layer, an active layer, and a P-type semiconductor layer, The light emitting devices include a plurality of light emitting cells in which N-type semiconductor layers and P-type semiconductor layers of adjacent light emitting cells are electrically connected in series by metal wires, respectively. The method according to claim 1, The thermally conductive substrate is a light emitting device having a plurality of light emitting cells that are semi-insulated or N-type SiC substrate. The method according to claim 2, The semi-insulating buffer layer is a light emitting device having a plurality of light emitting cells of the undoped AlN. The method according to claim 2, The semi-insulating buffer layer is a light emitting device having a plurality of light emitting cells are semi-insulating GaN. The method of claim 4, The semi-insulating GaN is a light emitting device having a plurality of light emitting cells of the electron acceptor doped GaN. The method of claim 5, The electron acceptor is a light emitting device having a plurality of light emitting cells of Fe. delete A semi-insulating substrate having a higher thermal conductivity than the sapphire substrate; And It includes a plurality of light emitting cells connected in series on the semi-insulating substrate, Each of the light emitting cells includes an N-type semiconductor layer, an active layer, and a P-type semiconductor layer, The light emitting devices include a plurality of light emitting cells in which N-type semiconductor layers and P-type semiconductor layers of adjacent light emitting cells are electrically connected in series by metal wires, respectively. The method of claim 8, The semi-insulating substrate is a light emitting device having a plurality of light emitting cells that are semi-insulating SiC substrate. The method of claim 8, And the semi-insulating substrate is a SiC substrate having a semi-insulating SiC layer ion implanted thereon. delete delete delete Prepare a thermally conductive substrate having a higher thermal conductivity than the sapphire substrate, Forming a semi-insulating buffer layer on the thermally conductive substrate, Forming an N-type semiconductor layer, an active layer, and a P-type semiconductor layer on the semi-insulating buffer layer, Patterning the N-type semiconductor layer, the active layer, and the P-type semiconductor layer to form a plurality of light emitting cells each of which a portion of the N-type semiconductor layer is exposed; Connecting the N-type semiconductor layer of each light emitting cell and the P-type semiconductor layer of the light emitting cell adjacent thereto to form metal wires connecting the light emitting cells in series; The thermally conductive substrate is semi-insulated or N-type SiC, The semi-insulating buffer layer is an undoped AlN light emitting device manufacturing method. Prepare a thermally conductive substrate having a higher thermal conductivity than the sapphire substrate, Forming a semi-insulating buffer layer on the thermally conductive substrate, Forming an N-type semiconductor layer, an active layer, and a P-type semiconductor layer on the semi-insulating buffer layer, Patterning the N-type semiconductor layer, the active layer, and the P-type semiconductor layer to form a plurality of light emitting cells each of which a portion of the N-type semiconductor layer is exposed; Connecting the N-type semiconductor layer of each light emitting cell and the P-type semiconductor layer of the light emitting cell adjacent thereto to form metal wires connecting the light emitting cells in series; The thermally conductive substrate is semi-insulated or N-type SiC, The semi-insulating buffer layer is a semi-insulating GaN light emitting device manufacturing method. 16. The method of claim 15, The semi-insulating GaN is GaN doped with an electron acceptor. 18. The method of claim 16,  The electron acceptor is a doped light emitting device manufacturing method using an ion implantation technology.

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