KR101147768B1 - Apparatus and method for decoding using channel code - Google Patents

Abstract

The present invention relates to an encoding and decoding method. More specifically, the present invention relates to a method for encoding and decoding using low density parity check (LDPC) codes and a device for reducing hardware complexity in implementation and improving performance of encoding and decoding.

According to an aspect of the present invention, there is provided a method of transmitting and receiving data, the method comprising: receiving a Low Density Parity Check (LDPC) coded signal from a transmitting side; The parity check matrix is generated by adjusting the order of the rows or columns of the parity check matrix, wherein at least one of a group of a plurality of columns of the parity check matrix is at least one of which all elements are zero. Generating the parity check matrix comprising one row; And repeatedly decoding the received signal in units of groups using the generated parity check matrix.

Description

Apparatus and method for decoding using channel code}

1 is a diagram illustrating a parity check matrix H through a bipartite graph.

2A is an example in which the technical features of the present invention are applied to a wireless communication system.

2B is an example in which the technical features of the present invention are applied to an encoding apparatus.

FIG. 3 is a diagram illustrating that a base matrix is formed by a plurality of permutation matrices or zero matrices of z × z dimension.

4 is a diagram illustrating a method of shifting all rows (or columns) of a basic permutation matrix by a predetermined interval according to the present invention.

5 is a diagram illustrating an example of a parity check matrix divided into groups.

6 shows an example of a general parity check matrix using the base matrix.

7 illustrates an example of a parity check matrix provided according to an embodiment of the present invention using the base matrix.

8 shows an example of a general parity check matrix using the base matrix.

9 is a diagram illustrating a parity check matrix divided into four groups according to an embodiment of the present invention.

10 is a diagram illustrating a general parity check matrix divided into six groups.

11 is a diagram illustrating a parity check matrix divided into six groups according to an embodiment of the present invention.

12 is a block diagram illustrating an embodiment of an LDPC decoder according to the present invention.

13 is a diagram illustrating performance improvement to which one embodiment of the present invention is applied.

14 is yet another view illustrating a performance improvement to which an embodiment of the present invention is applied.

The present invention relates to an encoding and decoding method. More specifically, the present invention relates to a method for encoding and decoding using low density parity check (LDPC) codes and a device for reducing hardware complexity in implementation and improving performance of encoding and decoding.

Recently, a coding method using an LDPC code has emerged. The LDPC code was proposed by Gallagher in 1962 as a linear block code in which most of the elements of the parity check matrix Η are zero and low density. Since the LDPC code is so complex that it was impossible to implement with the technology at the time of the proposal, it has been forgotten and rediscovered in 1995. (Reference: [1] Robert G. Gallager, "Low-Density Parity-Check Codes", The MIT Press, September 15, 1963. [2] DJC Mackay, Good error-correcting codes based on very sparse matrices, IEEE Trans Inform.Theory, IT-45, pp. 399-431 (1999)).

The coding method using the LDPC code is as follows. In a general LDPC encoding method, a generation matrix G is derived from an LDPC parity check matrix H to encode an information bit. In order to derive the G matrix, H is composed of [P ^T : I] through a Gaussian Reduction method. When the number of bits of the information bit is k and the bit size of the codeword is n, the P matrix is a matrix whose row size is k column size nk, and I is the row size. Is an identity matrix whose k column size is k. The G matrix becomes [I: P] when the H matrix is expressed as [P ^T : I]. When an information matrix representing the information bits of k bits to be encoded is x (a matrix having a row size of 1 and a column size of k), the coded codeword c is as follows.

c = xG = [x: xP]

The decoding method using the LDPC code is as follows. In the decoding block of the receiving end, the information bit x must be obtained from the codeword c that is the result of the decoding of the transmitting end, which is found using the property of cH ^T = 0. That is, when the received codeword is c`, the value of c`H ^T is calculated, and if the result is 0, the first k bits of c` are determined as decoded information bits. c If the value of H <sup>T</sup> is nonzero, use the graph sum-product algorithm, the reliability propagation algorithm, and so on, to find c` where the value of c` H ^T satisfies zero. Find and repair x

1 is a diagram illustrating a parity check matrix H through a bipartite graph. In FIG. 1, CNU represents a Check Node Unit and VNU represents a Variable Node Unit. Decoding by applying an algorithm on a dichotomous graph can be largely described as three processes.

1. Update probability value from check node to variable node

2. Update probability value from bit node to check node

3. Determination of Decoding Value through Probability of Bit Node

First, in order to perform the first process, a first process of performing an update of the check node is performed through an initialization step in which a probability value received from a channel is input. After performing the first process, if a probability value from the variable node to the check node is updated, the second process is performed. After performing the first and second processes, a decoding value is determined using the probability values received from the channel and the probability values updated through the first and second processes.

In the decoding process, if the decoded value c` determined in the third process after the first and second processes satisfies the check expression c`H ^T = 0, the decoding value correctly received the value c` Otherwise, the first and second processes are repeated until the test equation is satisfied a predetermined number of times. In the process of updating the probability values in the first and second processes, each update process is repeated by the number of nonzero components of the parity check matrix, that is, the number of ones. That is, a check to variable update and a variable to check update of the first process are performed at a position corresponding to the weight of the parity check matrix H. As the first and second processes are repeated, the reliability of the probability value between the check node and the bit node is increased, and as a result, it is closer to the true value of the codeword to be obtained.

Recently, in the LDPC encoding, a method of encoding input data using the parity check matrix ƒ is generally used, instead of the generation matrix Ｇ. Therefore, as described above, in the coding method using the LDPC code, the parity check matrix ƒ is the most important factor. Since the parity check matrix ƒ has a size of about 1000 × 2000 or more, many operations are required in the encoding and decoding process, the implementation is very complicated, and a lot of storage space is required.

The present invention has been proposed to improve the prior art as described above, and an object of the present invention is to provide an LDPC encoding and decoding method and apparatus for performing LDPC encoding and decoding using a parity check matrix that can be easily processed in parallel. To provide.

Summary of the Invention

According to an aspect of the present invention, there is provided a method of transmitting and receiving data, the method comprising: receiving a Low Density Parity Check (LDPC) coded signal from a transmitting side; The parity check matrix is generated by adjusting the order of the rows or columns of the parity check matrix, wherein at least one of a group of a plurality of columns of the parity check matrix is at least one of which all elements are zero. Generating the parity check matrix comprising one row; And repeatedly decoding the received signal in units of groups using the generated parity check matrix.

In accordance with another aspect of the present invention, a data transmitting and receiving apparatus includes: a receiving module configured to receive a low density parity check (LDPC) coded signal from a transmitting side; The parity check matrix is generated by adjusting the order of the rows or columns of the parity check matrix, wherein at least one of a group of a plurality of columns of the parity check matrix is at least one of which all elements are zero. A parity check matrix generation module for generating the parity check matrix including one row; And a decoding module for repeatedly decoding the received signal in the group unit by using the generated parity check matrix.

In the data transmission / reception method and apparatus according to the present invention, a parity check matrix used for LDPC encoding of a transmission signal and LDPC decoding of a reception signal, wherein the parity check matrix includes a plurality of groups having at least two columns; The matrix is generated by adjusting the order of the rows or columns of the preset parity check matrix, and the at least one group includes at least one row in which all elements are zero. It is characterized by.

In the data transmission / reception method according to the present invention, the parity check matrix is generated by adjusting the order of rows or columns of the parity check matrix, and at least one of a group consisting of a plurality of columns of the parity check matrix. One may comprise: generating the parity check matrix including at least one row where all elements are zero; Low density parity check (LDPC) encoding data to be transmitted using the generated parity check matrix; And transmitting the encoded signal to a receiving side.

The apparatus for transmitting and receiving data according to the present invention generates a parity check matrix by adjusting the order of rows or columns of the parity check matrix, and includes at least one of a group consisting of a plurality of columns of the parity check matrix. One is a parity check matrix generation module for generating the parity check matrix including at least one row where all elements are zero; A coding module for encoding low density parity check (LDPC) encoding of data to be transmitted using the generated parity check matrix; And a transmitting module for transmitting the encoded signal to a receiving side.

Preferred of the present invention Example

Hereinafter, preferred embodiments of a coding method using a Low Density Parity Check (LDPC) code according to the present invention will be described with reference to the accompanying drawings. 2A is a view for explaining a preferred embodiment of the present invention, which is an example in which the technical features of the present invention are applied to a wireless communication system. Embodiments described below are merely examples for describing the features of the present invention, and it is apparent to those skilled in the art that the technical features of the present invention may be applied to all fields requiring encoding or decoding.

In FIG. 2A, the transmitter 10 and the receiver 30 perform communication via the radio channel 20. In the transmitter 10, k-bit source data u output from the data source 11 becomes n-bit codeword c by LDPC encoding in the LDPC encoder 13. The codeword c is wirelessly modulated by the modulator 15 and transmitted through the antenna 17 and received by the antenna 31 of the receiver 30 through the radio channel 20. The receiver 30 undergoes the reverse of the process that occurred at the transmitter 10. That is, the received data can be demodulated by the demodulator 33, and decoded by the LDPC decoder 35 to finally obtain the source data u. It is apparent to those skilled in the art that the data transmission and reception process as described above has been described within the minimum range necessary to explain the features of the present invention.

2b shows an LDPC encoding module used in the present invention. The parity check matrix Η used for encoding the input source data in the LDPC encoding module 13 has a dimension of (nk) × n. K denotes the length (bit unit) of the source data input to the LDPC encoding module 13, and n denotes the length (bit unit) of the coded codeword c. The parity check matrix ƒ may be formed by a plurality of permutation matrices or a zero matrix of z × z dimension, as shown in FIG. 3. In FIG. 3, P _{i , j} means a permutation matrix or a zero matrix of z × z dimension.

The plurality of permutation matrices are formed by modifying a predetermined rule from at least one base permutation matrix. Advantageously, said basic permutation matrix is an identity matrix. In addition, the plurality of permutation matrices including the one or more basic permutation matrices preferably have a weight of one row and one column. That is, it is preferable that only one element is 1 and the remaining elements are 0 among all elements of all rows and columns of the plurality of permutation matrices.

In one embodiment of the present invention, a predetermined rule for modifying the at least one basic permutation matrix to form the plurality of permutation matrices, shifting all rows (or columns) of the basic permutation matrix by a predetermined interval ( Consider a method of shifting. 4 is a diagram for explaining an example thereof. In Figure 4, the permutation of Figure 4 (a) basic permutation all rows in the presentation matrix by 5 lines in a downward direction (n _s = 5) in FIG. 4 to (or to the right by 3 columns all the columns), a shift (b) It is the formation of the presentation matrix. According to this method, it is possible to form (z-1) permutation matrices according to the interval of rows (or columns) shifted with respect to the basic permutation matrix in the z × z dimension (hence, the basic permutation matrix is included. Z permutation matrices are formed). Given the basic permutation matrix, each of the z permutation matrices including the basic permutation matrix may be represented by one integer. For example, the basic permutation matrix is represented by 0, the permutation matrix is shifted by one row to all rows of the basic permutation matrix by 1, and all the rows of the basic permutation matrix are shifted by 2 rows. All permutation matrices are expressed as a single integer, for example, by expressing the permutation matrices as 2.

As described above, the type of a plurality of permutation matrices formed from the basic permutation matrix can be simply expressed by one integer according to the number of rows (or columns) shifted. It is obvious that the types of the plurality of permutation matrices are represented by one integer and can be represented by other methods.

According to an embodiment of the present invention, in encoding or decoding using a parity check matrix ƒ, a plurality formed by shifting each row (or column) of the at least one basic permutation matrix and the at least one basic permutation matrix by a predetermined interval. The at least one base permutation matrix and the base matrix Η every time encoding or decoding is required at the transmitting side or the receiving side with the type of the permutation matrices of is stored in a base matrix Η _b . It is possible to generate a parity check matrix ƒ by using _b and to perform encoding or decoding by using the generated parity check matrix. As illustrated in FIG. 2B, an example of the LDPC encoding apparatus according to the embodiment of the present invention includes a memory module 131, a parity check matrix generation module 132, and an encoding module 134. The memory module 131 stores the basic permutation matrix and the basic matrix. The base matrix generation module 132 generates the parity check matrix by using the base permutation matrix and the base matrix stored in the memory module 131. The encoding module 134 encodes input source data using the parity check matrix generated by the parity check matrix generation module 132. It will be apparent to those skilled in the art that the parity check matrix generation module 132 and the encoding module 134 may be implemented by software or hardware according to each function.

When the basic matrix Η _b is divided into two parts Η _d and Η _p having the structure of [H _d ｜ H _p ], the Η _p part generally uses a block dual diagonal matrix. It is preferred, but not limited to. The block double diagonal matrix means that the main diagonal and the diagonal immediately below or above the main diagonal are both unitary matrices and the rest are all zero matrices. When the Η _p portion is a block double diagonal matrix, a column having a column weight of 1 is generated in the Η _p portion. In order to avoid this, it is preferable to replace one or two zero matrices with a unit matrix.

Hereinafter, a method of decoding an LDPC code using the basic matrix ƒ _b as described above will be described. Hereinafter, a decoding method will be described based on the base matrix for convenience of description, but decoding according to the present invention is not limited to the base matrix. That is, the parity check matrix may be obtained through a specific device or algorithm included in the decoder or outside the decoder without being generated from the base matrix. Thus, there is no limitation on how the parity check matrix is generated.

The decoding of a conventional LDPC code is mainly performed by repeating a process of increasing reliability by updating probability values between check nodes and bit nodes on a dichotomous graph, which is another representation of a parity check matrix. In the decoding method using a dichotomy graph, which is another representation of the parity check matrix, the codeword is determined based on the updated probability value. Therefore, the process of updating the probability value that determines the codeword is a performance of the decoder. Will have a direct impact on

The reliability update process can be broadly divided into the process of updating the probability value from the check node to the bit node and the process of updating the probability value from the bit node to the check node. When updating the probability value from the check node to the bit node, or updating the probability value from the bit node to the check node, the probability value is placed in the same column except for the value whose probability is updated. , Update their probability values using the probability values in the same row. At this time, the probability value to be used has a more reliable result, that is, a more positive effect on the decoder, depending on how many times the probability value is used.

Hereinafter, an LDPC decoding method that has a more positive effect on the decoding method will be described. According to an embodiment of the present invention, a decoding method having a positive influence on decoding is used. The column of the parity check matrix H used for encoding and decoding an LDPC code is divided into groups. It uses shuffled decoding, which is divided into and repeated decoding. The shuffled decoding may also perform a decoding step by updating a probability value between a check node and a variable node on a dichotomous graph as in decoding of a general LDPC code. However, in the shuffled decoding, the probability value is updated in the divided group unit in the process of updating the probability value from the check node to the bit node.

When the probability value is updated by performing an operation on one group and the operation for updating the probability value is performed on the next group, the next group is used by using the probability value calculated in the one group. By updating the probability value of, the more reliable probability value is used for the decoding process, that is, the probability value update. That is, in the process of updating the probability value from the check node to the bit node, instead of uniformly using the previously updated probability value, it is divided and updated for each group. As a result, when this probability value update is repeated, a more reliable probability value is used for the next probability value update, thereby increasing the reliability of the probability value between the check node and the bit node, thereby improving the performance of the decoder. 5 is a diagram illustrating an example of a parity check matrix divided into groups. The illustrated matrix is an example of a basic matrix for explaining the shuffled decoding method. In the illustrated numbers, -1 represents a zero matrix and an integer of 0 or more represents the shift number described above.

While shuffled decoding has the same advantages as described above, in actual implementation, the amount of computation may be larger than that of an LDPC decoder using a conventional algorithm. In terms of the algorithm, the calculation amount of the decoder according to the conventional LDPC decoding algorithm and the decoder using the shuffled decoding are the same. However, in the case of the conventional LDPC decoder, the algorithm can be applied in a form that can reduce the amount of computation, whereas the decoder using the shuffled shuffled decoding cannot apply the algorithm in a form that can reduce the amount of computation due to its characteristics. The amount of calculation can be relatively high. The standard BP (Belief Propagation) algorithm, which is one of the algorithms for decoding an LDPC code, is as follows.

The algorithm may include an initialization step for setting a variable for iterative decoding, a probability value update step (Step 1) including a check node update step (Horizontal Step) and a bit node update step (Vertical Step), and the update. And performing a hard decision based on the determined probability value (Step 2), and outputting the determined value (Step 3). The equation used in the algorithm is as follows.

H: Parity check matrix

M (n) = {m | H _mn = 1}: The set of check nodes connected to the nth bit node.

N (m) = {n | H _mn = 1}: set of bit nodes connected to the m th check node

: i번째 반복(iteration)에서 n번째 비트 노드에서 m번째 검사 노드로 연결된 LLR(Log Likelihood Ratio) 값

: Log Likelihood Ratio (LLR) value connected from the nth bit node to the mth check node in the i iteration

: i번째 반복에서 n번째 비트 노드의 사후 LLR 값 (a posterior LLR value)

: posterior LLR value of the nth bit node in the i iteration

: i번째 반복에서 m번째 검사 노드에서 n번째 비트 노드로 갱신되는 LLR 값

: LLR value updated from the mth check node to the nth bit node in the i iteration

: i번째 반복에서 m번째 검사 노드에서 n번째 비트 노드로 갱신되는 LLR 값을 계산하기 위한 중간변수(dummy variable)

: Dummy variable for calculating the LLR value updated from the m th check node to the n th bit node in the i iteration

m: check node Index of parity check matrix of the parity check matrix, i.e., m denotes a row number

n is a variable node index of parity check matrix, that is, j is a column number of the parity check matrix.

을 구하기 위해서는, In case of decoding the received signal through the LDPC decoding algorithm as described above, in the test node update step (Horizontal Step) of the probability value update step (Step 1)

To save

와 같은 연산을 구해야 한다. 실제 복호기를 구현함에 있어, 상기

항은 검사 노드 갱신이 수행될 때마다 매번 계산되는 것은 아니며, 미리 계산해둔 값을 사용하여 계산량을 감소시킨다. 상기

항 같은 경우에는 확률 값 갱신을 위한 다른 연산에 비해 상대적으로 계산량이 많은 곱하기 연산과 지수 연산이 포함되어 있으므로, 상기와 같은

항을 미리 계산해둔 값을 이용하여 처리하면 계산량을 상당히 감소시킬 수 있다.

You should get an operation like In implementing the actual decoder,

The term is not calculated every time the check node update is performed, and the calculated amount is reduced by using a precalculated value. remind

In the case of a term, a multiplication operation and an exponential operation, which have a relatively large amount of calculation compared to other operations for updating a probability value, are included.

Processing the terms using precomputed terms can significantly reduce the computation.

), 즉 계산의 복잡도를 표현하면 다음과 같다.The decoder using the shuffled decoding may also reduce the amount of calculation using the method described above, but the group of the calculation divides the parity check matrix by a unique feature of the decoder using the shuffled decoding. Can be increased in proportion to the number. Decoding complexity of the decoder using the shuffled decoding

In other words, the complexity of the calculation is as follows.

X _BP <= X _SD <= g X _BP

)는 종래의 복호 방법의 복호 복잡도(

)에 비해 더 복잡하게 되며, 최악의 경우에는 상기 그룹(group)의 개수(

)에 선형적으로 비례하여 증가하는 문제가 발생할 수 있다.That is, the decoding complexity of the decoder using the shuffled decoding (

) Is the decoding complexity of the conventional decoding method (

More complex than, and in the worst case, the number of groups (

May increase linearly in proportion to

An embodiment of the present invention provides a method of designing a parity check matrix that reduces the decoding complexity. In the shuffled decoding method, the decoding accuracy is excellent because it repeatedly decodes a reliable decoding message value in performing a check node update, but there is a problem that the complexity increases in terms of computational complexity. An embodiment of the present invention provides a parity check matrix that reduces the complexity of such an operation and a decoding method using the parity check matrix.

6 and 7, a case of performing shuffled decoding using a general parity check matrix and a case of performing shuffled decoding using a parity check matrix according to an embodiment of the present invention will be described.

6 shows an example of a general parity check matrix using the base matrix. Among the illustrated numbers, -1 represents a zero matrix, an integer of 0 or more represents a shift number, and each column of the basic matrix is distinguished by an index from 0 to 23. 7 illustrates an example of a parity check matrix provided according to an embodiment of the present invention using the base matrix. Among the illustrated numbers, -1 represents a zero matrix, and an integer of 0 or more represents a shift number. In FIG. 7, the parity check matrix illustrated is divided into four groups. The decoder according to the present embodiment sequentially and repeatedly decodes a received signal in units of the four groups. In FIG. 7, the shaded portion represents a permutation matrix having an integer of 0 or more and having at least one weight (weight of a row or column), and the shaded portion represents a zero matrix as -1. Thus, the unshaded part represents the area where no weight exists. An embodiment of the present invention provides an LDPC decoding method using a parity check matrix in the form as shown in FIG. 7 while minimizing computation while maintaining performance corresponding to a general shuffled decoding scheme. When decoding is performed using the parity check matrix of FIG. 7, the number of unshaded portions is greatly increased compared to the parity check matrix of FIG. 6, thereby reducing the complexity of the calculation.

항과 같이 복잡한 계산을 요하는 계산식은 검사 노드 갱신이 수행될 때마다 매번 계산되는 것은 아니며, 미리 계산해둔 값을 사용하는 알고리즘을 사용한다. Shuffled 복호기가 상기와 같은 계산량을 감소시키는 알고리즘을 사용하는 경우에, 도 6에 도시된 일반적인 패리티 검사 행렬을 사용하여 수신 신호를 복호화하면 계산량이 증가한다. 가령 도 6의 패리티 검사 행렬을 4개의 그룹으로 구분하는 경우, 4 개의 그룹 내에 행(row) 방향으로 영 행렬만이 존재하는 부분이 거 의 존재하지 않는다. 따라서, 도 6의 패리티 검사 행렬을 이용하여 수신신호에 대한 확률 값을 갱신하는 경우 각 그룹에 대하여 검사 노드 갱신을 수행할 때마다, 상기

항을 새롭게 계산해야한다. 그러나, 본 발명의 일 실시예에 따른 도 7의 패리티 검사 행렬을 이용하여 수신 신호를 복호화하면, 특정한 그룹 내에 행(row) 방향으로 영 행렬만이 존재하는 부분이 다수 존재하게 된다. 따라서, 도 7의 패리티 검사 행렬을 이용하여 수신 신호에 대한 확률 값을 갱신하는 경우 행(row) 방향으로 영 행렬만이 존재하는 부분에 대해서는 무게(weight)가 존재하지 않으므로, 상기

항을 새롭게 계산할 필요가 없다. As described above, when the shuffled decoder is actually implemented,

Expressions that require complex calculations, such as terms, are not calculated each time a check node update is performed, but use an algorithm that uses the values calculated beforehand. In the case where the shuffled decoder uses an algorithm that reduces the amount of computation described above, the amount of computation increases when the received signal is decoded using the general parity check matrix shown in FIG. For example, when the parity check matrix of FIG. 6 is divided into four groups, almost no zero matrix exists in the row direction within the four groups. Therefore, when updating the probability value for the received signal using the parity check matrix of FIG. 6, each time the check node is updated for each group,

The term must be newly calculated. However, when the received signal is decoded using the parity check matrix of FIG. 7 according to an embodiment of the present invention, there are many parts in which only a zero matrix exists in a row direction within a specific group. Therefore, when the probability value for the received signal is updated using the parity check matrix of FIG. 7, since there is no weight for the portion where only the zero matrix exists in the row direction,

There is no need to recalculate the term.

The parity check matrix of FIG. 7 includes a zero matrix by a certain number in the row direction. In addition, the number of zero matrices formed in the row direction is preferably determined according to the size of groups divided for shuffled decoding. For example, the parity check matrix of FIG. 7 is divided into four groups of the same size, with one group having a size of six (but according to the size of each permutation matrix forming the basic matrix of FIG. 7). Is variable). Therefore, it is preferable that the number of zero matrices continuously formed in the row direction is six.

The parity check matrix as shown in FIG. 7 may be generated by various methods. For example, the parity check matrix as in the present embodiment is generated by using information stored in a storage device provided inside or outside the decoder in the form shown in FIG. 7 or by using the general parity check matrix of FIG. 6. A parity check matrix can be generated. An example of a method of generating the parity check matrix of this embodiment will be described below using a general parity check matrix. The index of the column of the parity check matrix of FIG. 6 is 0-> 2-> 4-> 6-> 8-> 10-> 1-> 3-> 5-> 7-> 9-> 11-> 12-> 13-> 14-> 15-> 16-> 17-> 18-> 19-> 20-> 21-> 22-> 23 in order to obtain the parity check matrix of FIG. Therefore, it is possible to receive the signal generated by the encoder using the parity check matrix of FIG. 6 using a decoder using the parity check matrix of FIG. However, a codeword generated when performing LDPC encoding using FIG. 6 is different from a codeword generated using FIG. 7. Accordingly, in order to decode a signal generated by an encoder using the parity check matrix of FIG. 6, the signal is decoded using a decoder using the parity check matrix of FIG. 7. It should be readjusted according to the adjusted rules.

8 to 11 are diagrams for explaining a difference in computational complexity when decoding a received signal using a general parity check matrix and the parity check matrix according to the present embodiment. Hereinafter, the complexity of calculating the parity check matrix according to an embodiment of the present invention will be described with reference to the accompanying drawings.

항과 같은 복잡한 수학 연산이 요구된다. 8 is a diagram illustrating a general parity check matrix divided into four groups. 8 shows an example of a general parity check matrix using the base matrix. In FIG. 8, the shaded portion indicates that at least one component having weight in the row direction exists in each of the four groups, and the shaded portion is a row. It refers to a component having no weight in the (row) direction, that is, a portion consisting of only zero matrices. When the parity check matrix of FIG. 8 is divided into four groups having six row components, there is one portion in each group whose components of the matrix are all zero matrices in the row direction. If one row having six components is referred to as one set, the one group consists of eight sets, and the entire parity check matrix consists of 32 sets. As described above, since shuffled decoding performs check node updating in units of groups, when decoding a received signal using the parity check matrix of FIG.

Complex mathematical operations such as terms are required.

항과 같은 복잡한 수학 연산을 수행한다. 따라서, 본 발명의 일 실시예에 따른 패리티 검사 행렬을 이용하는 것이 도 8의 일반적인 패리티 검사 행렬을 이용하는 경우에 비하여 유리하다. 9 is a diagram illustrating a parity check matrix divided into four groups according to an embodiment of the present invention. In FIG. 9, the shaded portion indicates that at least one component having weight in the row direction exists in each of the four divided groups. It represents the component which does not have weight in the direction of row), that is, the portion which consists only of a zero matrix. In the case of dividing the parity check matrix of FIG. 9 into four groups having six row components, there are seven portions in each group whose components are all zero matrices in the row direction. Therefore, when the parity check matrix of FIG. 9 is used, only 25 sets of the 32 sets are used.

Perform complex mathematical operations such as terms. Therefore, it is advantageous to use the parity check matrix according to an embodiment of the present invention as compared to the case of using the general parity check matrix of FIG. 8.

항과 같은 복잡한 수학 연산이 요구된다. 10 is a diagram illustrating a general parity check matrix divided into six groups. In FIG. 10, the shaded portion indicates that at least one component having weight in the row direction exists in each of the six groups, and the shaded portion is represented by a row ( It represents the component which does not have weight in the direction of row), that is, the portion which consists only of a zero matrix. When the parity check matrix of FIG. 8 is divided into six groups having four row components, there are five portions in each group in which the components of the matrix are all zero matrices in the row direction. If one row having four components is referred to as one set, the one group consists of eight sets, and the entire parity check matrix consists of 48 sets. As described above, since shuffled decoding performs check node updating in units of groups, when decoding a received signal using the parity check matrix of FIG. 10, 43 sets of the 48 sets are used.

Complex mathematical operations such as terms are required.

항과 같은 복잡한 수학 연산을 수행한다. 따라서, 본 발명의 일 실시예에 따른 패리티 검사 행렬을 이용하는 것이 도 10의 일반적인 패리티 검사 행렬을 이용하는 경우에 비하여 유리하다. 11 is a diagram illustrating a parity check matrix divided into six groups according to an embodiment of the present invention. In FIG. 11, the shaded portion indicates that at least one component having weight in the row direction exists in each of the six groups. It represents the component which does not have weight in the direction of row), that is, the portion which consists only of a zero matrix. When the parity check matrix of FIG. 11 is divided into six groups having four row components, there are 21 portions in each group whose components are all zero matrices in the row direction. Therefore, when the parity check matrix of FIG. 11 is used, only 27 sets of the 48 sets are used.

Perform complex mathematical operations such as terms. Therefore, using the parity check matrix according to an embodiment of the present invention is advantageous compared to the case of using the general parity check matrix of FIG. 10.

Hereinafter, an LDPC decoder for performing an LDPC decoding operation using various basic matrices proposed by the present invention will be described. 12 is a block diagram illustrating an embodiment of an LDPC decoder according to the present invention. The LDPC decoder 1000 includes a check node update unit (CNU) block 1100, a control block 1200, a variable node update unit (VNU) block 1300, and a memory block 1400. The check node update unit (CNU) block 1100 performs a check node update of a check node and includes at least one check node update unit (CNU) 1110. The CNU 1110 is a processing unit that performs a probability value update of the check node. The control block 1200 may include a control unit 1210 for controlling an operation of each unit of the decoder 1000, and the CNU block 1100 and the memory block 1400 according to a structure of a parity check matrix. A parity check matrix index that stores the CNU routing network 1220 for controlling, the VNU routing network 1230 for controlling the VNU block 1100 and the memory block 1400, and information on the structure of the parity check matrix. The storage unit 1240 includes a hard decision unit 1250 that determines a decoding value using the updated probability value and checks the determined decoding value. The variable node update unit (VNU) block 1100 performs a variable node update of a bit node and includes at least one variable node update unit (VNU) 1310. The VNU 1310 is a processing unit that performs a probability value update of the check node. The CNU 1110 and the VNU 1310 controlled by the control block 1200 calculate and update probability values for non-zero components of the H matrix, and the calculated probability values are stored in the memory unit 1400. ) The memory unit 1400 includes an R-memory 1410 storing a probability value calculated for updating a probability value from a check node to a bit node, and a probability calculated for updating a probability value from a bit node to a check node. Received LLR memory 1420 that stores a value (e.g., a Log Likelihood Ratio value received from a wireless channel) and a computed probability value for updating the probability value from the bit node to the check node. Q-memory 1430.

의 검사식을 만족하는 경우 상기 복호 값(c')을 참값으로 출력하고, 만약 상기 검사식을 만족하지 못하는 경우 일정한 최대 반복 복호 횟수 이내에서 복호를 반복한다. Each of the units described above is as follows. The received LLR memory 1420 is a memory capable of storing a probability value for a received signal to be decoded, for example, an LLR value for a codeword of the received signal. In addition, the R-memory 1410 stores a result of a check node update at a specific check node, and the Q-memory 1430 has a variable node update at a specific bit node. Save the result. The control unit 1210 controls the operation order of each unit and the operation timing of each unit, and the parity check matrix index storage unit 1240 stores information regarding the position of the weight of the parity check matrix. . In addition, the CNU routing network 1220 obtains information on the parity check matrix from the parity check matrix index storage 1240 to properly connect the memories of the CNU 1110 and the memory 1400. do. In addition, the VNU routing network 1230 obtains information on the parity check matrix from the parity check matrix index storage 1240 to properly connect memories of the VNU 1310 and the memory 1400. do. The hard decision unit 1250 is a unit that determines a decoding value by using the Q-memory 1430 and checks the determined decoding value c '.

If the test equation is satisfied, the decoding value c 'is output as a true value. If the test equation is not satisfied, the decoding is repeated within a predetermined maximum number of repeated decoding times.

The decoder 1000 of FIG. 12 decodes a received signal using a parity check matrix stored in a separate memory (not shown) or the parity check matrix index storage unit 1240, or generates a base signal and a base permutation matrix. The received signal may be decoded using the parity check matrix. When generating a parity check matrix through the basic matrix and the basic permutation matrix, the decoder 1000 stores a storage unit (not shown) for storing the basic matrix and the basic permutation matrix, and the basic matrix and the basic permutation. It is preferable to include a parity check matrix generator (not shown) for generating the parity check matrix using a matrix. In addition, the decoder 1000 of FIG. 12 may generate a new parity check matrix by adjusting the order of rows or columns of the parity check matrix. In this case, the decoder 1000 preferably includes a parity check matrix adjusting unit (not shown) for adjusting the order of the rows or columns of the parity check matrix.

13 is a diagram illustrating performance improvement to which one embodiment of the present invention is applied. As shown in the figure, it can be seen that the performance is better when the shuffled decoding method of performing the decoding by dividing the parity check matrix into six groups as compared with the conventional LDPC decoding algorithm. In addition, even in the case of performing decoding by increasing the set including the zero matrix in the row direction in performing shuffled decoding, it can be seen that the performance is improved as compared with the conventional LDPC decoding algorithm. In addition, according to an embodiment of the present invention, there is a difference between performance when decoding is performed by increasing a set including zero matrixes in a row direction and performance when using a shuffled decoding method without adjusting the position of the zero matrix. It can be seen that no difference exists. Therefore, when decoding is performed using the parity check matrix according to an embodiment of the present invention, it is possible to reduce the complexity of calculation and maintain excellent performance.

14 is yet another view illustrating a performance improvement to which an embodiment of the present invention is applied. In the figure, shuffled_group represents the number of groups for dividing the parity check matrix, and the number of repetitions represents the number of iterations for LDPC decoding. The results shown represent results when the code rate is 2/3. When shuffled decoding is performed using the parity check matrix according to the present embodiment, performance may be improved by increasing the number of shuffled_groups as shown.

It will be apparent to those skilled in the art that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. Accordingly, the above detailed description should not be construed as limiting in all aspects and should be considered as illustrative. The scope of the invention should be determined by reasonable interpretation of the appended claims, and all changes within the equivalent scope of the invention are included in the scope of the invention.

Effects of the decoding method using the LDPC code according to the present invention are as follows.

First, decoding complexity can be reduced by at least 40% compared to the parity check matrix of the basic LDPC code.

Second, compared to the parity check matrix of the conventional LDPC code, the complexity can be maintained while maintaining low complexity.

Claims (15)

Receives a signal encoded using a first parity check matrix of a low density parity check (LDPC) from a transmitting side, wherein the first parity check matrix comprises a plurality of z * z dimensions (z is a positive integer) a plurality of z * z dimensional permutation matrices formed by shifting a row or column of a * z-dimensional unit matrix by a predetermined interval in a specific direction; A second parity check matrix is generated by adjusting the order of rows or columns of the first parity check matrix, wherein X (Y is a positive integer greater than 1) each includes X columns. Generating the second parity check matrix such that X is a positive integer greater than 1 and at least one of the X groups includes at least one row where all elements are zero; And And repeatedly decoding the received signal in the group unit by using the second parity check matrix. Decoding method using channel code. The method of claim 1, The second parity check matrix is [H _d | H _p ], wherein H _p is a block double diagonal matrix, and H _d comprises at least one group comprising at least one row where all elements are zero, Decoding method using a channel code characterized in that. The method according to claim 1 or 2, The first parity check matrix is

, Here, '-1' represents a z * z-dimensional zero matrix, and each non-negative integer z is generated by shifting a row or column of the z * z-dimensional unit matrix by the corresponding non-negative integer in the specific direction. to represent the z-dimensional permutation matrix, Decoding method using a channel code characterized in that. The method of claim 1, wherein the iterative decoding is performed. Calculating a probability value for the received signal in the group unit by using the second parity check matrix; And Determining a decoding value using the calculated probability value. Decoding method using a channel code characterized in that. 5. The method of claim 4, And checking whether the determined decoded value is a correctly received value. Decoding method using a channel code characterized in that. Receives a signal encoded using a first parity check matrix of a low density parity check (LDPC) from a transmitting side, wherein the first parity check matrix comprises a plurality of z * z dimensions (z is a positive integer) a receiving module including a plurality of z * z dimensional permutation matrices formed by shifting a row or column of a * z-dimensional unit matrix by a predetermined interval in a specific direction; A second parity check matrix is generated by adjusting the order of rows or columns of the first parity check matrix, wherein X (Y is a positive integer greater than 1) each includes X columns. A parity check matrix generation module for generating the second parity check matrix such that X is a positive integer greater than 1 and at least one of the X groups includes at least one row where all elements are zero. ; And And a decoding module which repeatedly decodes the received signal in the group unit by using the second parity check matrix. Decoding apparatus using a channel code. The method of claim 6, The second parity check matrix is [H _d | H _p ], wherein H _p is a block double diagonal matrix, and H _d comprises at least one group comprising at least one row where all elements are zero, Decoding apparatus using a channel code characterized in that. 8. The method according to claim 6 or 7, The first parity check matrix is

, Here, '-1' represents a z * z-dimensional zero matrix, and each non-negative integer z is generated by shifting a row or column of the z * z-dimensional unit matrix by the corresponding non-negative integer in the specific direction. to represent the z-dimensional permutation matrix, Decoding apparatus using a channel code characterized in that. The method of claim 6, wherein the decoding module, At least one check node updating unit performing a probability value update of the check node with respect to the received signal in the group unit by using the second parity check matrix; At least one bit node updating unit for performing a probability value update of a bit node with respect to the received signal by using the second parity check matrix; And It includes a decoding value determination unit for determining a decoding value by using the updated probability value Decoding apparatus using a channel code characterized in that. 10. The method of claim 9, And a checking module for checking whether the determined decoded value is a correctly received value. Decoding apparatus using a channel code characterized in that. Multiple z * z dimension permutations formed by shifting rows or columns of a plurality of z * z dimensions (z is a positive integer) and m Generate a second parity check matrix by adjusting the order of the rows or columns of the first parity check matrix including the matrix, each containing Y columns (Y being a positive integer greater than 1). Generating the second parity check matrix such that the second parity check matrix is divided into groups of X (where X is a positive integer greater than 1) and at least one of the X groups includes at least one row in which all elements are zero; Low density parity check (LDPC) encoding of data to be transmitted using the second parity check matrix; And Transmitting the encoded signal to a receiving side; Encoding method using channel code. Multiple z * z dimension permutations formed by shifting rows or columns of a plurality of z * z dimensions (z is a positive integer) and m Generate a second parity check matrix by adjusting the order of the rows or columns of the first parity check matrix including the matrix, each containing Y columns (Y being a positive integer greater than 1). Parity check generating the second parity check matrix such that the second parity check matrix is divided into groups of X (X is a positive integer greater than 1) and at least one of the X groups includes at least one row in which all elements are zero. Matrix generation module; A coding module configured to perform low density parity check (LDPC) encoding on data to be transmitted using the second parity check matrix; And A transmitting module for transmitting the encoded signal to the receiving side, Encoder using channel code. delete delete delete

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