KR101139921B1 - MVP Probe Card Board Manufacturing Method For Wafer Level Test - Google Patents

MVP Probe Card Board Manufacturing Method For Wafer Level Test Download PDF

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KR101139921B1
KR101139921B1 KR1020100034440A KR20100034440A KR101139921B1 KR 101139921 B1 KR101139921 B1 KR 101139921B1 KR 1020100034440 A KR1020100034440 A KR 1020100034440A KR 20100034440 A KR20100034440 A KR 20100034440A KR 101139921 B1 KR101139921 B1 KR 101139921B1
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South Korea
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ceramic
main pcb
insulator
hole
wire
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KR1020100034440A
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Korean (ko)
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KR20110115005A (en
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이동욱
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주식회사 브리지
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Abstract

The present invention relates to a method for manufacturing micro via wire plating (MWP) for wafer level testing, and to a MFP board manufactured by the method, which is mounted on a probe card that tests electrical characteristics of a semiconductor device and performs signal processing while communicating with a main PCB. An MGP manufacturing method for a wafer level test constituting a sub-PCB as a ceramic guide; A hole processing step of processing a fine through hole in a ceramic plate serving as a base; A wire insertion step of inserting an enameled wire for signal processing, power, and ground into the through hole formed through the hole processing step; A signal connection step of soldering a hole and a wire of the main PCB for electrical connection of the wire inserted into the main PCB and joining a capacitor for noise removal and power supply to or immediately adjacent to the site; An epoxy resin coating step of filling an epoxy resin in the inner wall of the through hole and the ceramic to improve fixability and insulation; Polishing the ceramic cross section to which the wire is fixed to make a shape of a cross-section pad of the wire to which the probe head can contact; It provides a wafer level test MFP manufacturing method comprising the step of forming a plating layer on the end face pad of the wire.
According to the present invention, by connecting the sub-PCB and the main PCB in the shortest distance through the wire through the wire directly, high speed processing, stable signal transmission at high frequency, fine pitch design and high current, low resistance, low loss of more than 1A It is possible to achieve the effect of securing sufficient price competitiveness because of its simple structure.

Description

MVP Probe Card Board Manufacturing Method For Wafer Level Test

The present invention relates to a micro via wire plating (MBP) probe card board for wafer level testing, and more particularly, by using alloy wire coated with an insulator, connecting directly from the ceramic to the main PCB at the shortest distance and reducing the length of the wire. MMP probe card board for wafer level test that enables stable signal transmission at high speed and high frequency and high current, low resistance, and low loss over 1A, while responding to fine pitch required by a prop card. It is about.

In general, semiconductor devices (LOGIC, CPU, Memory Device, etc.) have a fabrication process of forming a pattern on a wafer, and a patterned wafer is assembled into each chip. It is manufactured through an assembly process.

In addition, between the fabrication process and the assembly process, there is a process called EDS (Electrical Die Sorting) that inspects electrical characteristics of each chip constituting the wafer.

This EDS process is a process for discriminating defective chips among the chips constituting the wafer. The EDS process applies an electrical signal to the chips constituting the wafer and mainly determines an inspection device that determines the defect based on a signal checked from the applied electrical signal. I use it.

The electrical inspection of each chip constituting the wafer mainly uses a probe device called a probe card having a plurality of needles that come into contact with the patterns of the respective chips to apply an electrical signal. If it is determined that the result of the test using the product is good, the semiconductor device is manufactured as a finished product by a post-process such as packaging.

The electrical property inspection using the probe card of the semiconductor wafer is usually conducted by applying a specific current through the needle while making the needle of the probe card contact the electrode pad of each device of the wafer (eg wafer level test). To measure.

On the other hand, in recent years, as semiconductor device devices have become more refined as design rules become more integrated and miniaturized at the same time, an appropriate inspection apparatus is required for the inspection of such semiconductor devices.

The probe card used in such an inspection process includes a plurality of probe needles in direct contact with the pads of the wafer for large testing, a supporter supporting the probe needles, a test head and a probe needle of the tester. It consists of a printed circuit board (Printed Circuit Board) connected with the probe needle to transmit the electrical signal therebetween.

However, as described above, in recent years, due to the high integration of semiconductor devices, the pitch spacing implemented on the substrate is extremely small. To solve this problem, a method of forming a probe card is similar to that of a MEMS (Micro electro mechanical system; MEMS). A method of producing a probe card by using a) process has been attempted.

For example, a counterpart may be used by using a sub PCB, which is an expensive product such as MLC (Multi-Layered Ceramic) or MLO (Multi-Layered Organic).

In the case of MLC and MLO, there is no big problem in the electrical characteristics or speed, but it is too expensive and the cost burden is large, and it is not easy to realize fine pitch of 0.08mm or less by design. There was a problem that can not but limit the application.

In order to solve the problem of price and fine pitch, a method of replacing a sub-PCB by inserting a wire into ceramic has emerged.

However, conventional methods using ceramics and wires have limitations in implementing high speed characteristics, low resistance, and low losses because they have connection length and structural limitations.

For example, as shown in FIG. 1, a wide hole is made in the center of the main PCB 200, and solder 210 is formed on the outer side of the main PCB 200 by passing through the enameled wire 102 connected from the ceramic 100. It is implemented in a fixed connection configuration.

As such, the signal line connection structure between the ceramic 100 and the main PCB 200 disclosed in the conventional probe card is considerably long or bypassed, so that the signal processing speed is inevitably slowed down, and thus, the stability during signal transmission is significantly reduced. The enameled wire 102 was exposed to the outside, so there was a problem of disconnection and appearance.

In addition, in the case where a lot of parts are mounted due to overlapping holes for soldering 210 at the center and the outside of the main PCB 200, there is a problem that the space is limited.

The present invention was created in view of the above-described limitations in the prior art, and is a test board for a prop card that is used to test the characteristics of semiconductor devices, and simplifies the connection structure between the sub-PCB and the main PCB. High speed processing is possible by shortening the distance, stable signal transmission and fine pitch (0.08mm or less) design is possible at high frequency, and signal line is capable of processing high current of 1A or more, and realizes low resistance and low loss, and is suitable for current semiconductor devices. The main challenge is to provide an MBP probe card board for wafer level testing which can improve the electrical and physical properties with sufficient price competitiveness.

According to an aspect of the present invention, there is provided a method of manufacturing a micro via wire plating (MVP) probe card board for wafer level testing for testing electrical characteristics of a semiconductor device; A hole processing step of processing fine through holes in the ceramic to be a base; A wire insertion step of inserting an alloy wire coated with an insulator for signal processing, power and ground into the ceramic and main PCB in a straight form in the through hole formed through the hole processing step; A signal connection step of bonding the wires and the wires of the main PCB to the main PCB for soldering through the solder; Epoxy resin coating step of fixing the wire by filling the epoxy resin in the inner wall of the through-hole and the hollow space of the ceramic or the epoxy resin injection hole of the main PCB by inserting the alloy wire coated with the insulator inserted through the insertion step, and increase the robustness of the ceramic; ; Ceramic polishing step of polishing the ceramic cross section fixed with the alloy wire coated with the insulator to form a cross-sectional pad shape so as to have a planar shape in the cross section of the alloy wire coated with the insulator to which the probe head can contact; ; It provides a wafer level test MVP probe card board manufacturing method comprising the step of forming a plating layer on the end face pad of the alloy wire coated with the insulator.

Further, in the present invention, the hole processing step is to connect the alloy wire coated with the insulator, which is a signal line inserted into the ceramic, to the upper main PCB, the position of the ceramic hole as the guide supporting the lower signal line and the upper main PCB. It provides a method for manufacturing an MVP probe card board for wafer level testing, characterized in that a signal line is inserted into a through hole designated from a lower part to an upper part, and each soldered part of the upper part of the main PCB is soldered and connected.

In addition, in the present invention, the signal connection step is soldered at the top of the main PCB, for the electrical connection of the alloy wire coated with an insulator inserted into the main PCB side, the part or side of the noise removing and power supply is a component Provided is a method for manufacturing an MVP probe card board for wafer level testing, characterized in that a capacitor (Bypass Capacitor) is attached to the configuration.

In addition, in the present invention, the step of applying the epoxy resin is applied to the first epoxy resin on the surface of the ceramic, in order to connect the alloy wire coated with the insulator, which is a signal line connecting between the lower ceramic and the upper main PCB. The present invention provides a method for manufacturing a MVP probe card board for wafer level testing, wherein the secondary coating is applied through an epoxy resin injection hole of a main PCB to increase fixation and insulation of signal lines.

According to the present invention, by connecting the sub-PCB and the main PCB within the shortest distance by directly penetrating through the through-hole alloy wire coated with an insulator, high speed processing, stable signal transmission at high frequency, fine pitch design and more than 1A High current, low resistance and low loss can be realized, and the structure is simple, and sufficient price competitiveness can be obtained.

1 is a cross-sectional view of a main part showing a probe card according to the prior art;
2 is a flowchart illustrating a manufacturing process of an MVP probe card board for wafer level testing according to the present invention;
3 is a view showing a manufacturing process of the MVP probe card board for wafer level testing according to the present invention,
4 is a sectional view showing the principal parts of an MVP probe card board according to the present invention.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

Method for manufacturing MPP for wafer level test according to the present invention and MPP probe card board manufactured by the method is to implement a fine pitch (0.08mm or less) using a unique design technology called MVP (Micro Via Wire Plating) It is.

At this time, the MV (Micro Via Wire Plating) is a term defined by the present invention, the through-hole 110 in the ceramic 100, the alloy wire 130 coated with an insulator in the through-hole 110 This means that the signal processing is implemented by inserting.

In addition, the MBP probe card board manufactured by the MVP (Micro Via Wire Plating) manufacturing method is used for the level test of the wafer, for example, it is mounted to the probe head (Probe Head) and used for the level test of the wafer. This is the same as the MLC or MLO described above.

More specifically, as shown in FIGS. 2 to 4, in the method for manufacturing wafer-level test MV (Micro Via Wire Plating) according to the present invention, first, a fine through hole 110 is formed in the ceramic 100 serving as the base. The hole is processed to go through the step (S210).

In this case, when the alloy wire 130 coated with the insulator is inserted into the ceramic 100 and connected to the main PCB 200, the alloy wire 130 is raised to the top of the main PCB 200 through a large hole as in the past and then inserted again from the outside. Unlike the structure that is characterized in that the structure is connected to the hole of the predetermined main PCB 200 of the alloy wire 130 coated with each insulator immediately

At this time, the MPP manufacturing method according to the present invention, polyimide (Polyimide) is continuously stacked in 14 to 16 layers as in the conventional PCB-type board manufacturing method, a pattern (Pattern) formed on it, and then etched (etched) Rather, it is formed by drilling a fine through-hole 110 in the ceramic 100 itself, it has the advantage that can be implemented to have only a minimum thickness without increasing the ease and thickness of the processing.

Subsequently, the alloy wire 130 coated with the insulator is inserted into the through hole 110 formed in the ceramic 100, and among the holes formed in the main PCB 200, the closest to the inserted through hole 110. A wire insertion step of installing in a hole located at a distance is performed.

The wire insertion step is such that when the alloy wire 130 coated with an insulator is inserted into the ceramic 100, and connected to the main PCB 200, through a large hole formed in the center side of the main PCB 200 as in the prior art Unlike the structure that penetrates to the top of the main PCB 200 and then inserted again from the outside of the main PCB 200, the main PCB 200 of the alloy wire 130 coated with an insulator inserted into the ceramic 100 Is directly connected to the hall.

That is, in order to connect the alloy wire 130 coated with an insulator, which is a signal line inserted into the ceramic 100, to the upper main PCB 200, the through-hole 110 of the ceramic 100 serving as a guide supporting the lower signal line is provided. Insert the signal line into the through hole 110 designated as the upper portion of the lower portion of the main PCB 200 and the upper portion of the upper portion of the main PCB 200, and soldering and connecting each contact portion of the upper portion of the main PCB 200, the insulator of the present invention The coated alloy wire 130 is connected to the ceramic 100 and the main PCB 200 in a straight form.

At this time, the alloy wire 130 coated with an insulator is excellent in mechanical properties with high heat resistance to increase the durability in the high frequency signal processing as in the present invention, it is suitable for extending the service life.

Here, as the polymer material constituting the alloy wire 130 coated with the insulator, polyvinyl acetal, polyamide, polyurethane, polyester (glycerine), poly (imide), poly (ester-imide) (glycerine), poly (ester -imide) (THEIC), poly (amide-imide), polyester (THEIC) can be prepared with any one selected.

In particular, the alloy wire 130 coated with an insulator made of polyamideimide is suitable for the present invention because it has excellent thermal properties, chemical and abrasion resistance, and a low coefficient of friction.

In addition, the alloy wire 130 coated with the insulator is designed to be in direct contact with the main PCB 200, as shown in FIG. 3, that is, the contact portion, that is, the main PCB 200 and the insulator. A signal connection step is performed in which the coated alloy wire 130 is joined by soldering 210 to make an electrical connection.

In addition, it may be designed to combine the alloy wire 130 coated with an insulator and the capacitor (Bypass Capacitor: 150) for removing noise and replenishing power to the soldering 210 portion or side of the main PCB 200. .

Subsequently, the step of applying the epoxy resin 120 to the inner wall of the through-hole 110 is performed (S230).

The epoxy resin 120 is to fix the alloy wire 130 coated with an insulator to be inserted into the through hole 110 and to maintain sufficient insulation.

In addition, to fix the alloy wire 130 coated with an insulator, a hole for injecting epoxy resin separately on the surface of the ceramic 100 and the main PCB 200 through the epoxy resin injection hole 220 twice. It can also apply over.

That is, the epoxy resin coating step is to apply a primary epoxy resin to the surface of the ceramic 100 to connect the alloy wire 130 coated with an insulator, which is a signal line connecting the ceramic 100 to the main PCB 200. Next, by applying a second coating through the epoxy resin injection hole 220 of the main PCB 200, it is possible to increase the fixing and insulation of the alloy wire 130 coated with an insulator which is a signal line.

Through this step, when the alloy wire 130 coated with an insulator is fixed, the surface of the ceramic 100 is then polished by planar grinding with the alloy wire 130 coated with the protruding insulator to probe head. The step of making a cross-sectional pad having a plane shape so that the contact can be performed (S240).

Subsequently, plating is performed on the top surface of the alloy wire 130 coated with an insulator, thereby forming a gold PAD, which is a plating layer 140, to increase contact and conduction.

In this case, the plating layer 140 is plated to be sequentially stacked in the order of a copper layer (Cu layer), nickel layer (Ni layer), gold layer (Au Layer) from the top of the alloy wire 130 coated with the insulator. This is particularly preferred.

In addition, the plating layer 140 is configured to be polished and regenerated at each damage, and can be polished by 0.05mm for each regeneration, so that the polishing layer can be polished over 10 times. Has the advantage of being extended.

The MBP probe card board manufactured in this manner may be combined with a probe head to be used for characteristic test of a semiconductor device.

Here, as a test equipment that meets the specifications of the performance of the probe card by the MBP probe card board was tested under the same conditions as the existing conditions, and showed the characteristics shown in Table 1 below.

Item Details Results Gold pad thickness Soft Electric plating 3 ~ 5㎛ Contact Resistance 0.1m-ohm Under 0.1m-ohm Current 100 μm 1.2A Rattern resistance 5 mm
(including pad thickness)
Under 1 ohm
Speed 10mm pattern length Over 2Ghz Touch down strength Cobra tip condition Over 200k Repairable Damaged Pad by hard thing Can Min pitch Over 80㎛ pitch Possible

As shown in Table 1, a fine pitch of 0.08 mm or more may be realized by the method according to the present invention, high current treatment of 1 A or more may be possible, and regeneration (0.05 mm in a single polishing) may be performed after polishing a damaged part during contact use. It can be recycled and reused in the form of polishing and reusing over 10 times), which can of course contribute to cost reduction as well as material reduction.

As can be seen through this, the present invention can implement a fine pitch, high processing speed, a signal processing having a high frequency stability, and can implement a probe card capable of processing a high current of at least 1A.

Such a configuration can achieve the purpose of the present invention, which enables faster and more precise and stable testing of the electrical characteristics of semiconductor devices, particularly wafers, which are becoming highly integrated.

In addition, the structure is simple and can be manufactured at a relatively low cost to ensure cost reduction and price competitiveness.

100: ceramic plate 110: through hole (Via Hole)
120: epoxy resin 130: alloy wire coated with an insulator
140: plating layer 150: capacitor (Bypass Capacitor)
200: main PCB 220: epoxy injection hole

Claims (4)

  1. A method for manufacturing a micro via wire plating (MVP) probe card board for wafer level testing for testing electrical characteristics of a semiconductor device;
    A hole processing step of processing through holes in the ceramic 100 serving as a base;
    Polyvinyl acetal, polyamide, polyurethane, polyester (glycerine), poly (imide), poly (ester-imide) (glycerine), poly (ester-imide) (THEIC), poly ( a wire insertion step of inserting an alloy wire coated with an insulator for signal processing, a power supply, and a ground manufactured through any one polymer material selected from amide-imide) and polyester (THEIC) into a ceramic and main PCB;
    Join the wires inserted into the main PCB to connect the holes of the main PCB and the alloy wire coated with the insulator by soldering, and for the electrical connection of the alloy wire coated with the insulator inserted into the main PCB, A signal connection step of soldering at an upper end and attaching a capacitor, which is a component for removing noise and replenishing power, to a portion or a side thereof;
    The alloy wire coated with the insulator is filled with the epoxy wire in the inner wall of the through-hole and the empty space of the ceramic or the epoxy resin injection hole of the main PCB through the wire insertion step to fix the alloy wire coated with the insulator. In order to connect the alloy wire coated with the insulator, which is a signal line connecting the lower main ceramic to the upper main PCB, the first epoxy resin is coated on the surface of the ceramic and then the second through the epoxy resin injection hole of the upper main PCB. Epoxy resin coating step of applying to increase the fixing and insulation of the signal line;
    Ceramic polishing step of polishing the ceramic cross section fixed with the alloy wire coated with the insulator to form a cross-sectional pad shape so as to have a planar shape in the cross section of the alloy wire coated with the insulator to which the probe head can contact; ;
    A plating layer is formed on the end face pad of the alloy wire coated with the insulator in order of a copper layer, a nickel layer, and a gold layer, and when damaged, the plating layer is polished by 0.05 mm. MVP probe card board manufacturing method for a wafer level test characterized in that it comprises a plating layer forming step for regeneration.
  2. The method of claim 1,
    The hole processing step is to connect the alloy wire coated with an insulator, which is a signal line inserted into the ceramic, to the upper main PCB, and the through hole designated as the upper position in the lower part of the upper main PCB and the position of the ceramic hole as the guide supporting the lower signal line. Method of manufacturing a MVP probe card board for wafer level testing, characterized in that the signal line is inserted into, and each soldering part of the upper part of the main PCB is soldered and connected.
  3. delete
  4. delete
KR1020100034440A 2010-04-14 2010-04-14 MVP Probe Card Board Manufacturing Method For Wafer Level Test KR101139921B1 (en)

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Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101317634B1 (en) * 2012-03-28 2013-10-10 주식회사 브리지 MVP Probe Board Manufacturing Method For Semiconductor Test
KR101845652B1 (en) * 2017-01-17 2018-04-04 주식회사 텝스 Hybrid probe card for component mounted wafer test
KR200487381Y1 (en) * 2017-02-10 2018-09-11 주식회사 프로이천 Probe card for wafer testing

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07335701A (en) * 1994-06-10 1995-12-22 Advantest Corp Probing device
JPH1096747A (en) 1996-09-25 1998-04-14 Nec Corp Probe card
JP2006220662A (en) * 2004-09-30 2006-08-24 Jsr Corp Electrode device for circuit device inspection, its manufacturing method, and inspection device of circuit device
KR100632484B1 (en) * 2006-03-14 2006-09-28 주식회사 맥퀸트로닉 Probe card of vertically buffering type

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07335701A (en) * 1994-06-10 1995-12-22 Advantest Corp Probing device
JPH1096747A (en) 1996-09-25 1998-04-14 Nec Corp Probe card
JP2006220662A (en) * 2004-09-30 2006-08-24 Jsr Corp Electrode device for circuit device inspection, its manufacturing method, and inspection device of circuit device
KR100632484B1 (en) * 2006-03-14 2006-09-28 주식회사 맥퀸트로닉 Probe card of vertically buffering type

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