KR101133590B1 - Input buffer circuit - Google Patents

Abstract

PURPOSE: An input buffer circuit is provided to minimize noises through the increase of a transistor size and the reduction of input capacitance. CONSTITUTION: An analog microphone comprises a sound pressure conversion unit(200), an input buffer(300), and an amplifier(400). The sound pressure conversion unit is composed of a vibration plate of an electric condenser mode or an MEMS(Micro Electro Mechanical System) mode. The sound pressure conversion unit changes sound pressure in a form of a fine voltage. The input buffer generates an output signal by receiving outputs from the sound pressure conversion unit through a pad(310). The amplifier generates the output signal by amplifying the output signal of the input buffer. The input buffer minimizes input capacitance. The input buffer reduces flicker noises by increasing the size of a transistor.

Description

Input buffer circuit {INPUT BUFFER CIRCUIT}

The present invention relates to a semiconductor circuit, and more particularly to an input buffer circuit.

1 is a view showing an equivalent circuit of a general analog microphone 1.

In general, the analog microphone 1 is composed of capacitances Cm and Cin, an input buffer 3 and an amplifier 5.

FIG. 2 is a circuit diagram of the input buffer 3 of FIG. 1.

As shown in FIG. 2, the input buffer 3 includes transistors M1 and M2 connected between a power supply terminal and a ground terminal and an antistatic circuit 7 connected to the input terminal of the transistor M2.

The input voltage Vin of the analog microphone 1 can be expressed by the following equation.

Vin = Cm / (Cm + Cin) * Vs

In this case, Cm represents diaphragm capacitance, and Cin represents input capacitance.

As can be seen from the above equation, in order for the input voltage Vs to be properly delivered to the input terminal Vin of the input buffer 3, the condition Cm-Cin must be satisfied.

In this case, the input capacitance Cin can be expressed by the following equation.

Cin = A * Cox

At this time, A is the area of a transistor (hereinafter, referred to as an input transistor) constituting the input buffer 3, and Cox represents an oxide film capacitance.

As can be seen from the equation, in order to reduce the input capacitance Cin, A may be made small or Cox may be made small.

However, since Cox is determined in the semiconductor process, A must be made small in terms of circuits.

The signal to noise ratio of the microphone 1 is related to the flicker noise of the input transistor, that is, 1 / F (Frequency) noise, and is inversely proportional to the area of the input transistor.

The larger the area of the input transistor, the smaller the noise, while the larger the input capacitance (Cin), resulting in input loss.

In other words, the input capacitance Cin and the noise may be a trade-off relationship with respect to the area of the input transistor.

For example, in the case of a microelectromechanical system (MEMS) microphone, the diaphragm capacitance is about 1pF, and the input stage capacitance requires 0.1 pF (pico Farad) or less. There was no limit to optimization.

An embodiment of the present invention is to provide an input buffer circuit to increase the signal-to-noise ratio.

An embodiment of the present invention is a pad; A biasing unit configured to generate a constant bias voltage; An amplifier configured to receive the bias voltage and amplify an input signal input through the pad to generate an output signal; And an anti-noise feedback loop configured to receive the output signal and adjust the bias voltage.

An embodiment of the present invention is a pad; A source follower circuit configured to generate an output signal in response to an input signal input through the pad; And a resistor connected between the drain terminal and the ground terminal of the source follower circuit.

An embodiment of the present invention is a pad; A source follower circuit configured to generate an output signal in response to an input signal input through the pad; A first resistor coupled between the drain terminal of the source follower circuit and a ground terminal; And a capacitor connected in parallel with the first resistor.

In this case, the pad may include stacked first to third metal gratings, and the first metal grating and the third metal grating may have the same shape, and the second metal grating may overlap the first metal grating with some regions. Having a shape is another feature.

In this case, the pad may further include a metal plate stacked on the first metal lattice.

The noise prevention feedback loop may be configured to remove the thermal noise by adjusting the bias voltage directly to a voltage change corresponding to the thermal noise of the amplifier included in the output signal or in response to a voltage change caused by replicating the thermal noise of the amplifier. It is another feature of the configuration.

The embodiment of the present invention can increase the signal size by minimizing noise by increasing the transistor size and reducing the input capacitance.

1 is a diagram showing the configuration of a general analog microphone 1;
FIG. 2 is a circuit diagram of the input buffer 3 of FIG. 1,
3 is a block diagram of an analog microphone 100 according to an embodiment of the present invention;
4 to 6 are circuit diagrams of embodiments 300-1 to 300-3 of the input buffer 300 of FIG.
7 is a view showing the form of a general pad,
8A to 8E are views for explaining the shape and manufacturing method of the pad 310 according to the embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3 is a block diagram of an analog microphone 100 according to an embodiment of the present invention.

As shown in FIG. 3, the analog microphone 100 according to an exemplary embodiment of the present invention includes a sound pressure converter 200, an input buffer 300, and an amplifier 400.

The sound pressure converter 200 may be an electret condenser type or a MEMS type diaphragm.

The sound pressure converter 200 converts the sound pressure into a fine voltage to provide it to the input buffer 300.

The input buffer 300 receives the output of the sound pressure converter 200 through the pad (IN) 310 and buffers the power level to generate an output signal OUTPRE.

The amplifier 400 amplifies the output signal OUTPRE of the input buffer 300 to generate an output signal OUT.

In this case, the input buffer 300 will be described in detail later, but the signal-to-noise ratio (SNR) is increased by reducing the flicker noise by increasing the size of the transistors constituting the input buffer 300 while minimizing the input capacitance. do.

4 through 6 are circuit diagrams of embodiments 300-1 through 300-3 of the input buffer 300 of FIG. 3.

The input buffer 300 of the present invention may be configured as shown in FIGS. 4 to 6.

First, as shown in FIG. 4, the input buffer 300-1 according to the embodiment of the present invention includes a pad 310, a biasing unit 330, a preamplifier 340, an antistatic unit 350, and Anti-noise feedback loop 360.

The pad 310 is connected to the sound pressure converter 200 of FIG. 3 and configured to receive a signal. The pad 310 is where a wiring or a bump ball is connected.

The biasing unit 330 is configured to supply a predetermined bias voltage to the preamplifier 340 through a current mirroring operation.

The biasing block 330 may be configured as a current mirror. The current mirror includes a plurality of transistors M11 to M13.

The preamplifier 340 is configured to receive a bias voltage and amplify an input signal input through the pad 310 to generate an output signal OUTPRE.

The preamplifier 340 includes a source follower and a resistor Rs including the plurality of transistors M14 and M15.

The antistatic unit 350 is configured to prevent static electricity flowing through the pad 310.

The noise prevention feedback loop 360 forms a feedback loop connecting the biasing unit 330 and the preamplifier 340, and is configured to remove thermal noise of the preamplifier 340 through the loop. do.

The noise prevention feedback loop 360 includes a transistor M16, a gate of the transistor M16 is connected to one end of the resistor Rs of the preamplifier 340, a source is grounded, and a drain is biased. Commonly connected to the gates of the transistors M11 and M13 of the 330.

In this case, the main noise sources of the input buffer 300-1 are flicker noises of the preamplifier 340, that is, 1 / F (Frequency) noise and thermal noise. In particular, the thermal noise appears in the transistors M14 and M15 and the resistor Rs according to the operation of the preamplifier 340. The thermal noise causes the voltage level of the output signal OUTPRE to be different from the normal level.

The noise prevention feedback loop 360 forms a feedback loop connecting the biasing unit 330 and the preamplifier 340.

Therefore, in the noise prevention feedback loop 360, the transistor M16 operates in response to the voltage change of the preamplifier 340 due to thermal noise.

As the bias voltage of the biasing unit 330 is adjusted according to the operation of the transistor M16, the voltage difference due to the thermal noise included in the output signal OUTPRE is removed.

In this case, the input capacitance of the input buffer 300-1 corresponds to the series connection value of the capacitance of the gate of the transistor M15 and the capacitance of the gate of the transistor M16.

Therefore, the transistor M16 is implemented to have a small area, and the transistor M15 is implemented in a relatively large area to have a small flicker noise.

In this case, the input capacitance may be substantially implemented as a capacitance of the transistor M16, for example, several fF (femto Farad) irrespective of the transistor M15.

On the other hand, the microphone typically must operate at a supply voltage in the range of 1.5V to 3.6V. Therefore, even when a low voltage, for example, a power supply voltage of 1.5V is applied, the voltage drop by the resistor Rs should be 0.2V or less in order for the microphone 100 to operate smoothly.

To this end, the embodiment of the present invention configures the transistor M16 by applying a native transistor having a very low threshold voltage (for example, 0.1V).

As described above, the input buffer 300-1 according to the embodiment of the present invention can minimize flicker noise and thermal noise as well as minimize input capacitance through appropriate transistor selection and area adjustment.

In addition, the layout of the pad 310 may be improved to further reduce input capacitance, which will be described later.

As illustrated in FIG. 5, the input buffer 300-2 according to another embodiment of the present invention may include a pad 310, a biasing unit 330, a preamplifier 341, an antistatic unit 350, and noise. Prevention feedback loop 361.

In this case, except for the preamplifier 341 and the noise prevention feedback loop 361, the rest of the configuration can be configured in the same manner as in FIG.

The preamplifier 341 includes a source follower consisting of a plurality of transistors M14 and M15, a resistor Rs, and a capacitor Cs.

The preamplifier 341 further includes a capacitor Cs as compared to the preamplifier 340 of FIG. 4.

The capacitor Cs is connected in parallel with the resistor Rs between the drain of the source follower, that is, the drain of the transistor M15 and the ground terminal.

Capacitor Cs has a very small capacitance value, for example a few fF.

In this case, the input capacitance Cin can be defined as follows.

Cin = Cin_bottom + Cin_top

In this case, Cin_bottom and Cin_top mean capacitances of the lower side and the upper side, respectively, based on the pad 310.

Cin_bottom = CgdM15 + Cs

At this time, CgdM15 is the gate-drain capacitance of the transistor M15.

Cin_top = CgsM15 + CgdM14

At this time, CgsM15 is the gate-source capacitance of transistor M15, and CgdM14 is the gate-drain capacitance of transistor M14.

In Cin_bottom, making Cs much smaller than CgdM15 results in Cin_bottom = Cs.

In addition, if the gate size of the transistor M14 is made much smaller than the gate of the transistor M15, Cin_top = CgdM14, and thus Cin = Cs + CgdM14.

As a result, the noise can be minimized by adjusting the capacitance at the same time as the sizes of the transistors M14 and M15, thereby increasing the signal-to-noise ratio.

The noise prevention feedback loop 361 includes a plurality of transistors M16 and M17 and a resistor R11.

The noise prevention feedback loop 361 has a transistor M17 and a resistor R11 added thereto as compared with the noise prevention feedback loop 360 of FIG. 4, and basic operations are similar to each other.

The noise prevention feedback loop 360 of FIG. 4 is directly fed back through the resistor Rs of the preamplifier 340.

However, the anti-noise feedback loop 361 of FIG. 5 mirrors the current of the preamplifier 341 through the transistor M17, receives a feedback through the resistor R11 connected to the transistor M17, and corresponds to a voltage corresponding to thermal noise. To get rid of the car.

In addition, in FIG. 4, since the voltage drop due to the resistor Rs should be 0.2V or less, the voltage width of the output signal OUTPRE may be limited, so that a native transistor is used as the transistor M16.

However, in FIG. 5, since the capacitor Cs is connected in parallel with the resistor Rs, the voltage width limitation problem of the output signal OUTPRE may be solved. Therefore, the transistor M16 may use a general transistor instead of a native transistor, and thus a relative process simplification is possible.

As shown in FIG. 6, the input buffer 300-3 according to another embodiment of the present invention may include a pad 310, a biasing unit 330, a preamplifier 341, an antistatic unit 350, and Anti-noise feedback loop 362.

At this time, the rest of the configuration except for the noise prevention feedback loop 362 may be configured in the same manner as in FIG. 5.

The noise prevention feedback loop 362 includes a plurality of transistors M16, M17, and M18 and a resistor R11.

The noise prevention feedback loop 362 has an additional transistor M18 as compared to FIG. 5.

In this case, the transistor M18 is added so that the noise prevention feedback loop 362 can feed back the voltage change due to the thermal noise more accurately than in FIG. 5.

The noise prevention feedback loop 362 configured as described above mirrors the current of the preamplifier 341 through the transistors M17 and M18, receives the feedback through the resistor R11 connected to the transistor M18, and outputs the output signal OUTPRE. Thermal noise is eliminated by allowing the voltage level to be adjusted.

In addition, the embodiment of the present invention further reduces the input capacitance by using the internal circuit of the input buffer 300 and improves the layout of the pad (IN) 310 to further reduce the input capacitance. This will be described with reference to 8E.

7 is a view showing the shape of a general pad.

The general pad is formed in such a way that a plurality of metal plates as shown in FIG. 7 overlap. Therefore, almost all of the areas face each other, so capacitors are formed between adjacent metal plates, which plays a bad role in including noise in the input signal or attenuating the input signal itself.

8A to 8E are views for explaining the shape and manufacturing method of the pad 310 according to the embodiment of the present invention.

In the pad 310 according to the embodiment of the present invention, the uppermost layer uses a metal plate having a shape as shown in FIG. 7, while the lower layers have a multilayer lattice structure as shown in FIG. 8A.

The pad 310 of FIG. 8A is formed by stacking the first metal grating of FIG. 8B, the second metal grating of FIG. 8C, and the third metal grating of FIG. 8E.

That is, the first metal lattice of FIG. 8B and the second metal lattice of FIG. 8C are laminated to generate the multilayer metal lattice of FIG. 8D, and the third metal lattice of FIG. 8E is laminated thereon to finally form the pad (see FIG. 8A). 310 (at this time, the metal plate of Figure 7 is excluded).

At this time, the first metal lattice of FIG. 8B and the third metal lattice of FIG. 8E are formed to be identical to each other, while the second metal lattice of FIG. 8C is formed to be out of alignment with the first metal lattice of FIG. 8B.

Accordingly, the pad 310 of the present invention as shown in FIG. 8A is a multi-layered lattice structure that minimizes areas facing each other between adjacent layers, and may minimize capacitance of the pad 310.

8A to 8E are merely examples of the lattice structure according to the embodiment of the present invention, and may be configured in various forms such as a rectangle or a circle.

As such, those skilled in the art will appreciate that the present invention can be implemented in other specific forms without changing the technical spirit or essential features thereof. Therefore, the above-described embodiments are to be understood as illustrative in all respects and not as restrictive. The scope of the present invention is shown by the following claims rather than the detailed description, and all changes or modifications derived from the meaning and scope of the claims and their equivalents should be construed as being included in the scope of the present invention. do.

Claims (20)

pad;
A biasing unit configured to generate a constant bias voltage;
An amplifier configured to receive the bias voltage and amplify an input signal input through the pad to generate an output signal; And
A noise prevention feedback loop configured to receive the output signal and adjust the bias voltage,
The amplifier and the noise prevention feedback loop are each configured by a combination of transistors,
And a gate area of the transistor receiving the input signal by the amplifier is larger than a gate area of the transistor receiving the output signal in the noise prevention feedback loop. The method of claim 1,
The pad
Comprising laminated first to third metal gratings,
The first metal grid and the third metal grid are the same shape as each other,
And the second metal grating has a shape in which a portion of the first metal grating overlaps. The method of claim 2,
The pad
And a metal plate stacked on the first metal lattice. The method of claim 1,
The noise prevention feedback loop
An input buffer circuit configured to remove the thermal noise by adjusting the bias voltage in response to a voltage change corresponding to the thermal noise of the amplifier included in the output signal. delete pad;
A source follower circuit configured to generate an output signal in response to an input signal input through the pad;
A current mirror configured to provide a constant bias voltage to the source follower circuit; And
A resistor connected between the drain terminal of the source follower circuit and the ground terminal,
The source follower circuit is
A first transistor having a source connected to a power supply terminal and receiving the bias voltage at a gate thereof; And
And a second transistor receiving the input signal at a gate and having a source connected to a drain of the first transistor. delete delete The method according to claim 6,
And a third transistor having a gate connected to one end of the resistor, a source connected to ground, and a drain connected to the current mirror. The method of claim 9,
An input buffer circuit for increasing a gate area of the second transistor to a gate area of the third transistor. The method of claim 9,
And an input buffer circuit comprising the third transistor as a native transistor. The method according to claim 6,
The pad
Comprising laminated first to third metal gratings,
The first metal grid and the third metal grid are the same shape as each other,
And the second metal lattice has a shape in which a portion of the second metal lattice overlaps with the first metal lattice. The method of claim 12,
The pad
And a metal plate stacked on the first metal lattice. pad;
A source follower circuit configured to generate an output signal in response to an input signal input through the pad;
A current mirror configured to provide a constant bias voltage to the source follower circuit;
A first resistor coupled between the drain terminal of the source follower circuit and a ground terminal; And
A capacitor connected in parallel with the first resistor,
The source follower circuit is
A first transistor having a source connected to a power supply terminal and receiving the bias voltage at a gate thereof; and
And a second transistor receiving the input signal at a gate and having a source connected to a drain of the first transistor. delete delete The method of claim 14,
A third transistor having a source connected to a power supply terminal and receiving the bias voltage at a gate thereof;
A second resistor connected between the drain and the ground terminal of the third transistor, and
And a fourth transistor having a gate connected to one end of the second resistor, a source connected to ground, and a drain connected to the current mirror. The method of claim 14,
An input buffer circuit for increasing a gate area of the second transistor compared to a gate area of the first transistor. The method of claim 14,
The pad
Comprising laminated first to third metal gratings,
The first metal grid and the third metal grid are the same shape as each other,
And the second metal lattice has a shape in which a portion of the second metal lattice overlaps with the first metal lattice. The method of claim 19,
The pad
And a metal plate stacked on the first metal lattice.

Images