KR101133412B1 - Light Emitting Diode formed on Substrate having Trench - Google Patents

Abstract

A light emitting diode having a trench formed in a predetermined direction on a substrate and having a light emitting layer or a photoactive layer provided therein is disclosed. A substrate having a trench formed in a specific direction is provided, and a light emitting layer is provided inside the trench of the substrate. In addition, the electrode is extended from a thin film forming the light emitting layer to facilitate wire bonding, and is provided in a pad form.

Light Emitting Diode, Zinc Oxide, Semiconductor Semiconductor, Gallium Nitride

Description

Light Emitting Diode formed on Substrate having Trench

The present invention relates to a light emitting diode, and more particularly to a gallium nitride-based and zinc oxide-based light emitting diode.

A light emitting diode uses a pn junction of a semiconductor, and in a p-type doped semiconductor, holes in the valence band and electrons in the conduction band in an n-type semiconductor are recombined in a junction region or active region to emit photons. do.

Therefore, the light emitting diode must be provided with an n-type semiconductor, a p-type semiconductor and an active region in which photons are emitted. In particular, gallium nitride-based light emitting diodes, which have been commercialized recently and realize high brightness, have become an important factor in determining the quality of p-type semiconductor layers. In addition, the active region employs a multi-quantum well structure in which a light emitting layer and a barrier layer are sequentially stacked, and uses a MOCVD (Metal Organic Chemical Vapor Deposition) process to form the multi-quantum well structure.

In addition, zinc oxide light emitting diodes, which have been recently discussed, are compound semiconductors of group II-VI and have hexagonal burzite structures. This is a structure similar to the GaN series currently commercialized. In particular, the zinc oxide light emitting diode has an optical bandgap of 3.37 eV at room temperature and thus can be utilized as a light source in the near ultraviolet region. This has a mechanism suitable for implementing a white light emitting diode using a blue light emitting device.

However, zinc oxide light emitting diodes are not stoichiometrically deposited in the actual thin film formation process, and there is a problem of naturally having n-type semiconductor characteristics due to excess zinc or lack of oxygen. That is, when oxygen is deficient in the crystal structure, only six electrons out of eight appliances disposed around oxygen in a zinc oxide bonding structure remove only six electrons, and the remaining two electrons are donors ( donor) Therefore, the zinc oxide thin film due to the above-mentioned defects or the like becomes an n-type semiconductor.

In recent years, the above-mentioned problems have been overcome, and successful formation of intrinsic zinc oxide thin films or p-type zinc oxide thin films has been reported. In addition, the structure of the light emitting diode using the same has a lamination structure of a substrate, a buffer layer, an n-type semiconductor layer, an active layer, and a p-type semiconductor layer, as is well known to those skilled in the art. In particular, the substrate is directed to a perfect planar structure having no curved shape, and a structure in which a plurality of films are laminated on the planar structure is selected.

In addition, a separate electrode pad is formed on the p-type semiconductor layer and the n-type semiconductor layer for the packaging process. The electrode pad is made of a conductive material, and wire bonding is performed for electrical connection with the lower lead frame. Therefore, the larger the pad area, the easier the packaging process. However, the electrode pad is generally formed of a conductive metal, and in the case of increasing the area of the pad, excessively narrowing the light emitting area is caused. That is, the problem that the light emitting area is reduced by the pad occurs. In order to solve this problem, the area of the electrode pad can be narrowed, but this causes the difficulty of wire bonding.

SUMMARY OF THE INVENTION An object of the present invention for solving the above problems is to provide a light emitting diode in which a light emitting layer or a photoactive layer is disposed on or in a trench sidewall of a substrate, and an electrode is extended from a thin film and provided in a pad form to facilitate wire bonding. .

The present invention for achieving the above object is a substrate formed with a trench extending in the first direction; An n-type semiconductor layer formed in the trench; An emission layer connected to the n-type semiconductor layer and formed on sidewalls of the trench; A p-type semiconductor layer connected to the light emitting layer and formed on the substrate outside the trench and extending in a second direction perpendicular to the first direction therebetween; A cathode formed on the n-type semiconductor layer; And it provides a light emitting diode comprising an anode formed on the p-type semiconductor layer.

In addition, the object of the present invention is a substrate having a trench extending in the first direction; An n-type semiconductor layer formed on the trench; A photoactive layer formed on the n-type semiconductor layer; A p-type semiconductor layer formed on the photoactive layer; A cathode formed on the n-type semiconductor layer; And an anode formed on the p-type semiconductor layer, wherein the n-type semiconductor layer, the photoactive layer and the p-type semiconductor layer are also provided within the trench.

According to the present invention described above, a trench is formed on the substrate, the light emitting layer is provided on the sidewall of the trench. Thus, the substrate has a stepped structure due to the trench. In addition, since the light emitting layer can be formed relatively simply using the Josephson cushion structure, a complicated process in the manufacturing process is avoided. In addition, a plurality of thin films are formed in the trench of the substrate, and the possibility of the light generated inside the trench is discharged to the outside by selecting a substrate having a lower refractive index than the photoactive layer in which the light is generated. Therefore, high light efficiency can be obtained. In addition, the electrode extends to the inner region of the trench and is provided in the form of a pad to facilitate wire bonding. In addition, the other electrode is extended on the substrate, provided in the form of a pad.

As the inventive concept allows for various changes and numerous embodiments, particular embodiments will be illustrated in the drawings and described in detail in the text. However, this is not intended to limit the present invention to the specific disclosed form, it should be understood to include all modifications, equivalents, and substitutes included in the spirit and scope of the present invention. Like reference numerals are used for like elements in describing each drawing.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art. Terms such as those defined in the commonly used dictionaries should be construed as having meanings consistent with the meanings in the context of the related art, and, unless expressly defined in this application, are construed in ideal or excessively formal meanings. It doesn't work.

Hereinafter, with reference to the accompanying drawings, it will be described in detail a preferred embodiment of the present invention.

First Example

1 is a perspective view illustrating a zinc oxide light emitting diode according to a first embodiment of the present invention.

Referring to FIG. 1, a trench 110 is formed on a substrate 100, and a light emitting diode is formed on the inside of the trench 110, the sidewalls, and an upper portion of the substrate.

The substrate 100 is composed of Si, SiC, ZnO, GaAs or Al ₂ O ₃ . Preferably, the substrate 100 is preferably composed of zinc oxide capable of minimizing the difference in lattice constant with the formed thin film. If a substrate 100 containing Si, SiC, GaAs or Al ₂ O ₃ is used, epitaxially grow a zinc oxide single crystal on the substrate 100 to minimize the difference in lattice constant between thin films. This reduces the possibility of dangling bonding.

In addition, the trench 110 extending in the first direction through an etching method is provided on the substrate 100. The trench 110 may be implemented by a wet etching method or a dry etching method using a photoresist pattern formed by a conventional photolithography process as an etching mask.

The n-type semiconductor layer 120 is formed on the trench 110. The n-type semiconductor layer 120 preferably uses a group IIIA or group IVA element as a dopant. In addition, the n-type semiconductor layer 120 includes zinc oxide, it is preferable that the introduced dopant is provided in the form of replacing the zinc. The n-type semiconductor layer 120 may be formed using a sputtering or a MOCVD process.

The cathode 160 is formed on the n-type semiconductor layer 120. The cathode 160 is formed to extend in the first direction from the upper portion of the n-type semiconductor layer 120, a wiring-type metal line in which only electrical contact is performed is disposed on the upper portion of the n-type semiconductor layer 120, and The pad is formed on the trench 110 extending in one direction. The cathode 160 is made of a conductive metal material, and is made of Ti, Al, Pt, Ni, Cr, or Au. Of course, the cathode 160 may be configured in a structure in which the metal materials are sequentially stacked, or may be configured in the form of an alloy.

The p-type semiconductor layer 130 is provided on the substrate 100 except for the trench 110. The p-type semiconductor layer 130 uses a group IIIA or group IIA metal as a dopant. Therefore, the dopant introduced into the p-type semiconductor layer 130 replaces the bonding position of zinc. In addition, the p-type semiconductor layer 130 is based on zinc oxide, the post-heat treatment is preferably performed at 300 ℃ to 900 ℃ after the formation of the semiconductor layer to activate the dopant. Formation of the p-type semiconductor layer 130 is preferably using a sputtering or MOCVD process. In addition, a group VA element may be used as the dopant of the p-type semiconductor layer 130. That is, elements such as N, P, Li or As replace the position of oxygen in the zinc oxide crystal, which acts as an acceptor. In addition, AlN, In, N, or InN may be used as a dopant of the p-type semiconductor layer 130.

In addition, an anode 150 is formed on the p-type semiconductor layer 130. The material constituting the anode 150 may be any material as long as it is a conductive material and is capable of achieving ohmic contact with the p-type semiconductor layer 130.

Particularly, when the n-type semiconductor layer 120 and the p-type semiconductor layer 150 are formed, a zinc metal precursor for forming the n-type semiconductor layer 120 is DEZn (Diethyl Zn) as the precursor of the n-type semiconductor layer 120. Or DMZn (Dimethyl Zn) is used, and DE- dopant, DM-dopant, etc. are used as a precursor of a dopant. In addition, oxygen gas is supplied under a predetermined pressure, and the set temperature and pressure of the chamber can be appropriately adjusted by the thickness of the film to be formed, the concentration of the dopant, and the like.

The light emitting layer 140 is provided on the sidewall of the trench 110. The light emitting layer 140 is an intrinsic semiconductor, and is preferably composed of zinc oxide series. Thus, the light emitting layer 140 has a homo cushion structure. That is, the light emitting structure is realized by the combination of homogeneous compositions. For the formation of the light emitting layer 140 described above, the principle of the Josephson junction in which the p-type semiconductor layer 150 is modified into an intrinsic semiconductor is used.

Originally, the Josephson effect refers to a phenomenon in which current flows even when an insulator is inserted between the superconductor and the superconductor. In other words, it refers to a phenomenon in which a current flows over a non-conductive barrier called a non-conductor. In this case, the junction of the non-conductors interposed between the superconductors is referred to as a Josephson junction. The formation of the Josephson cushion uses a property that, when the superconductor thin film is formed at the edge portion of the trench of the substrate, the structure is deformed by structural defects, thereby discarding the properties of the superconductor and modifying it with an insulator. That is, the crystallographically sensitive thin film is modified to insulator by changing its original conductivity due to mechanical attraction or tension generated at the edge portion.

Thus, the light emitting layer is formed at the edge portion of the trench.

FIG. 2 is a cross-sectional view of the zinc oxide light emitting diode shown in FIG. 1 cut in the AA ′ direction.

Referring to FIG. 2, an n-type semiconductor layer 120 is provided on the bottom of the trench 110 provided in an inclined form. In addition, the emission layer 140 is formed on the side surface of the trench 110. The p-type semiconductor layer 130 is provided on the substrate 100 outside the trench 110.

If the depth of the trench 110 is not large, the light emitting layer 140 formed at the edge portion of the trench 110 may be formed over the entire sidewall of the trench 110. However, when the depth of the trench 110 is greater than or equal to a predetermined value, an intrinsic semiconductor 141 is formed in which light emission is performed only at the edge portion, and the p-type side semiconductor layer 143 is formed at the center of the sidewall of the trench 110. Is formed. That is, the intrinsic semiconductor 141 region is provided only at the edge portion of the trench, and the p-type semiconductor layer remains at the center portion of the sidewall.

In addition, in FIGS. 1 and 2, the anode 150 is illustrated as being provided only at one side of the p-type semiconductor layer 130, but the anode 150 is provided at both left and right sides of the trench 110. All may be provided on the semiconductor layer 130. That is, a structure in which two anodes 150 are provided in one cathode 160 may be formed.

In the present invention, when the p-type zinc oxide thin film is formed in the edge portion of the trench 110 of the substrate 100, the dopant pre-activated by the mechanical force at the edge portion is inactivated to be modified to an intrinsic semiconductor. And a light emitting layer. This is confirmed by various experiments, in the case of p-type zinc oxide thin film, even though the thin film is formed by using the MOCVD process, the dopant is activated through post-heat treatment. If the temperature and pressure conditions are not appropriate during the post heat treatment, the dopant is not activated and functions as an intrinsic semiconductor. The same applies to the gallium nitride series.

That is, the present invention employs a technique of modifying the p-type semiconductor layer into an intrinsic semiconductor layer by employing a structure in which mechanical force is applied to the thin film at the edge portion of the trench of the substrate.

3 and 4 are perspective views illustrating a method of manufacturing the light emitting diode shown in FIG. 1 according to the first embodiment of the present invention.

Referring to FIG. 3, a substrate 100 having a trench 110 is provided. The formation of the trench 110 is formed using a conventional photolithography process. That is, the trench 110 recessed by forming a line on the smooth substrate 100 by forming a photoresist pattern extending in the first direction and performing wet etching or dry etching using the formed photoresist pattern as an etching mask. ) Is formed. The substrate 100 is composed of Si, SiC, ZnO, GaAs or Al ₂ O ₃ . Preferably, the substrate 100 is preferably composed of zinc oxide capable of minimizing the difference in lattice constant with the formed thin film.

Next, the n-type semiconductor layer 120 is formed on the substrate 100 by using a sputtering or MOCVD method. First, an n-type semiconductor thin film is formed on the entire surface of the substrate 100 having the trench 110, a photoresist is applied on the formed n-type semiconductor thin film, and then the n-type semiconductor thin film is formed using a conventional photolithography process. Pattern. By patterning, the n-type semiconductor thin film is provided as the n-type semiconductor layer 120 embedded in the trench 110. The n-type semiconductor layer 120 preferably uses a group IIIA or group IVA element as a dopant for zinc oxide.

In addition, a buffer layer (not shown) may be formed before the n-type semiconductor layer 120 is formed. The buffer layer is provided to prevent degradation of the quality of the light emitting diode caused by the difference in lattice constant between the substrate 100 and the n-type semiconductor layer 120 formed thereafter. The buffer layer is achieved by epitaxially growing a zinc oxide thin film using sputtering or MOCVD on the substrate 100 when the substrate 100 is Si, SiC, GaAs or Al ₂ O ₃ . In addition, the buffer layer may be made of AlN.

Referring to FIG. 4, the light emitting layer 140, which is an intrinsic semiconductor, is formed on the sidewalls of the trench by sputtering or MOCVD on the substrate 100, and the p-type semiconductor layer 130 is formed on the upper substrate 100. do.

First, a p-type semiconductor thin film is formed on the entire surface of the substrate 100 on which the n-type semiconductor layer 120 is formed. Subsequently, the p-type semiconductor layer 130 and the light emitting layer 140 which are extended in the second direction perpendicular to the first direction are formed using the conventional photolithography process and the etching process on the p-type semiconductor thin film. In the formation of the p-type semiconductor layer 130, it is preferable to use IIIA, IIA, VA, InN or AlN as a dopant for zinc oxide.

At this time, the p-type semiconductor layer formed on the sidewall of the trench 110 is modified to the light emitting layer 140 which is an intrinsic semiconductor by the Josephson junction structure. That is, mechanical stress is concentrated in the sidewall portion of the trench 110, and thus the dopant is not activated due to a defect in the crystal structure, and thus has the property of an intrinsic semiconductor.

Subsequently, referring again to FIG. 1, the anode 150 and the cathode 160 are formed in the structure of FIG. 4. The positive electrode 150 and the negative electrode 160 use a conventional lift-off method. That is, the photoresist pattern is formed in the region where the electrode is formed, and the electrode material is embedded in the open region. Subsequently, when the photoresist pattern is removed through the ashing process, only the anode 150 and the cathode 160 remain in the p-type semiconductor layer 130 and the n-type semiconductor layer 120.

That is, the anode 150 is provided on the p-type semiconductor layer 130, the cathode 160 is formed to extend in the first direction from the top of the n-type semiconductor layer 160. In particular, the cathode 160 extends in the first direction and is provided in the form of a pad for wire bonding. Thus, the cathode 160 is provided inside the trench 110.

In addition, a current spreading layer (not shown) may be further provided between the anode 150 and the p-type semiconductor layer 130. That is, a transparent conductor such as ITO is inserted to uniformly supply the current supplied through the anode 150 to the p-type semiconductor layer 130, thereby preventing the current from concentrating only on the lower portion of the anode 150. .

Through the above-described process, the light emitting diode shown in FIG. 1 may be manufactured, and a zinc oxide light emitting diode may be formed with a relatively simple structure.

In addition, the light emitting layer may be provided on the sidewalls of the trench to realize side light emission.

2nd Example

5 is a perspective view illustrating a light emitting diode according to a second embodiment of the present invention.

Referring to FIG. 5, a light emitting diode includes an n-type semiconductor layer 221, a photoactive layer 232, a p-type semiconductor layer 242, an anode 250, and a cathode formed in the substrate 200, the trench 210. 260).

The substrate 200 is composed of Si, SiC, ZnO, GaAs or Al ₂ O ₃ . In particular, the substrate 200 preferably has a lower refractive index than the thin film formed in the trench 210. This is to increase the reflectance of the light emitted inside the trench 210. Therefore, light generated in the trench 210 may be reflected from the substrate 200 and smoothly emitted to the outside.

In addition, a trench 210 is formed on the substrate 200. The trench 210 is provided in a form recessed from the substrate 200 that is smooth in the first direction.

In FIG. 5, the trench is illustrated to be formed in a direction perpendicular to the substrate, but for convenience of description, when the trench is formed using a dry etching process, the trench may be formed in an inclined form.

In the trench 210, semiconductor thin films constituting the light emitting diodes are formed. The semiconductor thin films are composed of an n-type semiconductor layer 221, a photoactive layer 232, and a p-type semiconductor layer 242. Accordingly, the photoactive layer 232 is formed in the trench 210, the light formed from the photoactive layer 232 is reflected from the trench sidewall having a low refractive index, and the ratio of the light emitted to the outside becomes high.

First, an n-type semiconductor layer 221 is formed on the trench 210 of the substrate 200. The n-type semiconductor layer 221 includes zinc oxide or gallium nitride. For example, when the n-type semiconductor layer 221 is formed of zinc oxide, the dopant is preferably a group IIIA or group IVA element. In the case where the n-type semiconductor layer is formed of gallium nitride, it is preferable to use a group IIIA or group IVA element as the dopant.

In addition, a buffer layer (not shown) may be further provided between the n-type semiconductor layer 221 and the trench 210. The buffer layer is preferably epitaxially grown zinc oxide when the n-type semiconductor layer 221 is zinc oxide series, and is epitaxially grown AlN, GaN or Al when the n-type semiconductor layer 221 is gallium nitride series _{It is preferred that x} Ga _{1 - x} N (0 <x <1). In this case, as the dopant used, an element of group III may be used as the dopant in the case of zinc oxide, and an element of group IV may be used as the dopant in the case of gallium nitride series.

The photoactive layer 232 is provided on the n-type semiconductor layer 221. The photoactive layer 232 may include a barrier layer and a well layer, and may be a multilayer film in which the barrier layer and the well layer are repeatedly formed.

For example, when the barrier layer is composed of GaN, the well layer may be composed of In _x Ga _{1- x} N (0 <x <1). In addition, the barrier layer and the well layer may be composed of Al _x In _y Ga _{1 -x- y} N. In this case, the barrier layer is configured to have a high band gap, and the well layer is configured to have a relatively lower band gap than the barrier layer.

If the photoactive layer 232 is formed of a zinc oxide series, a multi-quantum well structure in which the barrier layer and the well layer are formed repeatedly is preferably employed. In the case of zinc oxide series, the barrier layer or the well layer is preferably composed of a ternary or quaternary compound further including Cd, Mg, In or P. If the barrier layer is composed of a ZnO binary system, the well layer is preferably composed of a ternary system. However, the barrier layer should have a larger bandgap than the well layer.

The p-type semiconductor layer 242 is formed on the photoactive layer 232. The p-type semiconductor layer 242 includes zinc oxide or gallium nitride. For example, when the p-type semiconductor layer 242 is composed of zinc oxide, a group IIIA or IIA element may be used as the dopant, and when the p-type semiconductor layer 242 is composed of gallium nitride, Group IIA and Group IIA elements can be used. Preferably, the p-type semiconductor layer 242 is formed to maintain the same height as the upper region of the substrate around the trench 210.

In addition, a current diffusion layer (not shown) may be further provided on the p-type semiconductor layer 242. The current spreading layer may be any transparent conductive material, and ITO is preferably applied. When the current diffusion layer is further provided on the p-type semiconductor layer 242, the height of the upper surface of the current diffusion layer is preferably formed at the same height as the upper surface of the substrate 200 outside the trench.

The cathode 260 is provided on the n-type semiconductor layer 221. The cathode 260 extends in a first direction from an upper surface of the n-type semiconductor layer 221, protrudes from a bottom surface of the trench 210, and has a shape of deforming from a line shape to a pad shape.

In addition, an anode 250 is provided on the p-type semiconductor layer 242. The anode 250 is provided in a line shape in a second direction perpendicular to the first direction from the upper surface of the p-type semiconductor layer 242, and provided in a pad shape on the upper surface of the substrate 200 outside the trench 210. do. If the current diffusion layer is provided on the p-type semiconductor layer 242, the anode 250 is formed on the current diffusion layer.

6 to 8 are perspective views illustrating a method of manufacturing the light emitting diode disclosed in FIG. 5 according to the second embodiment of the present invention.

Referring to FIG. 6, a substrate 200 on which a trench 210 is formed is provided, and an n-type semiconductor thin film 220, a photoactive thin film 230, and a p-type semiconductor thin film 240 are formed on the trench 210.

First, a photoresist pattern extended in a first direction is formed on a substrate 200 using a conventional photolithography process. When the dry etching or the wet etching is performed using the formed photoresist pattern as an etching mask, the trench 210 extended in the first direction may be formed.

Subsequently, an n-type semiconductor thin film 210 is formed on the entire surface of the substrate on which the trench 210 is formed. The n-type semiconductor thin film 210 is preferably formed by MOCVD or sputtering. If using the MOCVD process, a suitable precursor should be selected according to the composition of the thin film to be formed.

For example, when the thin film is a zinc oxide series, DEZn (Diethyl Zn) or DMZn (Dimethyl Zn) is used as a precursor of zinc metal for forming the n-type semiconductor thin film 220, and DE-plating is used as a precursor of the dopant. , DM-dopant and the like are used. In addition, oxygen gas is supplied under a predetermined pressure, and the set temperature and pressure of the chamber can be appropriately adjusted by the thickness of the film to be formed, the concentration of the dopant, and the like. In addition, the dopant used is preferably a group IIIA or group IVA element.

When the n-type semiconductor thin film 220 is gallium nitride-based, a precursor of Ga for forming the n-type semiconductor thin film 220 is TEGa (Tri-ethyl gallium) or TMGa (Tri-methyl gallium). Dopants can be used as precursors of dopants.

In addition, a buffer layer may be further provided between the n-type semiconductor thin film 220 and the trench 210 of the substrate 200. When the n-type semiconductor thin film 220 is zinc oxide-based, the buffer layer is preferably epitaxially grown zinc oxide, and when the n-type semiconductor thin film 220 is gallium nitride-based, the buffer layer is epitaxially grown AlN, GaN. Or Al _x Ga _{1 - x} N (0 <x <1).

Subsequently, the photoactive thin film 230 is provided on the n-type semiconductor thin film 220. The photoactive thin film 230 is preferably formed by the barrier layer and the well layer are alternately repeated. The composition of the barrier layer and the well layer constituting the photoactive thin film 230 is the same as that disclosed in FIG. 5. In addition, the photoactive thin film 230 may be formed through MOCVD or sputtering.

Subsequently, the p-type semiconductor thin film 240 is formed on the photoactive thin film 230. The p-type semiconductor thin film 240 is preferably formed by MOCVD or sputtering. If using the MOCVD process, a suitable precursor should be selected according to the composition of the thin film to be formed.

For example, when the thin film is zinc oxide series, DEZn (Diethyl Zn) or DMZn (Dimethyl Zn) is used as a precursor of zinc metal for forming the p-type semiconductor thin film 240, and DE-plating is used as a precursor of the dopant. , DM-dopant and the like are used. In addition, oxygen gas is supplied under a predetermined pressure, and the set temperature and pressure of the chamber can be appropriately adjusted by the thickness of the film to be formed, the concentration of the dopant, and the like. In addition, it is preferable that the dopant to be used is Group IA or Group IIA.

When the p-type semiconductor thin film 240 is gallium nitride-based, a precursor of Ga for forming the p-type semiconductor thin film 240 is TEGa (Tri-ethyl gallium) or TMGa (Tri-methyl gallium). Dopants can be used as precursors of dopants. As a dopant of the p-type semiconductor thin film 240, a group IA or group IIA element may be used.

In addition, a current diffusion layer may be further formed on the p-type semiconductor thin film 240.

In FIG. 6, the thin films formed on the substrate outside the trench are removed by a conventional photolithography process or chemical mechanical polishing. Therefore, thin films having a structure stacked only in the trench are provided.

Referring to FIG. 7, a photoresist is coated on the entire surface of the substrate 200 having the trench 210 and patterned to form a photoresist pattern. Subsequently, an etching process is performed using the photoresist pattern as an etching mask to expose a portion of the bottom surface of the trench 210. The patterned n-type semiconductor layer 221, the photoactive layer 231, and the p-type semiconductor layer 241 are formed.

Referring to FIG. 8, patterning is performed on the structure disclosed in FIG. 7. The patterning uses a conventional photolithography and etching process and proceeds to expose some surfaces of the n-type semiconductor layer 221. A cathode is formed on the exposed surface of the n-type semiconductor layer 221.

Referring to FIG. 6, electrodes are formed on upper surfaces of the n-type semiconductor layer 221 and the p-type semiconductor layer 242 exposed in FIG. 8. The electrode uses a conventional liftoff process. That is, after forming a photoresist pattern, a process of forming a metal layer through a method such as thermal deposition and removing a metal layer other than the electrode through the ashing of the photoresist pattern is applied. The anode 250 and the cathode 260, which are electrodes, are made of a conductive metal material, and are made of Ti, Al, Pt, Ni, Cr, or Au. Of course, the electrode may be configured as a structure in which the metal materials are sequentially stacked, or may be configured in the form of an alloy.

The light emitting diode formed by the above-described process is formed in the trench recessed from the upper surface of the substrate, the photoactive layer of the light emitting layer. In addition, the light generated in the photoactive layer through the selection of a substrate smaller than the reflectance of the photoactive layer is reflected at the bottom or sidewall of the trench and is smoothly emitted upwards.

Further, the anode or the cathode is not distributed throughout the p-type semiconductor layer or the n-type semiconductor layer, and pads are not directly formed on the p-type semiconductor layer or the n-type semiconductor layer. That is, a line-shaped electrode is formed on the p-type semiconductor layer or the n-type semiconductor layer, the line is extended to the substrate upper region or the trench inner region outside the trench. A pad is provided for wirebonding in the stretched area. Therefore, the phenomenon in which the light emitting area is narrowed by forming the pad-shaped electrode as in the prior art is prevented. Therefore, the generated light can be emitted through the entire P-type semiconductor layer, it is possible to maintain a high light efficiency.

1 is a perspective view illustrating a zinc oxide light emitting diode according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view of the zinc oxide light emitting diode shown in FIG. 1 cut in the AA ′ direction.

3 and 4 are perspective views illustrating a method of manufacturing the light emitting diode shown in FIG. 1 according to the first embodiment of the present invention.

5 is a perspective view illustrating a light emitting diode according to a second embodiment of the present invention.

6 to 8 are perspective views illustrating a method of manufacturing the light emitting diode disclosed in FIG. 5 according to the second embodiment of the present invention.

Claims (10)

A substrate having a trench extending in a first direction; An n-type semiconductor layer formed in the trench; A light emitting layer connected to the n-type semiconductor layer and formed at an edge of the trench; A p-type semiconductor layer connected to the light emitting layer and formed on the substrate outside the trench and extending in a second direction perpendicular to the first direction; A cathode formed on the n-type semiconductor layer; And A light emitting diode comprising an anode formed on the p-type semiconductor layer. The light emitting diode of claim 1, wherein the n-type semiconductor is zinc oxide-based, and a group IIIA or group IVA element is used as a dopant. The light emitting diode according to claim 2, wherein the p-type semiconductor is a dopant group of Group IA, Group IIA, Group VA or AlN. The light emitting diode of claim 1, wherein the cathode extends in the first direction, is provided in a line shape on the n-type semiconductor, and is provided in a pad shape in the trench. The light emitting diode of claim 1, wherein the light emitting layer has a property of an intrinsic semiconductor and has a property of a non-conductor by mechanical stress. A substrate having a trench extending in a first direction; An n-type semiconductor layer formed on the trench; A photoactive layer formed on the n-type semiconductor layer; A p-type semiconductor layer formed on the photoactive layer; A cathode formed on the n-type semiconductor layer; And An anode formed on said p-type semiconductor layer, said anode formed on said substrate surface outside said trench from said p-type semiconductor layer surface, The n-type semiconductor layer, the photoactive layer and the p-type semiconductor layer is disposed in the trench. The light emitting diode of claim 6, wherein the cathode extends in the first direction. The light emitting diode of claim 6, wherein the anode extends in a second direction perpendicular to the first direction. The light emitting diode of claim 8, wherein the anode is provided in a line shape on the p-type semiconductor surface and in a pad shape on the substrate surface outside the trench. The light emitting diode of claim 6, wherein the substrate has a lower refractive index than the photoactive layer.

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