KR101100994B1 - Method for manufaturing the epi-wafer using a plurality of wafers and method for manufaturing led using the same - Google Patents

Abstract

PURPOSE: A method for manufacturing the EPI-wafer using a plurality of wafers and a method for manufacturing an led using the same are provided to improve the productivity of an LED by enabling a plurality of wafers to be epitaxial-growth. CONSTITUTION: In a method for manufacturing the EPI-wafer using a plurality of wafers and a method for manufacturing an led using the same, a plurality of wafers are arranged in a substrate for planarization(S201). A plurality of wafers are fixed to a substrate for fixing(S202). The substrate for fixing is rotated(S203). An epitaxial wafer is generated through an epitaxial-growth process. The substrate for fixing is separated from the wafer through a laser(S205). A cutting process is performed in the epitaxial wafers respectively(S206).

Description

METHOD FOR MANUFATURING THE EPI-WAFER USING A PLURALITY OF WAFERS AND METHOD FOR MANUFATURING LED USING THE SAME}

The present invention relates to an epi wafer manufacturing method using a plurality of wafers and a method of manufacturing an LED using the same, and more particularly, planarization of a plurality of wafers having different physical conditions (ie, shape, size, thickness, etc.) exposed in appearance. The present invention relates to an epi wafer manufacturing method using a plurality of wafers and an LED manufacturing method using the same for improving the productivity of the LED by simultaneously performing epi growth.

Recently, the LED industry is growing rapidly as it is widely used as a next generation lighting to replace current lighting products such as general lighting lamps or automotive lamps, and next generation backlights for TVs and monitors.

Light emitting diodes (LEDs) are commonly referred to as light emitting diodes and are a type of semiconductor device that emits light by flowing a current through a compound having different properties. These LEDs are classified into visible LEDs, infrared LEDs, and ultraviolet LEDs according to the type of light emitted. Here, the visible light LED emits red, green, blue, and white light depending on the wavelength, and occupies 95% of the total market share. In addition, the infrared LED is used in remote control, infrared communication (IrDA), etc., and the ultraviolet LED is used in biological and health fields such as sterilization and skin treatment.

Meanwhile, the LED is made through the process as shown in FIG. 1. That is, the LED is generally manufactured in the order of the wafer process (S101), the epi wafer process (S102), the LED chip process (S103), the chip packaging and the modularization process (S104). 1 is a flowchart illustrating a conventional LED manufacturing process.

First, the wafer process S101 is a process of generating a wafer through coring of a wafer ingot grown on the A axis or the C axis. Here, the wafer process S101 typically uses a Kyropoulos method or a Vertical Horizontal Gradient Freezing (VHGF) method. Specifically, the Kiropulos method is a variation of the Czochralski method, which is a technique in which a single crystal seed point is raised without rotation, and grows, and the vertical-horizontal temperature gradient method is vertical with the single crystal seed point beneath it. It is a technology that grows cuboid-shaped single crystals with a temperature difference in the horizontal direction. In this case, the wafer may be made of any one single crystal material of alumina (Al ₂ O ₃ ) (also called "sapphire"), silicon carbide (SiC), gallium arsenide (GaAs), but the most economical sapphire is most widely utilized. It is becoming.

Next, the epi wafer process (S102) is a process of depositing a semiconductor light emitting layer having a P-N structure on the wafer to generate an epi wafer, also referred to as 'epi growth'. Here, 'Epi' means epitaxial, which means to grow a layer of the same crystal on the layer of the crystal. Here, the epi wafer process (S102) applies a metal organic chemical vapor deposition (MOCVD) method of depositing a thin organic metal compound of a single crystal structure such as a single crystal wafer. Specifically, the organometallic chemical vapor deposition method is a technique of forming a single crystal thin film by sequentially depositing an N-type semiconductor (N-GaN) and a P-type semiconductor (P-GaN) on a single crystal wafer. As described above, the epi wafer process S102 is a process of forming the light emitting layer of the LED and ultimately determines the brightness of the LED chip.

Next, the LED chip process S103 performs a series of processes for photolithography, etching, and metallization to form a current line on the epi wafer, and then cuts the unit chips. It is the process of completing a single LED chip.

Next, the chip packaging and modularization process (S104) is a process of packaging and fabricating the module as a post process so that the performance of one LED chip can be properly exhibited. At this time, the chip packaging and modularization process (S104) is forming a package of a ceramic material that can withstand the heat generated by the high-power LED due to the condition that a brighter LED is required as the application range is expanded to a large capacity outdoor lighting.

In this way, the chip packaging and modularization process (S104) is connected to the LED chip through the packaging with a protective material such as liquid resin, such as silicon or epoxy, and modularized by use, thereby providing a ready-to-use product.

As described above, the LED market is gradually expanding as the demand for LEDs increases in various industries. Accordingly, LED manufacturers are competitively developing sapphire single crystal growth methods that influence wafer size (ie, 2 inches, 4 inches, 6 inches, etc.) to increase LED productivity. Specifically, a 4 inch wafer may have a cost reduction effect of up to 30% in the process compared to a 2 inch wafer. For this reason, LED manufacturers are in high demand to develop wafer sizes to ensure quality and price competitiveness.

However, LED manufacturers have difficulty in easily increasing the wafer size due to the characteristics of the wafer in the LED manufacturing process. Here, the wafer size depends on how effectively the bow phenomenon of the wafer can be controlled when the organometallic chemical vapor deposition method is used in the epi wafer process (S102). That is, in epi wafer process S102, since it advances normally at a high temperature of 700-1000 degree | times, an unavoidable curvature phenomenon arises in a wafer.

For example, a four-inch wafer is four times larger than a two-inch wafer, resulting in greater warpage than a two-inch wafer. Accordingly, in the case of a 4 inch wafer, the process was performed at a thickness of about 2.4 to 2.6 times that of the 2 inch wafer in order to minimize warpage. In general, the thicker the wafer, the lower the luminance and the higher the production cost according to the polishing process. In other words, in the case of a 4 inch wafer, the thickness can be increased to minimize the warpage phenomenon compared to the 2 inch wafer, but the brightness is lowered and the production cost is increased.

Accordingly, in the LED industry, as the demand for LEDs increases, there is a need for a method of improving the output of LEDs without increasing the area of the wafer.

Therefore, the prior art as described above has a problem that the demand for LED is rapidly increased, but the productivity is low because it is difficult to expand the size of the wafer, it is an object of the present invention to solve this problem.

Accordingly, the present invention provides an epi wafer using a plurality of wafers to improve the productivity of the LED by simultaneously performing epitaxial growth through a planarization on a plurality of wafers having different physical conditions (ie, shape, size, thickness, etc.) that appear in appearance. An object thereof is to provide a manufacturing method and a LED manufacturing method using the same.

The objects of the present invention are not limited to the above-mentioned objects, and other objects and advantages of the present invention which are not mentioned can be understood by the following description, and will be more clearly understood by the embodiments of the present invention. Also, it will be readily appreciated that the objects and advantages of the present invention may be realized by the means and combinations thereof indicated in the claims.

In order to achieve the above object, the present invention is an epi-wafer manufacturing method using a plurality of wafers, after placing and fixing on a first substrate to planarize one surface of the plurality of wafers, the second surface of the plurality of wafers is coated with an adhesive Contacting and fixing the substrate; Separating the first substrate after rotating in a fixed state; Forming an emission layer by performing epi growth on one surface of the plurality of wafers; And separating the second substrate by removing adhesive from the other surfaces of the plurality of wafers.

The first substrate may be separated and fixed to one surface of the plurality of wafers by using a vacuum pressing method.

And the second substrate is separated from the plurality of wafer other surfaces as the cured adhesive is removed by a laser.

The plurality of wafers are characterized in that at least one of the shape, size and thickness are different.

The adhesive may be configured to fill a gap between the plurality of wafer other surfaces and the second substrate.

The epitaxial growth is characterized by using an organometallic chemical vapor deposition (MOCVD) method.

In addition, the present invention further includes, after the separating of the second substrate, cutting to generate an LED chip for the plurality of wafers on which the epitaxial growth has been performed.

On the other hand, the present invention is a method of manufacturing an LED, comprising the steps of generating a plurality of wafers; Placing and fixing the plurality of wafers on a first substrate to planarize the surfaces, and fixing the other surfaces of the plurality of wafers in contact with a second substrate coated with an adhesive; Separating the first substrate after rotating in a fixed state; Epitaxial growth on one surface of the plurality of wafers to form a light emitting layer; Separating the second substrate by removing adhesive from the other surfaces of the plurality of wafers; Cutting to produce an LED chip for the plurality of wafers on which the epi growth has been performed; And performing chip packaging and modularization on the LED chip.

As described above, the epitaxial growth is simultaneously performed through planarization of a plurality of wafers having different physical conditions (ie, shape, size, thickness, etc.) that are exposed to the appearance of the present invention, thereby improving productivity of the LED.

In addition, the present invention has the effect that it is possible to perform epi growth on a plurality of wafers simultaneously, even if the manufacturers of the wafers are the same or different.

1 is a flow chart showing a conventional LED manufacturing process,
2 is a flowchart illustrating a method of manufacturing an epi wafer for a plurality of wafers according to the present invention;
3A and 3B are explanatory diagrams illustrating a process of aligning and arranging a plurality of wafers on a planarization substrate;
3C is an explanatory diagram for an epitaxial growth process due to a step between a plurality of wafers;
4 is a view illustrating a process of aligning and arranging the substrate for planarization;
5 is a view showing a process of fixing a fixing substrate to a plurality of wafers,
6 is a view showing a process of separating the flattening substrate after rotating the fixing substrate,
7 is a view showing an epitaxial growth process,
8 is a diagram illustrating a cutting process.

BRIEF DESCRIPTION OF THE DRAWINGS The above and other objects, features and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings, It can be easily carried out. In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail. Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 is a flowchart illustrating a method of manufacturing an epi wafer for a plurality of wafers according to the present invention. 3A and 3B are explanatory diagrams illustrating a process of aligning and arranging a plurality of wafers on a planarization substrate, and FIG. 3C is an explanatory diagram illustrating an epitaxial growth process due to a step between a plurality of wafers. 4 is a view illustrating a process of aligning and arranging the substrate for planarization. 5 is a view illustrating a process of fixing a fixing substrate to a plurality of wafers. 6 is a view showing a process of separating the planarizing substrate after rotating the fixing substrate. 7 is a diagram illustrating an epitaxial growth process. 8 is a diagram illustrating a cutting process.

As shown in Figures 2 to 8, the epi wafer fabrication method for a plurality of wafers according to the present invention, epi-wafer 305 for a plurality of wafers 301 fabricated not only in the same manufacturing environment but also in a heterogeneous manufacturing environment. By simultaneously producing, the productivity of the LED chip 306 can be increased and the manufacturing cost of the chip can be lowered. This improves the productivity of the LED chip 306 because it is possible to mass produce a plurality of epi wafers 305 at a time using the existing plurality of wafers 301 as they are without increasing the area of the wafer 301. Can be.

First, the plurality of wafers 301 are aligned and arranged on the planarization substrate 302 (S201).

At this time, each of the plurality of wafers 301 is not limited to a product produced by the same manufacturer or a product produced by different manufacturers. That is, the plurality of wafers 301 may be various kinds of products having physical conditions (ie, shapes, sizes, thicknesses, and the like) that appear in appearance. For example, each of the plurality of wafers 301 is disposed on the planarization substrate 302 as a 2-inch square or round wafer regardless of the wafer shape (see FIG. 3A), or a 2-inch wafer or 4 regardless of the wafer size. An inch wafer may be placed on the planarization substrate 302 (see FIG. 3B). In addition, although each of the plurality of wafers 301 is not illustrated in the drawings, it is obvious that the wafers may have the same wafer shape and size.

This is because there is no limitation in wafer shape and size as the epitaxial growth process S204 to be described later is performed uniformly with respect to the horizontal direction of the wafer 301 even though each of the plurality of wafers 301 is different in wafer shape and size. Because.

However, when the plurality of wafers 301 have different wafer thicknesses, there is a step between the surfaces of the respective wafers 301 on which the epitaxial growth process S204 is performed due to the thickness difference (see FIG. 3C). This is because the epitaxial growth process S204, which will be described later, is performed non-uniformly with respect to the vertical direction of the wafer 301, and thus negatively bonds between crystal layers such as the wafer 301 on the layer of the wafer 301, thereby achieving a desired yield. It means difficult to do.

Accordingly, in the present invention, even if there is a thickness difference for each of the plurality of wafers 301, the epitaxial growth process (S204) to be described later is performed after adjusting so that there is no step difference between the surfaces of each wafer 301. In this case, the plurality of wafers 301 are disposed on the planarization substrate 302, and the contact surface of the wafer 301 in contact with the planarization substrate 302 is flat even if a thickness difference exists between the respective wafers 301.

Accordingly, in the present invention, when the wafer 301 is disposed on the planarization substrate 302, the epitaxial growth process S204 is performed on the lower surface of the wafer 301 rather than the upper surface of the wafer 301 in the drawing. . That is, the epitaxial growth step (S204) to be described later is performed on the contact surface of the wafer 301 in contact with the planarization substrate 302.

Here, for convenience of description, the contact surface of the wafer 301 on which the epitaxial growth process (S204), which will be described later, is performed will be referred to as "epi-surface" hereinafter, and the opposite surface will hereinafter be referred to as "epi-opposite surface", and between wafers 301 The reference line on the epi plane is hereinafter referred to as "epi line A-A '".

On the other hand, the planarization substrate 302 forms an air hole 302a on the placement point of each wafer 301 for fixing and separating the wafer 301 by vacuum compression when placing the plurality of wafers 301. do. In addition, each of the plurality of wafers 301 is generated by coring a wafer ingot grown on the A axis or the C axis, and is generated by the Kiropulos method, the vertical-horizontal temperature gradient method, the Chocolaski method, or the like.

Next, the plurality of wafers 301 are fixed to the planarization substrate 302 after the epi surface is fixed (S201), and the surface opposite to the surface is fixed to the substrate 303 for fixing (S202). At this time, the fixing substrate 303 is coated with an adhesive 303a (adhesive) capable of fixing the wafer 301 to the epi surface of the wafer 301. Here, the adhesive 303a is an aromatic series heat resistant resin having high heat resistance characteristics, typically polybenzimidazole-based (PBI), polyphenylquinoxazolin-based (PPQ), polybenzoxazole-based (PBO), polybenz Thiazole type (PBT), polyamideimide type (PAI), polyimide type (PI), etc. can be applied.

The plurality of wafers 301 have a gap between the fixing substrate 303 and the opposite side of the epi due to the thickness difference. At this time, the adhesive 303a fills the gap between the fixing substrate 303 and the opposite side of the epi while curing. In other words, the adhesive 303a is responsible for compensating for the difference in thickness between the wafer 301 and the fixing substrate 303. The fixing substrate 303 is made of a laser-transmissive material for removing the cured adhesive 303a.

Subsequently, when the opposite surfaces of the plurality of wafers 301 are fixed to the fixing substrate 303 (S202), the positions of the epi surfaces and the epi opposite surfaces are reversed through a 180 ° rotation (S203). In this case, the plurality of wafers 301 are positioned between the planarizing substrate 302 and the fixing substrate 303 to be integrally fixed. This is to allow the epitaxial growth process S204 to be described later to be performed on the epitaxial line A-A 'of the same height, facing the epitaxial surface of each wafer 301 upward. At this time, the planarization substrate 302 is rotated and separated from the wafer 301.

Next, each of the plurality of wafers 301 is subjected to an epitaxial growth process in which the light emitting layers 304a and 304b are grown on the epitaxial surface (S204). In this case, the light emitting layers 304a and 304b include N-type semiconductor layers (N-GaN and 304a) and P-type semiconductor layers (P-GaN and 304b). That is, the plurality of wafers 301 form a plurality of epi wafers 305. In this case, the epitaxial growth process (S204) applies a conventional organometallic chemical vapor deposition (MOCVD) method, a detailed description thereof will be omitted since it will be readily understood by those skilled in the art. In general, the organometallic chemical vapor deposition (MOCVD) equipment is using a size of up to 12 inches due to semiconductor wafer size limitation, but as shown in the present invention, the epitaxial growth process (S204) for the plurality of wafers 301 may be performed. In this case, it is not limited to 12 inches and can be expanded as needed.

Thereafter, the fixing substrate 303 is separated from the wafer 301 as the cured adhesive 303a is removed from the epitaxial side of the wafer 301 by a laser (S205).

Thereafter, each of the plurality of epi wafers 305 is subjected to a cutting process (S206). As a result, a plurality of LED chips 306 are generated in the plurality of epi wafers 305. Here, the plurality of LED chips 306 perform a series of processes for photolithography, etching, and electrode deposition to form a current line on the epi wafer 305, and then, on a unit chip basis Cut to finish.

In the above, the present invention has been illustrated and described with reference to specific preferred embodiments, but the present invention is not limited to the above-described embodiments, and the present invention is not limited to the spirit of the present invention. Various changes and modifications will be possible by those who have the same.

301: wafer 302: planarization substrate
303: substrate for fixing 303a: adhesive
304a: N-type semiconductor layer 304b: P-type semiconductor layer
305: epi wafer 306: LED chip

Claims (8)

Placing and fixing the plurality of wafers on the first substrate to planarize the surfaces thereof, and then fixing the other surfaces of the plurality of wafers in contact with the second substrate coated with an adhesive;
Separating the first substrate after rotating in a fixed state;
Forming an emission layer by performing epi growth on one surface of the plurality of wafers; And
Separating the second substrate by removing adhesive from the other surfaces of the plurality of wafers;
Epi wafer manufacturing method using a plurality of wafers comprising a. The method of claim 1,
The first substrate,
An epi wafer manufacturing method using a plurality of wafers, characterized in that separated and fixed to one surface of the plurality of wafers by using a vacuum compression method. The method of claim 1,
The second substrate,
And the cured adhesive is separated from the plurality of wafer other surfaces as the cured adhesive is removed by a laser. The method of claim 1,
The plurality of wafers,
An epi wafer manufacturing method using a plurality of wafers, characterized in that at least one of a shape, a size, and a thickness is different. The method of claim 1,
The adhesive,
And forming a gap between the plurality of wafer other surfaces and the second substrate. The method of claim 1,
Performing the epi growth,
An epi-wafer manufacturing method using a plurality of wafers, characterized by using an organometallic chemical vapor deposition (MOCVD) method. The method according to any one of claims 1 to 6,
After separating the second substrate,
Cutting to produce an LED chip for the plurality of wafers on which the epi growth has been performed
Epi wafer manufacturing method using a plurality of wafers further comprising. Generating a plurality of wafers;
Placing and fixing the plurality of wafers on a first substrate to planarize the surfaces, and fixing the other surfaces of the plurality of wafers in contact with a second substrate coated with an adhesive;
Separating the first substrate after rotating in a fixed state;
Epitaxial growth on one surface of the plurality of wafers to form a light emitting layer;
Separating the second substrate by removing adhesive from the other surfaces of the plurality of wafers;
Cutting to produce an LED chip for the plurality of wafers on which the epi growth has been performed; And
Performing chip packaging and modularization on the LED chip;
LED manufacturing method comprising a.

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