KR101090454B1 - Apparatus and method for testing ssd devices - Google Patents

Abstract

PURPOSE: A device and a method for testing SSD devices are provided to minimize manufacturing and classification issues during testing a SSD component product by displaying the work errors of an operator. CONSTITUTION: An MCU(Micro Controller Unit)(222) communicates with a tester(210) and performs a self test about a display unit(225). The MCU is operated with a test standby monitoring mode which monitors the work errors of an operator according to socket failure information and a self-test result which are inputted from a tester when preparing a product test. The MCU is operated with a post test monitoring mode which monitors the work errors of the operator according to a product test result of the tester after testing a product.

Description

Apparatus and method for testing SSD devices}

The present invention relates to a solid state drive (SSD) device testing method and method, and more particularly to a solid state drive device testing device and method for monitoring and displaying the operation error of the operator before and after product testing will be.

Many kinds of digital devices are developed and used today, and each digital device includes various semiconductor devices. These semiconductor devices must pass product tests before they are released, and test devices are developed and used for each semiconductor device.

Among the semiconductor devices, unlike the hard disk drive (HDD), which is similar to the recent hard disk drive (HDD), unlike the mechanical device HDD, solid state drive (Solid State Drive) device that stores information using a semiconductor device such as flash memory to replace the next-generation storage It is attracting attention as a device.

SSD devices are used to replace hard disk drives (HDD) used in computers and mini hard disks (Hard Disk) used in mobile terminals. SSD device uses a semiconductor device such as flash memory to store data, so that there is no mechanical movement compared to hard disk drive (HDD), and long drive time, latency time and mechanical delay time which are problems of hard disk drive (HDD) Can be reduced. Therefore, SSD has the advantage that the execution speed of the program is faster, and the boot time is shorter than that of the hard disk when used as a boot disk.

The configuration and operation of the SSD device will be described with reference to FIG. 1. 1 illustrates a bare SSD device in which a case is not assembled. The SSD device includes a printed circuit board 1, a plurality of flash memories 2, a controller 3, and a connector 4. A plurality of flash memories 2, a controller 3 and a connector 4 are mounted on the printed circuit board 1, respectively. The controller 3 configuring the SSD device generally controls the SSD device, and the plurality of flash memories 2 store data under the control of the controller 3. The connector 4 into which data is input and output is provided with a plurality of pins 4a and connected to an input / output terminal (not shown) of a computer or a mobile terminal.

The SSD device test device performs various product tests before the SSD device is released to the market. Currently, the SSD device test device is not built as a complete automation line. That is, in order to perform the test, the operator manually mounts the SSD devices under test to the test device, and after the test is completed, the worker separates the SSD devices from the test device and passes / fails the test devices. Each of the SSD elements determined as is classified.

Therefore, even if the worker incorrectly mounts the SSD devices under test to the socket of the test device or the socket itself is broken, the operator cannot recognize the error and the operator mistake when classifying the SSD devices as pass / fail after the test is completed. There is a risk of misclassification.

SUMMARY OF THE INVENTION An object of the present invention, which is devised to solve the above-mentioned problems of the prior art, is an apparatus and method for detecting an operation error of an operator according to a self-test result of a test apparatus, socket failure information, and an SSD device test result and displaying the same to an operator. It is to provide.

The solid state drive device test apparatus according to the present invention for achieving the above object is a test board including a plurality of sockets into which the test target SSD device is inserted, and a plurality of sockets included in the test board unit. A solid state drive device test apparatus including a tester unit for performing a product test on a plurality of SSD devices, wherein the test board unit communicates with the tester unit and manufactures a product according to a socket failure information and a product test result input from the tester unit. A microcontroller operating in a test preparation monitoring mode for monitoring a worker's work error during test preparation and a post test monitoring mode for monitoring a worker's work error after test, and the socket failure information and the product under the control of the microcontroller. Test results Built-in memory, and that under the control of the microcontroller, characterized by including display means for displaying an operation error of the operator.

In addition, the solid state drive device test method according to the present invention, the first step of the microcontroller is initialized, performs a self-test, and the microcontroller determines whether the socket is unavailable using the self-test result and the socket failure information A second step of displaying, a third step of the microcontroller checking whether a product test result is stored in the memory, and a check result of the third step, if the product test result is not stored, the microcontroller performs a product test In the fourth step of performing a test preparation monitoring mode for monitoring a worker's work error during preparation, and if the product test result of the check result of the third step is stored, the microcontroller monitors the worker's work error after the product test. The fifth step of performing the post test monitoring mode It is characterized by including.

As described above, according to the present invention, when the SSD device product test is performed, an operation error of the operator is displayed to enable accurate work, thereby reducing the misoperation and misclassification of the SSD device product test.

1 is a diagram illustrating an SSD device in a bare state in which a case is not assembled.
Fig. 2 is a block diagram of a solid state drive (SSD) device test apparatus to which the present invention is applied.
3 is an operation flowchart illustrating a solid state drive (SSD) device test method according to the present invention.
FIG. 4 is an operation flowchart illustrating the test preparation monitoring mode subroutine shown in FIG. 3.
FIG. 5 is an operation flowchart showing the post test monitoring mode subroutine shown in FIG.

Hereinafter, a solid state drive (SSD) device test apparatus and method according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

2 is a block diagram of a solid state drive device test apparatus to which the present invention is applied.

The SSD device test apparatus is mounted on a test board unit 220 including a plurality of sockets 221a and 221b into which a test target SSD device is inserted, and a plurality of sockets 221a and 221b included in the test board unit 220. It includes a tester unit 210 for performing a product test on a plurality of test target SSD devices.

The test board unit 220 has a structure that can be connected to / detached from the tester unit 210, and tests the plurality of sockets 221a and 221b in a state in which the test board unit 220 is separated from the tester unit 210. The target SSD devices are inserted or separated, and the test board unit 220 in which the test target SSD devices are inserted is connected to the tester 210 to perform a product test on the test target SSD devices. Of course, in the state in which the test board unit 220 is connected to the tester 210, the SSD elements to be tested may be inserted into the sockets 221a and 221b or separated from the sockets 221a and 221b.

The test board unit 220 communicates with the tester unit 210 and performs a self test, and a test for monitoring a work error of a worker in preparation for a product test according to a self test result and socket failure information input from the tester unit 210. A microcontroller 222 operating in a post test monitoring mode for monitoring an operation error of an operator after a product test according to a preparation monitoring mode and a product test result, and under the control of the microcontroller 222 Memory 223 for storing test results, socket failure information and the product test results, and display means for displaying the operation error of the operator under the control of the microcontroller 222.

Communication between the microcontroller 222 and the tester 210 is performed through an IEEE standard Joint Test Action Group (JTAG) pin, and serial peripherd interface (SPI) communication is performed using one of the JTAG pins. The microcontroller 222 loads firmware (FIRMWARE) that performs the above functions.

The memory 223 may be embodied as an electrically erasable programmable read-only memory (EEPROM), or may be embodied as an internal EEPROM of the microcontroller 222.

The display means includes a shift register 224 for receiving display control signals from the microcontroller 222 and a plurality of LEDs (light emitted diodes) which are turned on or off in accordance with the output signal of the shift register 224. And a display unit 225. The LEDs of the LED display unit 225 correspond to the respective sockets and indicate the state of the corresponding sockets.

The microcontroller 222 performs a self test on the LEDs, monitors each LED for failure and stores the LEDs in the memory 223, and sends an unusable display control signal to a socket corresponding to the failed LED. The microcontroller 222 monitors whether the SSD device is inserted into the sockets 221a and 221b of the test board unit 220 and transmits an SSD control display display signal. The microcontroller 222 receives the product test result from the tester unit 210 and stores the result of the product test in the memory 223 and transmits a pass / fail display control signal indicating the SSD device that has passed and the SSD device that has failed. The microcontroller 222 receives the socket failure information together with the product test result from the tester 210, stores the socket failure information in the memory 223, and transmits an unusable display control signal to the failed socket.

The microcontroller 222 transmits the above-described display control signals to the shift register 224. The shift register 224 is a series-parallel shift register. The shift register 224 converts display control signals input in series from the microcontroller 222 in parallel and sends them to the LED display unit 225 so that each LED of the LED display unit 225 is individually. To turn on / off. The LED display unit 225 may display both the useless indication of the socket, the indication whether the socket is installed in the socket, and the test pass / fail indication of the corresponding SSD device on the same LED or on different LEDs.

A circuit configuration for monitoring whether the microcontroller 222 is inserted into the SSD device will be described. In order for the microcontroller 222 to monitor whether the SSD device is inserted into an arbitrary socket, a pull-up resistor is provided between the ground terminal of the test board unit 210 and the power terminal connected to the ground terminal of the SSD device. And a GPIO (general purpose I / O) pin of the microcontroller 222 to a contact of the ground terminal and the pull-up resistor. If the SSD device is not inserted into the socket, the GPIO pin becomes high level by the pull-up resistor. If the SSD device is normally inserted into the socket, the GPIO pin becomes low level. The microcontroller 222 is connected to the socket according to the level of the GPIO pin. It detects whether the SSD device is inserted and displays it on the LED display unit 225.

The microcontroller 222 monitors a worker's work error in preparation of a product test (test preparation monitoring mode) and monitors a worker's work error after a product test (post test monitoring mode). This test preparation monitoring mode and the post test monitoring mode are alternately performed. The microcontroller 222 performs the test preparation monitoring mode and performs the post test monitoring mode when the power is turned on even after the power is turned off after receiving the product test result from the tester 210. In addition, even if the post test monitoring mode is performed and the power is turned off, the test preparation monitoring mode is performed at power on later.

3 is an operation flowchart illustrating a solid state drive device test method according to the present invention.

When the microcontroller 222 loaded with the firmware is powered on (S31), the microcontroller 222 is initialized (S32), and performs a self test (S33). For the self test, the microcontroller 222 blinks the LEDs of the LED display unit 225 corresponding to the sockets 221a and 221b of the test board unit 220. The microcontroller 222 stores the LED failure information according to the self test result in the memory 223, and reads the LED failure information and the socket failure information from the memory 223, and the corresponding LED of the LED display unit 225 for the socket cannot be used. Display on so that the operator can recognize the unusable socket (S34).

Next, the microcontroller 222 checks whether the product test result is stored in the memory 223 (S35). If the product test result is not stored in the check result of step S35, the test preparation monitoring mode is performed (S36). If the product test result is stored in the check result memory 223 of step S35, the post test monitoring mode is performed (S37). ).

While monitoring whether the power is turned off (S38), steps S35 to S37 are repeated.

FIG. 4 is an operation flowchart illustrating the test preparation monitoring mode subroutine shown in FIG. 3.

The microcontroller 222 monitors whether the SSD element is inserted into the socket, and when the SSD element is inserted into an arbitrary socket (S41), reads the unavailable information of the socket from the memory 223 (S42), and the socket is If the socket is unavailable (S43), a warning to the worker (S44). As a warning method, all LEDs of the LED display unit 225 may be blinked.

Next, a product test is performed on the SSD devices inserted into the sockets of the test board unit 220 while the test board unit 220 and the tester unit 210 are connected (S45), and from the tester unit 210, When the product test result is input (S46), the input product test result is stored in the memory 223 (S47). At this time, the microcontroller 222 receives the socket failure information together from the tester 210 and updates the memory 223.

When the product test is completed in this way, the operator may perform a disconnection operation (pass / fail) on the tested SSD device while the test board unit 220 is connected to the tester unit 210, or the power is turned off. After separating the test board unit 220 into the tester unit 210 may perform a separation operation for the tested SSD device in another place. In the post test monitoring mode of the present invention, the operator's work error is monitored when the tested SSD device is disconnected.

FIG. 5 is an operation flowchart showing the post test monitoring mode subroutine shown in FIG.

The microcontroller reads the product test result from the memory (S51), and displays pass / fail information for each tested SSD device (S52). When the worker removes the SSD device from the socket (S53), it is checked whether the separated SSD device is the SSD device that has been passed (S54). If it is determined that the SSD device has passed, it is checked whether the SSD device that has been rejected currently remains in the test board unit (S55), and an alarm is generated when the SSD device that has failed is left (S56). That is, when the pass SSD device is detached while the SSD device failed to be left remains in the test board unit, an alarm is generated, so that the SSD device determined to pass after the completion of separation for the failed SSD device is separated to pass. Ensure that the failed SSD devices are classified correctly. When the separation of all SSD elements is completed (S57), it ends.

210: tester 220: test board
221a, 221b: Socket 222: Microcontroller
223: memory 224: shift register
225: LED display unit

Claims (9)

A solid state drive device including a test board unit including a plurality of sockets into which a test target SSD device is inserted, and a tester unit performing a product test on a plurality of SSD devices inserted into the sockets included in the test board unit. In the test apparatus,
The test board unit,
Communicate with the tester and perform a self-test on the display means, and operate in a test preparation monitoring mode for monitoring a work error of the operator according to the socket failure information and the self-test result input from the tester when preparing for the product test. A microcontroller operating in a post test monitoring mode for monitoring a work error of an operator according to a product test result inputted from the tester after a product test;
A memory configured to store the socket failure information, the self test result, and the product test result under control of the microcontroller;
Display means for displaying the availability of the socket and the operation error of the operator under the control of the microcontroller,
The microcontroller outputs a socket disable indication control signal indicating whether the socket is available based on the socket failure information and the self test result to the display means,
The microcontroller is a solid state drive device test device, characterized in that for warning the operation error of the operator by controlling the display means when the SSD element is inserted into any socket marked non-use of the socket. The solid state drive device test apparatus of claim 1, wherein the test board unit is configured to be connected to or detached from the tester unit. The method of claim 1, wherein when the SSD device is disconnected from any socket, the microcontroller checks whether the separated SSD device is a passed SSD device, and if the separated SSD device is a passed SSD device, the microcontroller remains. The device for testing the solid state drive device, characterized in that a failure determination SSD device is checked to determine whether a failed SSD device remains, and the display means is controlled to warn an operator of an operation error. The SSD device of claim 1, wherein the microcontroller monitors whether an SSD device is inserted into the sockets, and determines whether the SSD is mounted or not, and whether the SSD test device receives the product test result. And a pass / fail display control signal for indicating a failed SSD element. The display device of claim 1, wherein the display means comprises: a shift register configured to receive serial display control signals from the microcontroller and convert them in parallel; and a plurality of LEDs each of which is turned on or off according to an output signal of the shift register. Solid state drive device test device comprising a display unit. A first step in which the microcontroller performs a self-test on the display means;
A second step of the microcontroller determining whether the socket is unavailable using the self test result and the socket failure information, and outputting a socket disable indication control signal to a display means;
A third step of checking, by the microcontroller, whether a product test result is stored in a memory;
A fourth step of performing a test preparation monitoring mode in which the microcontroller monitors an operation error of a worker when preparing a product test, if the product test result is not stored in the third step;
And a fifth step of performing the post test monitoring mode in which the microcontroller monitors a worker's work error after the product test, if the product test result is stored in the third step.
In the fourth step, the microcontroller monitors whether the SSD device is inserted into the socket, and when the SSD device is inserted into any socket, reads whether the socket into which the SSD device is inserted is unusable; And a forty-second step of generating a warning if the socket into which the SSD device is inserted is unavailable as a result of the read in step 41. The method of claim 6, wherein the fourth step, if the product test is performed on the SSD elements inserted into the sockets by the tester unit, and the product test result is input from the tester unit, the microcontroller is input to the input And a step 43 of storing the product test result in the memory. 8. The method of claim 7, wherein the microcontroller receives the socket failure information from the tester unit and updates the socket failure information in the memory. The method of claim 6, wherein the fifth step comprises: the microcontroller reading the product test result from the memory and displaying pass / fail information for each tested SSD device;
When the SSD device is disconnected from the socket by a worker, the microcontroller checks whether the separated SSD device is an SSD device that has been determined to be passed;
A 53rd step of checking whether there is a remaining failing SSD device if the separated SSD device is a determined SSD device as a result of the checking of the 52nd step;
A 54th step of generating an alarm when the SSD device determined to fail as a result of the checking in the 53rd step remains;
And if the separated SSD device is not the determined SSD device as a result of the check in step 52 or if the SSD device determined as failing as a result of the check in step 53 does not remain, the process returns to step 52. A solid state drive device testing method.

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