KR101074621B1 - 프로액티브 브랜치 타겟 어드레스 캐시 관리를 위한 방법들 및 장치 - Google Patents

프로액티브 브랜치 타겟 어드레스 캐시 관리를 위한 방법들 및 장치 Download PDF

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KR101074621B1
KR101074621B1 KR1020097001907A KR20097001907A KR101074621B1 KR 101074621 B1 KR101074621 B1 KR 101074621B1 KR 1020097001907 A KR1020097001907 A KR 1020097001907A KR 20097001907 A KR20097001907 A KR 20097001907A KR 101074621 B1 KR101074621 B1 KR 101074621B1
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stage
btac
branch
entry
prediction system
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KR20090031751A (ko
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보후슬라브 리치릭
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콸콤 인코포레이티드
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842Speculative instruction execution
    • G06F9/3844Speculative instruction execution using dynamic branch prediction, e.g. using branch history tables
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802Instruction prefetching
    • G06F9/3804Instruction prefetching for branches, e.g. hedging, branch folding
    • G06F9/3806Instruction prefetching for branches, e.g. hedging, branch folding using address prediction, e.g. return stack, branch history buffer
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842Speculative instruction execution
    • G06F9/3848Speculative instruction execution using hybrid branch prediction, e.g. selection between prediction techniques
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861Recovery, e.g. branch miss-prediction, exception handling

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
KR1020097001907A 2006-06-29 2007-06-28 프로액티브 브랜치 타겟 어드레스 캐시 관리를 위한 방법들 및 장치 Expired - Fee Related KR101074621B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/427,349 2006-06-29
US11/427,349 US8935517B2 (en) 2006-06-29 2006-06-29 System and method for selectively managing a branch target address cache of a multiple-stage predictor

Publications (2)

Publication Number Publication Date
KR20090031751A KR20090031751A (ko) 2009-03-27
KR101074621B1 true KR101074621B1 (ko) 2011-10-17

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KR1020097001907A Expired - Fee Related KR101074621B1 (ko) 2006-06-29 2007-06-28 프로액티브 브랜치 타겟 어드레스 캐시 관리를 위한 방법들 및 장치

Country Status (12)

Country Link
US (2) US8935517B2 (enExample)
EP (2) EP2035921B1 (enExample)
JP (4) JP5558814B2 (enExample)
KR (1) KR101074621B1 (enExample)
CN (1) CN101479700B (enExample)
BR (1) BRPI0713434A2 (enExample)
CA (1) CA2654231A1 (enExample)
ES (1) ES2386478T3 (enExample)
MX (1) MX2008016116A (enExample)
RU (1) RU2421783C2 (enExample)
TW (1) TWI386850B (enExample)
WO (1) WO2008003019A2 (enExample)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3798998B2 (ja) * 2002-06-28 2006-07-19 富士通株式会社 分岐予測装置および分岐予測方法
US8935517B2 (en) * 2006-06-29 2015-01-13 Qualcomm Incorporated System and method for selectively managing a branch target address cache of a multiple-stage predictor
JP5145809B2 (ja) * 2007-07-31 2013-02-20 日本電気株式会社 分岐予測装置、ハイブリッド分岐予測装置、プロセッサ、分岐予測方法、及び分岐予測制御プログラム
WO2010081942A1 (fr) 2008-12-05 2010-07-22 Alex Hr Roustaei Piles ou micro piles a hydrogene avec un generateur d ' hydrogene
FR2956869B1 (fr) 2010-03-01 2014-05-16 Alex Hr Roustaei Systeme de production de film flexible a haute capacite destine a des cellules photovoltaiques et oled par deposition cyclique des couches
JP2011209774A (ja) * 2010-03-26 2011-10-20 Fujitsu Ltd 分岐予測方法及びその方法を実行する分岐予測回路
US8375565B2 (en) 2010-05-28 2013-02-19 Western Digital (Fremont), Llc Method for providing an electronic lapping guide corresponding to a near-field transducer of an energy assisted magnetic recording transducer
US8351307B1 (en) 2010-06-04 2013-01-08 Western Digital (Fremont), Llc Trailing edge optimized near field transducer having non-rectangular pin cross section
US8320219B1 (en) 2010-06-15 2012-11-27 Western Digital (Fremont), Llc Trailing edge optimized near field transducer
JP5656074B2 (ja) * 2011-02-21 2015-01-21 日本電気株式会社 分岐予測装置、プロセッサ及び分岐予測方法
US9201654B2 (en) * 2011-06-28 2015-12-01 International Business Machines Corporation Processor and data processing method incorporating an instruction pipeline with conditional branch direction prediction for fast access to branch target instructions
US8749790B1 (en) 2011-12-08 2014-06-10 Western Digital (Fremont), Llc Structure and method to measure waveguide power absorption by surface plasmon element
US9811341B2 (en) 2011-12-29 2017-11-07 Intel Corporation Managed instruction cache prefetching
US9430241B2 (en) 2012-06-15 2016-08-30 International Business Machines Corporation Semi-exclusive second-level branch target buffer
US9280351B2 (en) 2012-06-15 2016-03-08 International Business Machines Corporation Second-level branch target buffer bulk transfer filtering
US9298465B2 (en) 2012-06-15 2016-03-29 International Business Machines Corporation Asynchronous lookahead hierarchical branch prediction
US20140006752A1 (en) * 2012-06-27 2014-01-02 Qualcomm Incorporated Qualifying Software Branch-Target Hints with Hardware-Based Predictions
US10042776B2 (en) * 2012-11-20 2018-08-07 Arm Limited Prefetching based upon return addresses
US9441938B1 (en) 2013-10-08 2016-09-13 Western Digital (Fremont), Llc Test structures for measuring near field transducer disc length
JP6393590B2 (ja) * 2013-11-22 2018-09-19 株式会社半導体エネルギー研究所 半導体装置
US9563430B2 (en) 2014-03-19 2017-02-07 International Business Machines Corporation Dynamic thread sharing in branch prediction structures
US10353819B2 (en) * 2016-06-24 2019-07-16 Qualcomm Incorporated Next line prefetchers employing initial high prefetch prediction confidence states for throttling next line prefetches in a processor-based system
US20170371669A1 (en) * 2016-06-24 2017-12-28 Qualcomm Incorporated Branch target predictor
GB2553582B (en) 2016-09-13 2020-07-08 Advanced Risc Mach Ltd An apparatus and method for generating and processing a trace stream indicative of instruction execution by processing circuitry
US10613869B2 (en) * 2018-03-29 2020-04-07 Arm Limited Branch target address provision
US20210149676A1 (en) * 2019-11-14 2021-05-20 Higon Austin R&D Center Corporation Branch Prediction Method, Branch Prediction Unit and Processor Core

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020188833A1 (en) * 2001-05-04 2002-12-12 Ip First Llc Dual call/return stack branch prediction system
US20040186985A1 (en) * 2003-03-21 2004-09-23 Analog Devices, Inc. Method and apparatus for branch prediction based on branch targets

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2018A (en) * 1841-03-26 Joseph francis
US4018A (en) * 1845-05-01 Closing and opening the- entrances to beehives
JP2560889B2 (ja) * 1990-05-22 1996-12-04 日本電気株式会社 マイクロプロセッサ
TW345637B (en) 1994-02-04 1998-11-21 Motorola Inc Data processor with branch target address cache and method of operation a data processor has a BTAC storing a number of recently encountered fetch address-target address pairs.
JP3494484B2 (ja) * 1994-10-12 2004-02-09 株式会社ルネサステクノロジ 命令処理装置
JP3765111B2 (ja) 1995-08-29 2006-04-12 株式会社日立製作所 分岐登録命令を有するプロセッサ
JPH10105401A (ja) * 1996-09-30 1998-04-24 Fujitsu Ltd プロセッサの分岐命令予測装置
US7103794B2 (en) * 1998-06-08 2006-09-05 Cacheflow, Inc. Network object cache engine
US5890008A (en) * 1997-06-25 1999-03-30 Sun Microsystems, Inc. Method for dynamically reconfiguring a processor
US5964870A (en) * 1997-09-22 1999-10-12 Intel Corporation Method and apparatus for using function context to improve branch
US6263427B1 (en) * 1998-09-04 2001-07-17 Rise Technology Company Branch prediction mechanism
US6553488B2 (en) * 1998-09-08 2003-04-22 Intel Corporation Method and apparatus for branch prediction using first and second level branch prediction tables
US6601161B2 (en) * 1998-12-30 2003-07-29 Intel Corporation Method and system for branch target prediction using path information
US6357016B1 (en) 1999-12-09 2002-03-12 Intel Corporation Method and apparatus for disabling a clock signal within a multithreaded processor
US6732260B1 (en) * 2000-03-06 2004-05-04 Intel Corporation Presbyopic branch target prefetch method and apparatus
US7000096B1 (en) * 2000-08-03 2006-02-14 International Business Machines Corporation Branch prediction circuits and methods and systems using the same
US20040172524A1 (en) * 2001-06-29 2004-09-02 Jan Hoogerbrugge Method, apparatus and compiler for predicting indirect branch target addresses
US7082520B2 (en) * 2002-05-09 2006-07-25 International Business Machines Corporation Branch prediction utilizing both a branch target buffer and a multiple target table
US6965983B2 (en) 2003-02-16 2005-11-15 Faraday Technology Corp. Simultaneously setting prefetch address and fetch address pipelined stages upon branch
US7831817B2 (en) * 2003-04-15 2010-11-09 Arm Limited Two-level branch prediction apparatus
KR100528479B1 (ko) * 2003-09-24 2005-11-15 삼성전자주식회사 전력 소모를 감소시키기 위한 분기 예측기 및 구현방법
WO2005103886A1 (ja) * 2004-04-21 2005-11-03 Fujitsu Limited 分岐予測装置、その方法、及びプロセサ
US7437543B2 (en) * 2005-04-19 2008-10-14 International Business Machines Corporation Reducing the fetch time of target instructions of a predicted taken branch instruction
US8935517B2 (en) 2006-06-29 2015-01-13 Qualcomm Incorporated System and method for selectively managing a branch target address cache of a multiple-stage predictor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020188833A1 (en) * 2001-05-04 2002-12-12 Ip First Llc Dual call/return stack branch prediction system
US20040186985A1 (en) * 2003-03-21 2004-09-23 Analog Devices, Inc. Method and apparatus for branch prediction based on branch targets

Also Published As

Publication number Publication date
US20080005543A1 (en) 2008-01-03
RU2009102809A (ru) 2010-08-10
KR20090031751A (ko) 2009-03-27
JP2013229038A (ja) 2013-11-07
US20120042155A1 (en) 2012-02-16
JP2009543223A (ja) 2009-12-03
WO2008003019A2 (en) 2008-01-03
US8782383B2 (en) 2014-07-15
EP2035921B1 (en) 2012-06-06
CN101479700A (zh) 2009-07-08
BRPI0713434A2 (pt) 2012-03-13
TWI386850B (zh) 2013-02-21
MX2008016116A (es) 2009-01-20
RU2421783C2 (ru) 2011-06-20
EP2434393A1 (en) 2012-03-28
WO2008003019A3 (en) 2008-05-02
US8935517B2 (en) 2015-01-13
JP5558814B2 (ja) 2014-07-23
CN101479700B (zh) 2015-06-03
JP2015144001A (ja) 2015-08-06
ES2386478T3 (es) 2012-08-21
JP2017107578A (ja) 2017-06-15
EP2434393B1 (en) 2017-12-20
CA2654231A1 (en) 2008-01-03
TW200816046A (en) 2008-04-01
EP2035921A2 (en) 2009-03-18

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