KR101052869B1 - Phase change memory device and manufacturing method thereof - Google Patents

Abstract

The present invention discloses a phase change memory device capable of increasing the current flow of a diode and improving contact resistance, and a method of manufacturing the same. The phase change memory device according to the present invention includes a plurality of active regions extending in one direction, spaced apart from each other in a direction perpendicular to the one direction, and having a wider width than the remaining portion of the diode formation region. .

Description

Phase change memory device and its manufacturing method {PHASE CHANGE RAM DEVICE AND METHOD OF MANUFACTURING THE SAME}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase change memory device and a method of manufacturing the same, and to a phase change memory device capable of increasing the current flow of a diode and improving contact resistance.

The memory device is a volatile random access memory (RAM) device that loses input information when the power is cut off, and a read only memory (ROM) device that maintains the storage state of the input information even when the power is cut off. It is largely divided. The volatile RAM devices may include DRAM and SRAM, and the nonvolatile ROM devices may include flash memory devices such as EEPROM (Elecrtically Erasable and Programmable ROM). have.

However, although the DRAM is a very good memory device as is well known, high charge storage capability is required, and for this purpose, it is difficult to achieve high integration because the electrode surface area must be increased. In addition, the flash memory device requires a high operating voltage compared to a power supply voltage in connection with a structure in which two gates are stacked, so that a separate boost circuit may be used to form a voltage required for write and erase operations. There is a difficulty in high integration because it is necessary.

Accordingly, many studies have been conducted to develop a new memory device having the characteristics of the nonvolatile memory device and having a simple structure. For example, recently, a phase change RAM device has been developed. Was proposed.

In the phase change memory device, a phase change film interposed between the electrodes through a current flow between the lower electrode and the upper electrode is changed from a crystal state to an amorphous state. It is a memory element for determining information stored in a cell by using a resistance difference. At this time, since the specific resistance of the phase change film having an amorphous state is higher than that of the phase change film having a crystalline state, the current flowing through the phase change film in the read mode is sensed so that the information stored in the phase change memory cell is logical '1' It is determined whether the logic is '0'.

On the other hand, a method of applying a vertical PN diode as a switching element in the manufacture of a phase change memory device of 512Mb or more has been proposed. In the case of applying the vertical PN diode, the cell size can be reduced to 6F ² or less.

However, in the above-described prior art, the area of the active region in which the vertical PN diode is formed is reduced according to the trend of higher integration of semiconductor devices. As a result, in the above-described prior art, the current of the PN diode which is highly dependent on the area is lowered, and the contact resistance is lowered due to the reduction of the diode area.

The present invention provides a phase change memory device capable of increasing the current flow of a diode and a method of manufacturing the same.

In addition, the present invention provides a phase change memory device capable of improving contact resistance and a method of manufacturing the same.

The phase change memory device according to the embodiment of the present invention includes an active region extending in one direction, spaced apart from each other in a direction perpendicular to the one direction, and having a diode width in a portion where the diode formation region is wider than the rest. Include.

The diode forming region portion of the active region protrudes to one side of the active region.

The portion of the diode forming region protrudes 10 to 100 nm toward one side of the active region.

The diode forming region portion of the active region protrudes to both sides of the active region.

The diode forming region portions protrude 10 to 50 nm on both sides of the active region, respectively.

In addition, a plurality of phase change memory elements according to an embodiment of the present invention are arranged in one direction and spaced apart from each other in a direction perpendicular to the one direction, and the diode forming region portion has a wider width than the remaining portion. A region formed on the diode forming region of the active region, a phase change memory cell formed on the diode, and a bit line formed on the phase change memory cell.

The diode forming region portion of the active region protrudes to one side of the active region.

The portion of the diode forming region protrudes 10 to 100 nm toward one side of the active region.

The diode forming region portion of the active region protrudes to both sides of the active region.

The diode forming region portions protrude 10 to 50 nm on both sides of the active region, respectively.

The semiconductor device may further include an impurity region formed in the surface of the active region.

The diode is a vertical PN diode.

The phase change memory cell has a structure including a phase change film.

In the method for manufacturing a phase change memory device according to an embodiment of the present invention, a plurality of phase change memory elements extend in one direction, spaced apart from each other in a direction perpendicular to the one direction, and the diode formation region is wider than the remaining portion. Defining an active region having a width, forming a diode on the diode forming region of the active region, forming a phase change memory cell on the diode and forming a bit line on the phase change memory cell Steps.

The active region is defined such that a portion of the diode forming region protrudes to one side of the active region.

The portion of the diode forming region protrudes 10 to 100 nm toward one side of the active region.

The active region is defined such that a portion of the diode forming region protrudes to both sides of the active region.

The diode forming region portions protrude 10 to 50 nm on both sides of the active region, respectively.

And forming an impurity region within the surface of the active region after defining the active region and before forming the diode.

The diode is formed of a vertical PN diode.

The phase change memory cell is formed to include a phase change film.

The present invention defines an active region in which the diode forming region has a wider width than the other portions, and forms a diode having a larger area on the active region than the conventional one, thereby increasing the current flow of the diode and improving the contact resistance. can do.

Therefore, the present invention can secure the stable characteristics of the diode can effectively improve the device characteristics and reliability.

Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the present invention.

1 is a plan view illustrating an active region of a phase change memory device according to an exemplary embodiment of the present invention.

As illustrated, an isolation layer 104 is formed in the semiconductor substrate 100 to define active regions 102 extending in one direction and spaced apart from each other in a direction perpendicular to the one direction. The active region 102 includes a diode forming region D, and the diode forming region D of the active region 102 has a length L1 of 10 to 150 nm in the active region 102. , At an interval L2 of 10 to 200 nm.

Here, the active region 102 is defined such that the diode forming region D has a wider width than the remaining portion. For example, a portion of the diode forming region D of the active region 102 protrudes to one side of the active region 102 by a first width W1, and the first width W1 is preferably: 10 to 100 nm.

In addition, when the pair of active regions 102 facing each other in the protruding direction of the diode forming region D are formed as one group G, the active regions 102 may be formed in one group G. It is spaced apart by the second width W2, and is spaced apart from the active region 102 of another neighboring group G by the third width W3. The second width W2 and the third width W3 are each preferably 10 to 100 nm.

Meanwhile, as another embodiment of the present invention, the active region may be defined such that the diode forming region protrudes to both sides of the active region.

2 is a plan view illustrating an active region of a phase change memory device according to another exemplary embodiment of the present invention.

As shown, the active region 102 defined in the semiconductor substrate 100 includes a diode forming region D, and the diode forming region D of the active region 102 is the active region 102. It has a length L1 of 10-150 nm in it, and is arrange | positioned at the interval L2 of 10-200 nm.

Here, the active region 102 is defined such that the diode forming region D has a wider width than the remaining portion. For example, portions of the diode forming region D of the active region 102 protrude to both sides of the active region 102 by a fourth width W4, respectively, and the fourth width W1 is preferably , 10 to 50 nm.

In addition, the active region 102 is spaced apart from another neighboring active region 102 by a fifth width W5, and the fifth width W5 is preferably 10 to 100 nm.

3 is a plan view illustrating a phase change memory device according to an embodiment of the present invention, and FIG. 4 is a cross-sectional view illustrating a phase change memory device according to an embodiment of the present invention corresponding to AA ′ of FIG. 3. 5 is a cross-sectional view for describing a phase change memory device according to an exemplary embodiment of the present invention, which corresponds to line B-B 'of FIG. 3.

3, 4, and 5, elements defining active regions 102 extending in one direction and spaced apart from each other in a direction perpendicular to the one direction in the semiconductor substrate 100 are arranged. Separation membrane 104 is formed. The active region 102 includes a diode forming region D, which is defined to have a wider width than the rest.

For example, a portion of the diode forming region D of the active region 102 protrudes to one side of the active region 102 by a first width W1, and the first width W1 is preferably: 10 to 100 nm. Meanwhile, as another embodiment of the present invention, the diode forming region D may protrude by 10 to 50 nm on both sides of the active region 102, respectively.

An impurity region 106 is formed in the surface of the active region 102, and a diode, eg, a vertical PN diode 114, is formed on the impurity region 106 of the diode formation region D. The vertical PN diode 114 has a structure including an N region 110 and a P region 112.

 In addition, a phase change memory cell 128 including a lower electrode 118, a phase change layer 120, an upper electrode 122, and an upper electrode contact 126 is formed on the vertical PN diode 114. The phase change layer 120 and the upper electrode 122 are formed in a line type extending in a direction perpendicular to the active region 102.

The bit line 130 is formed on the phase change memory cell 128 to extend in a direction perpendicular to the active region 102, that is, in a direction parallel to the phase change layer 120 and the upper electrode 122. A word line 132 is formed on the bit line 130 and extends in a direction perpendicular to the bit line 130.

6A to 6H are plan views illustrating processes for manufacturing a phase change memory device according to an exemplary embodiment of the present invention, and FIGS. 7A to 7H respectively correspond to lines AA ′ of FIGS. 6A to 6H. 8 is a cross-sectional view illustrating a method of manufacturing a phase change memory device according to an exemplary embodiment of the present invention, and FIGS. 8A to 8H illustrate embodiments of the present invention corresponding to lines B-B 'of FIGS. It is sectional drawing by process for demonstrating the manufacturing method of the phase change memory device which concerns.

6A, 7A, and 8A, the device isolation layer may be formed in the semiconductor 100 substrate to define an active region 102 extending in one direction and spaced apart in another direction perpendicular to the one direction. 104). The active region 102 includes a diode forming region D.

Here, the active region 102 is defined such that the diode forming region D has a wider width than the remaining portion. For example, a portion of the diode forming region D of the active region 102 protrudes to one side of the active region 102 by a first width W1, and the first width W1 is preferably 10. It is -100 nm.

Meanwhile, as another embodiment of the present invention, the active region 102 may be formed such that portions of the diode forming region D protrude to both sides of the active region 102. In this case, the diode forming region D ) Portions protrude 10 to 50 nm on both sides of the active region 102, respectively. (See Figure 2)

6B, 7B, and 8B, an impurity region 106 is formed in the surface of the active region 102 including the diode forming region D. Referring to FIGS. The impurity region 106 is preferably formed by an ion implantation process, and the ion implantation process is performed using, for example, an N-type impurity.

6C, 7C, and 8C, after forming the first insulating film 108 on the resultant of the semiconductor substrate 100 on which the impurity region 106 is formed, the first insulating film 108 is etched. A plurality of contact holes for exposing the impurity region 106 of the diode forming region D are formed. A diode, for example, a vertical PN diode 114, is formed in the contact hole to contact the impurity region 106.

The vertical PN diode 114 includes an N region 110 and a P region 112 that are sequentially stacked in the contact hole, and the N region 110 and the P region 112 may be, for example, an epi silicon layer. Is done. Meanwhile, as another embodiment of the present invention, a method of forming the first insulating layer 108 after forming the vertical PN diode 114 first is also possible.

Here, in the present invention, since the width of the diode forming region D of the active region 102 is increased than in the related art, the vertical PN diode 114 having a larger area than the conventional one may be formed. Therefore, the present invention increases the current flow of the vertical PN diode 114 and improves the contact resistance, thereby ensuring stable diode characteristics.

The vertical PN diode 114 is preferably formed in a rectangular or square shape having a length and a width of 10 to 150 nm, respectively. In addition, the vertical PN diode 114 is formed to have an interval a of 1 to 50 nm in all directions within the diode formation region D. FIG.

6D, 7D, and 8D, a second insulating layer 116 is formed on the first insulating layer 108 including the vertical PN diode 114. Then, the second insulating layer 116 is etched to form holes for exposing the vertical PN diodes 114, respectively, and then the holes are filled with a conductive layer to form the lower electrode 118.

The lower electrode 118 serves as a heater to generate Joule heat from the vertical PN diode 114 to a subsequent phase change film to cause phase change of the phase change film, and preferably, 10 to 100 nm. Form to have the length and width of.

6E, 7E, and 8E, the phase change film 120 and the upper electrode conductive film are sequentially formed on the second insulating film 116 including the lower electrode 118. next. The upper electrode conductive layer and the phase change layer 120 are patterned to form a phase change layer 120 and an upper electrode 122 in contact with the lower electrode 118.

Here, the phase change layer 120 and the upper electrode 122 are patterned in a line type extending in a direction perpendicular to the active region 102, and accordingly, the present invention allows patterning of the phase change layer 120. It is possible to reduce the etching loss occurring at the edge of the time.

6F, 7F, and 8F, after forming the third insulating layer 124 on the second insulating layer 116 to cover the phase change layer 120 and the upper electrode 122, the third insulating layer 124 is formed. The insulating layer 124 is etched to form a plurality of contact holes that expose the upper electrode 122, respectively. An upper electrode contact 126 contacting the upper electrode 122 is formed by filling a conductive layer in the contact hole.

As a result, a phase change memory cell 128 having a structure including a lower electrode 118, a phase change film 120, an upper electrode 122, and an upper electrode contact 126 is formed on the vertical PN diode 114. Is formed.

6G, 7G, and 8G, a bit line conductive film is deposited on the third insulating film 124 including the phase change memory cell 128. Then, the bit line conductive film is etched so as to extend in a direction perpendicular to the active region 102, that is, in a direction parallel to the phase change film 120 and the upper electrode 122. Bit line 130 in contact with 128 is formed.

6H, 7H, and 8H, a fourth insulating layer 132 is formed on the third insulating layer 124 including the bit line 130 to cover the bit line 130. Then, after the word line conductive film is deposited on the fourth insulating layer 132, the word line conductive film is etched to extend in a direction perpendicular to the bit line 130, thereby forming a word line 134. do.

Thereafter, although not shown, a series of subsequent known processes are sequentially performed to complete the manufacture of the phase change memory device according to the embodiment of the present invention.

As described above, in the embodiment of the present invention, the diode forming region portion defines an active region having a larger width than the other portions, and accordingly, the present invention provides a larger area than the prior art in the diode forming region of the active region. The diode can be formed.

Therefore, the present invention can increase the current flow of the diode and can block reverse current caused by the high voltage of the standby word line. In addition, the present invention can improve the contact resistance by increasing the contact area between the diode and the impurity region.

Therefore, the present invention can secure stable characteristics of the diode, thereby effectively improving the characteristics and reliability of the phase change memory device.

As mentioned above, although the present invention has been illustrated and described with reference to specific embodiments, the present invention is not limited thereto, and the following claims are not limited to the scope of the present invention without departing from the spirit and scope of the present invention. It can be easily understood by those skilled in the art that can be modified and modified.

1 is a plan view showing an active region of a phase change memory device according to an embodiment of the present invention.

2 is a plan view showing an active region of a phase change memory device according to another exemplary embodiment of the present invention.

3 is a plan view for explaining a phase change memory device according to an embodiment of the present invention;

4 is a cross-sectional view illustrating a phase change memory device according to an embodiment of the present invention corresponding to AA ′ in FIG. 3.

FIG. 5 is a cross-sectional view for illustrating a phase change memory device according to an embodiment of the present invention, corresponding to line B-B ′ of FIG. 3. FIG.

6A to 6H are plan views of processes for explaining a method of manufacturing a phase change memory device according to an embodiment of the present invention.

7A to 7H are cross-sectional views illustrating processes of manufacturing a phase change memory device according to an exemplary embodiment of the present invention, respectively, corresponding to lines AA ′ of FIGS. 6A to 6H.

8A to 8H are cross-sectional views illustrating processes of manufacturing a phase change memory device according to an exemplary embodiment of the present invention, which respectively correspond to lines B-B 'of FIGS. 6A to 6H.

Claims (21)

A plurality of active regions extending in one direction and spaced apart from each other in a direction perpendicular to the one direction, the diode forming region having a wider width than the remaining portion; Phase change memory device comprising a. Claim 2 has been abandoned due to the setting registration fee. The method of claim 1, And the diode forming region portion of the active region protrudes to one side of the active region. Claim 3 was abandoned when the setup registration fee was paid. The method of claim 2, And a portion of the diode formation region protrudes 10 to 100 nm toward one side of the active region. Claim 4 was abandoned when the registration fee was paid. The method of claim 1, And the diode forming region portion of the active region protrudes to both sides of the active region. Claim 5 was abandoned upon payment of a set-up fee. The method of claim 4, wherein A plurality of active regions extending in one direction and spaced apart from each other in a direction perpendicular to the one direction, the diode forming region having a wider width than the remaining portion; A diode formed on the diode forming region of the active region; A phase change memory cell formed on the diode; And A bit line formed on the phase change memory cell; Phase change memory device comprising a. Claim 7 was abandoned upon payment of a set-up fee. The method of claim 6, And the diode forming region portion of the active region protrudes to one side of the active region. Claim 8 was abandoned when the registration fee was paid. The method of claim 7, wherein And a portion of the diode formation region protrudes 10 to 100 nm toward one side of the active region. Claim 9 was abandoned upon payment of a set-up fee. The method of claim 6, Claim 10 was abandoned upon payment of a setup registration fee. The method of claim 9, And a portion of the diode formation region protrudes from 10 to 50 nm on both sides of the active region, respectively. Claim 11 was abandoned upon payment of a setup registration fee. The method of claim 6, An impurity region formed in the surface of the active region; Phase change memory device further comprises. Claim 12 was abandoned upon payment of a registration fee. The method of claim 6, And the diode is a vertical PN diode. Claim 13 was abandoned upon payment of a registration fee. The method of claim 6, And the phase change memory cell has a structure including a phase change film. Defining an active region extending in one direction in the semiconductor substrate and spaced apart from each other in a direction perpendicular to the one direction, the diode forming region having a wider width than the remaining portion; Forming a diode on the diode forming region of the active region; Forming a phase change memory cell on the diode; And Forming a bit line on the phase change memory cell; Method of manufacturing a phase change memory device comprising a. Claim 15 was abandoned upon payment of a registration fee. The method of claim 14, And wherein the active region is defined such that a portion of the diode forming region protrudes to one side of the active region. Claim 16 was abandoned upon payment of a setup registration fee. The method of claim 15, And a portion of the diode formation region protrudes 10 to 100 nm toward one side of the active region. Claim 17 has been abandoned due to the setting registration fee. The method of claim 14, And wherein the active region is defined such that portions of the diode forming region protrude to both sides of the active region. Claim 18 was abandoned upon payment of a set-up fee. The method of claim 17, Claim 19 was abandoned upon payment of a registration fee. The method of claim 14, After defining the active region and before forming the diode, Forming an impurity region within the surface of the active region; The method of manufacturing a phase change memory device, characterized in that it further comprises. Claim 20 was abandoned upon payment of a registration fee. The method of claim 14, And the diode is formed of a vertical PN diode. Claim 21 has been abandoned due to the setting registration fee. The method of claim 14, And the phase change memory cell is formed to include a phase change film.

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