KR101051174B1 - Exposure mask and method of forming semiconductor device using same - Google Patents

Abstract

The exposure mask of the present invention includes a first light shielding pattern including a first pad pattern having a v-shaped transparent pattern and a first line pattern spaced apart from both sides of the first pad pattern and having a first diagonal transparent pattern. And a second pad pattern provided with a hat shade transparent pattern, and a second line pattern spaced apart from both sides of the second pad pattern and provided with a second diagonal transparent pattern, and spaced apart from the first light shielding pattern. The second light shielding pattern may be repeatedly arranged.

In the method of forming a semiconductor device of the present invention, a photoresist pattern is formed on the semiconductor substrate on which an etched layer is formed by using the above-described exposure mask, and the photoresist pattern is etched using an etch mask to etch the etched layer. By using an exposure mask in which the patterns are repeatedly implemented, it is possible to prevent the bridges between adjacent patterns from being bridged, thereby improving the yield of the semiconductor device.

Auxiliary pattern, bridge prevention

Description

Exposure mask and method for forming semiconductor device using the same

The present invention relates to an exposure mask and a method of forming a semiconductor device using the same, and more particularly, to an exposure mask having an auxiliary pattern and a method of forming a semiconductor device using the same.

The semiconductor device is generally formed on a semiconductor substrate through a photo lithography process. A typical process is to uniformly apply a photoresist film onto a semiconductor substrate, and then perform exposure and development processes using an exposure mask having a layout formed thereon. A photoresist pattern is formed, and the lower etching layer is etched using an etching mask to form a specific pattern.

At this time, the step of exposing the photosensitive film using an exposure mask has become an important process as the semiconductor elements are increasingly integrated. That is, it is a process that can greatly influence whether the micropattern can be implemented on the semiconductor substrate as implemented in the exposure mask.

As the number of cells to be formed in a limited area increases, the line width of the pattern decreases, so that the interval between neighboring patterns is narrowed, thereby distorting the light transmitted through the mask due to the optical proximity effect caused by the neighboring patterns. This is to prevent exposure to the wafer according to the layout implemented in the exposure mask. Accordingly, even when the neighboring patterns are separated, the neighboring patterns may be patterned to be connected.

As described above, techniques for compensating for the optical proximity effect distort adjacent patterns have been developed, such as optical proximity correction (OPC) or optical contrast that compensates for diffraction problems of light using patterns. Various methods have been sought to minimize the distortion of light due to the pattern drawn on the mask, such as a phase shifting mask technique that improves the resolution by improving the resolution. In addition, by using a chemically amplified resist having excellent photosensitivity to light of far ultraviolet wavelength (248 nm or 194 nm wavelength), the resolution can be increased, and an auxiliary pattern (a kind of dummy pattern) that controls the optical proximity effect in a form separate from the pattern Various techniques have been developed, including

FIG. 1A is a plan view illustrating a layout of an exposure mask according to the prior art, FIG. 1B is an electron scanning micrograph showing a semiconductor device formed using the exposure mask shown in FIG. 1A, and FIG. 1C is an exposure mask 10 of FIG. 1A. It is a simulated image exposed at% under dose energy.

As shown in FIG. 1A, exposure using an exposure mask having a line pattern and a pad pattern is implemented on a wafer as shown in FIG. 1B. In this case, the electron scanning micrograph shown in FIG. 1B is an image implemented under an optimal condition, that is, a condition having the best focus, the best exposure energy, and the like. However, due to fluctuations in process variables, it is not possible to pattern optimally in every process. Therefore, in FIG. 1B, although the bridge does not occur, an area such as 'A', that is, a line area adjacent to the pad or a line pattern adjacent to the increased line pattern and the line area adjacent to the pad have a weak part to the bridge, and thus the exposure is performed with the under dose energy. As shown in 1c, there is an inevitable problem in the occurrence of the bridge.

The present invention is to solve the problem that the adjacent patterns are bridged when the exposure process using an exposure mask that is repeatedly implemented at a small interval with a small interval, especially when exposed to an eccentric condition rather than the optimal condition.

The exposure mask of the present invention includes a first pad pattern including a v-shaped transparent pattern, and a first light shield including a first line pattern spaced apart from both sides of the first pad pattern and provided with a first diagonal transparent pattern. A second pad pattern including a pattern and a hat-shaped transparent pattern, and a second line pattern spaced apart from both sides of the second pad pattern, and provided with a second diagonal transparent pattern. A second light shielding pattern spaced apart may be repeatedly arranged.

In this case, the second light shielding pattern may be symmetrically moved 180 degrees about the y-axis.

The first pad pattern and the second pad pattern may be rectangular.

The first line pattern may be symmetrical about the y-axis center of the first pad pattern.

In addition, the first line pattern is characterized in that the region adjacent to the first pad pattern has a narrow width, the region adjacent to each other the first line pattern has a wide width.

The first diagonal transparent pattern may be provided in the first line pattern having the wide width.

The method of forming a semiconductor device of the present invention includes forming a photoresist pattern on the semiconductor substrate on which an etched layer is formed by using the exposure mask of claim 1 and etching the etched layer by using the photoresist pattern as an etch mask. It features.

In this case, the forming of the photoresist layer pattern may include applying a photoresist layer on the etched layer and performing exposure and development on the photoresist using the exposure mask.

In the performing of the exposure, the cross-pole illumination system may be used.

The present invention provides an effect of improving yield of a semiconductor device by preventing bridges between adjacent patterns from being bridged by using an exposure mask in which adjacent patterns are repeatedly implemented at small intervals.

Hereinafter, with reference to the accompanying drawings an embodiment of the present invention will be described in detail.

FIG. 2A is a plan view illustrating an exposure mask layout according to the present invention, FIG. 2B is a plan view illustrating a unit square of the exposure mask layout of FIG. 2A, and FIG. 2C is a 10% under dose energy of the exposure mask of FIG. 2A. It is a simulation image exposed by.

The exposure mask of FIG. 2A is a light shielding pattern including pad shades 110 and 110 'and a diagonal transparent pattern 116 and 116' provided with a hat-shaped transparent pattern 114 and a v-shaped transparent pattern 114 'on the transparent substrate 100. And line patterns 112 and 112 'which are light blocking patterns. In this case, the pad pattern 110 includes a hat-shaped transparent pattern 114, and the pad pattern 110 ′ includes a v-shaped transparent pattern 114 ′. In addition, the line pattern 112 includes a diagonal transparent pattern 116 and the line pattern 112 'includes a diagonal transparent pattern 116'. The line patterns 112 and 112 ′ may have a narrow width or a wide width depending on the position of the pad pattern 110. That is, the line patterns 112 and 112 ′ are formed in a narrow pattern in the region adjacent to the pad patterns 110 and 110 ′, and have a wide pattern in a region not adjacent to the pad patterns 110 and 110 ′. The diagonal transparent patterns 116 and 116 'are preferably provided in the line patterns 112 and 112' having a wide width. An exposure mask having the above-described layout will be described in more detail with reference to FIG. 2B.

Here, the shaded transparent pattern 114 and the v-shaped transparent pattern 114 ′ increase the exposure latitude so that the pad patterns 110 and 110 ′ are not bridged with the neighboring line patterns 112 and 112 ′. Will be Therefore, since the range of exposure energy for easy patterning increases, patterning can be easily performed even under exposure. That is, when an exposure source passing through a narrow gap between the pad patterns 110 and 110 'and the adjacent line patterns 112 and 112' reaches the semiconductor substrate, the pad patterns 110 and 110 are caused by the optical proximity effect by the neighboring patterns. ') And the line pattern (112, 112') is not exposed by the interval can be prevented from being bridged. In other words, when a low exposure energy exposure source passes through the exposure mask, it is not only a narrow gap between the pad patterns 110 and 110 'and the adjacent line patterns 112 and 112', but also the shaded transparent patterns 114 and v. Since the light passes through the transparent pattern 114 ′, the exposure margin may be increased by minimizing the optical proximity effect of the neighboring patterns. In this case, the hat shaped transparent pattern 114 and the v-shaped transparent pattern 114 ′ formed on the pad patterns 110 and 110 ′ are not formed on the semiconductor substrate.

The diagonal transparent patterns 116 and 116 'increase the exposure margin so as not to bridge with neighboring line patterns 112 and 112' like the shaded transparent patterns 114 and the v-shaped transparent patterns 114 'described above. Do it. In this case, since the range of exposure energy, which is easy to pattern, increases, the patterning may be easily performed even under exposure. That is, when an exposure source passing through a narrow gap passing through the gap with the line patterns 112 and 112 'reaches the semiconductor substrate by being formed in the line patterns 112 and 112' having a wide width, optical proximity by neighboring patterns By the effect, the problem of not being exposed by the interval between the line patterns 112 and 112 'can be solved, thereby preventing the bridge. In other words, even if the exposure source of low exposure energy passes through the exposure mask, the neighboring patterns pass through the diagonal transparent patterns 116 and 116 'instead of passing through a narrow gap with the adjacent line patterns 112 and 112'. The exposure margin can be increased by minimizing the optical proximity effect. In this case, the diagonal transparent patterns 116 and 116 'formed on the pad patterns 110 and 110' are not formed on the semiconductor substrate.

In the above-described exposure mask, a predetermined area is first designed and then symmetrically or rotationally arranged to have a layout in which pad patterns and line patterns are repeatedly arranged. In this case, it is a general design method to design the predetermined area first and then arrange it by symmetry or rotational movement to form an exposure mask. In the present invention, the above-mentioned predetermined area is referred to as unit square for convenience.

FIG. 2B is a plan view illustrating the unit square described above and exemplarily illustrates 'A1' as an example. The unit square 'A1' includes a pad pattern 120a having a diagonal transparent pattern 126a, a line pattern 122a, and a line pattern 124a having a diagonal transparent pattern 128a. At this time, the pad pattern 120a is symmetrically moved or rotated to form the pad patterns 110 and 110 ′ shown in FIG. 2A. In addition, the diagonal transparent pattern 126a provided in the pad pattern 120a may be symmetrically moved or rotated so as to have a hat-shaped transparent pattern 114 and a v-shaped transparent pattern on the pad patterns 110 and 110 ′ shown in FIG. 2A. 114 ').

In addition, the diagonal transparent pattern 126a provided in the pad pattern 120a and the diagonal transparent pattern 128a provided in the line pattern 124a preferably have an inclination angle that is symmetric about the y axis. This is because the exposure margin can be maximized by preventing the diagonal transparent patterns 126a and 128a from being arranged only in one direction.

Looking more specifically at the symmetry movement and rotation movement of the unit square can be expressed as follows. If 'A1' is rotated 180 ° around the x-axis, it becomes 'B1'; if 'B1' is flipped about the y-axis, it becomes 'C1'; if 'C1' is rotated 180 ° about the x-axis, D1 '. Finally, 'A1' and 'D1' are symmetric about the y axis. Accordingly, the line pattern 122a of A1 is symmetrically moved and rotated to extend with the line pattern 124a to form a line pattern 112 ′ adjacent to the pad pattern 110 of FIG. 2A. Similarly, the line pattern 124a extends with the line pattern 122a to form a line pattern. This method is repeated to form an exposure mask as shown in FIG. 2A.

The reason why the transparent patterns 124a and 128a are provided in a diagonal shape is that as the illumination system used due to the high integration of semiconductor devices is changed from a dipole to a cross pole, a pad pattern and a cross-pole illumination system are used. This is to ensure that the line pattern is formed accurately. Since the cross-pole illumination system is an illumination system that combines an x-axis dipole illumination system and a y-axis dipole illumination system, a pattern having a long axis in the y-axis direction is easily formed by the x-axis dipole illumination system, and a pattern having a long axis in the x-axis direction by the y-axis dipole illumination system. By using this easily formed point is to pass through the diagonal pattern to increase the exposure margin to be patterned.

2C is a simulation result of exposing an exposure mask with 10% under dose energy according to an embodiment of the present invention. In general, when exposed to the energy of the under dose patterned than the normal exposure energy is exposed to a lower exposure energy may cause a problem that the line and space pattern is not accurately exposed and bridged adjacent line patterns. In particular, when the spacing between neighboring patterns becomes narrow as the pattern becomes finer, bridges of the patterns are inevitable when exposed with low exposure energy. However, as shown in FIG. 2A, the transparent pattern is formed on the line pattern and the pad pattern so that the exposure is not only exposed at the interval between the line pattern and the pad pattern but also the transparent pattern formed on the line pattern and the pad pattern, thereby increasing the exposure margin. The bridge of the pattern can be prevented.

In the method of forming the semiconductor device using the exposure mask 2a described above, after the photosensitive film is applied to the semiconductor substrate on which the etched layer is formed, the photosensitive film pattern is formed by performing an exposure and development process using the exposure mask shown in FIG. 2A and etching the same. The etched layer is etched and patterned with a mask. At this time, since the oblique transparent pattern provided in the mask of the present invention serves to prevent bridges with neighboring patterns in the cross-pole illumination system, the exposure system used in the method of forming the semiconductor device of the present invention is It is preferable to be a cross pole.

The above-described exposure mask and the method of forming the semiconductor device using the same may increase the exposure margin by effectively providing the pad pattern and the line pattern, thereby effectively reducing the phenomenon of bridging with neighboring patterns. In particular, it is possible to prevent the neighboring patterns from being bridged even when exposed to under dose energy instead of being exposed to optimal energy due to variation in process variables.

1A is a plan view showing the layout of an exposure mask according to the prior art;

FIG. 1B is an electron scanning micrograph showing a semiconductor device formed using the exposure mask shown in FIG. 1A.

FIG. 1C is a simulated image of the exposure mask of FIG. 1A exposed at 10% under dose energy. FIG.

Figure 2a is a plan view showing an exposure mask layout according to the present invention.

FIG. 2B is a plan view illustrating a unit square of the exposure mask layout of FIG. 2A; FIG.

FIG. 2C is a simulated image of the exposure mask of FIG. 2A exposed at 10% under dose energy. FIG.

Claims (9)

a first pad pattern having a v-shaped transparent pattern, A first light blocking pattern spaced apart from both sides of the first pad pattern and including a first line pattern provided with a first diagonal transparent pattern; A second pad pattern having a hat-shaped transparent pattern, And a second line pattern spaced apart from both sides of the second pad pattern and provided with a second diagonal transparent pattern, wherein the second light shielding pattern spaced apart from the first light shielding pattern is repeatedly arranged. Mask. Claim 2 has been abandoned due to the setting registration fee. The method of claim 1, The second light blocking pattern An exposure mask, characterized in that the first light-shielding pattern is symmetrically moved 180 degrees around the y-axis. Claim 3 was abandoned when the setup registration fee was paid. The method of claim 1, The first pad pattern and the second pad pattern An exposure mask, characterized in that the rectangle. Claim 4 was abandoned when the registration fee was paid. The method of claim 1, The exposure mask, characterized in that the symmetry around the center of the y-axis of the first pad pattern. Claim 5 was abandoned upon payment of a set-up fee. The method of claim 1, The first line pattern is Has a first width in the region adjacent to the first pad pattern, And a second width wider than the first width in areas where the first line pattern is adjacent to each other. Claim 6 was abandoned when the registration fee was paid. The method of claim 5, The first diagonal transparent pattern is An exposure mask, characterized in that provided in the first line pattern having the second width. Forming a photoresist pattern on the semiconductor substrate on which the etched layer is formed using the exposure mask of claim 1; And And etching the etched layer by using the photoresist pattern as an etch mask. Claim 8 was abandoned when the registration fee was paid. Forming the photoresist pattern Applying a photoresist film on the etched layer; And And exposing and developing the photosensitive film using the exposure mask. Claim 9 was abandoned upon payment of a set-up fee. The method of claim 8, Performing the exposure A method of forming a semiconductor device, comprising using a crosspole illumination system.

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