KR101033980B1 - Fuse structure for high integrated semiconductor device - Google Patents
Fuse structure for high integrated semiconductor device Download PDFInfo
- Publication number
- KR101033980B1 KR101033980B1 KR20090056410A KR20090056410A KR101033980B1 KR 101033980 B1 KR101033980 B1 KR 101033980B1 KR 20090056410 A KR20090056410 A KR 20090056410A KR 20090056410 A KR20090056410 A KR 20090056410A KR 101033980 B1 KR101033980 B1 KR 101033980B1
- Authority
- KR
- South Korea
- Prior art keywords
- metal layer
- region
- fuse
- abandoned
- registration fee
- Prior art date
Links
Images
Abstract
The present invention provides a semiconductor device that can increase the reliability of operation by preventing thermal degradation and corrosion that may occur during the blowing process of the fuse without increasing the area occupied by the fuse. The semiconductor device according to the present invention includes a fuse including a blowing region and first and second regions connected to two different voltage terminals, wherein the first region is composed of two or more different metal layers and one in the second region. It is characterized by consisting of a metal layer.
Semiconductors, Fuses, Thermal Degradation, Copper
Description
BACKGROUND OF THE
In general, a fuse is defined as a type of circuit breaker that is used to prevent overcurrent from flowing in a line. In other words, the fuse melts itself by the heat generated by the electric current, which can be easily seen in the surrounding life. Fuses keep current flowing under normal conditions, but if they are blown, they permanently block the flow of current until it is replaced with a new one, which is different from a switch that can control the blocking or connection of current flow. have.
The semiconductor device is designed to operate according to a predetermined purpose by injecting impurities into a predetermined region of a silicon wafer or depositing a new material. A representative example is a semiconductor memory device. The semiconductor memory device includes many elements such as transistors, capacitors, and resistors to perform a predetermined purpose, and a fuse is one of them. Fuses are used in various places in semiconductor memory devices, and representative examples thereof include redundancy circuits and power supply circuits. Fuses used in these circuits remain normal during the manufacturing process, but are selectively blown (ie, blown) through various tests after manufacture.
The redundancy circuit will be described in more detail. When a specific unit cell is defective in the semiconductor memory device, a recovery step is performed to replace the spare unit with an extra normal cell. That is, when an address for accessing a defective unit cell is input from the outside, the recovery step stores the address of the defective unit cell so that the redundant normal cell can be accessed instead of the defective unit cell. Prevent access. The most commonly used fuse in this recovery phase is a laser blown through the corresponding fuse in the semiconductor device to blow the fuse and permanently break the place where the electrical connection was maintained. This operation is called fuse blowing.
The semiconductor memory device includes a plurality of unit cells, and no one knows where a defective unit cell exists among the plurality of unit cells after the manufacturing process. Accordingly, in the semiconductor memory device, a fuse box including a plurality of fuses may be provided to replace a normal spare unit cell even if a defect occurs in any of the unit cells.
The data storage capability of the semiconductor memory device is increasing. As a result, the number of unit cells included therein increases, and the number of fuses used to replace a spare unit cell when a defect occurs also increases. On the other hand, the total area of the semiconductor memory device is reduced and high integration is required. As described above, since some of the plurality of fuses selectively blow a laser to physically blow, a predetermined distance between the fuses should be maintained in order not to affect neighboring fuses that are not blown. However, this becomes a factor of lowering the degree of integration of the semiconductor memory device. Therefore, there is a need for a technology that reduces the area occupied by the fuse box and does not cause defects in other fuses even if the fuse is selectively blown.
1 is a block diagram illustrating a fuse in a conventional semiconductor device.
As illustrated, the
In brief, a manufacturing method may be performed by etching the
Referring to FIG. 1, it can be seen that the
In order to prevent the above-mentioned disadvantages such as thermal degradation, fuses are manufactured using aluminum or tungsten-based metals having relatively lower thermal conductivity than copper. Due to the high power loss may occur due to processing speed delay or leakage current. In order to overcome this problem, the size of a fuse or a wiring must be increased, resulting in a high integration of semiconductor devices. However, in the case of forming the fuse using copper as described above, since the formation of the fuse is difficult due to the characteristic properties of the copper, a new fuse suitable for a highly integrated semiconductor memory device is required.
In order to solve the above-described problems, the present invention is to reduce the thickness of the conductive material constituting the fuse when forming the fuse in the semiconductor device to reduce the mobility of the conductive material in the blowing process, the semiconductor device that occurs after the blowing process It provides technology that can prevent malfunction and increase the reliability of operation.
The present invention includes a fuse including a blowing region and first and second regions connected to two different voltage terminals, wherein the first region includes two or more different metal layers, and the second region includes one metal layer. A semiconductor device is provided.
Preferably, the second region is characterized in that it comprises copper (Cu).
Preferably, the first region includes at least one metal layer of a copper (Cu) layer, a tungsten (W) layer, and an aluminum (Al) layer.
The method may further include a plurality of contacts for connecting the two different voltage terminals with the first region and the second region, respectively.
Preferably, the ground voltage is connected to the second region, and the power supply voltage is connected to the first region.
Preferably, the first region comprises a first metal layer formed of a first metal material; And a second metal layer formed on the first metal layer, wherein a thickness of a portion of the region in the first metal layer positioned below the second metal layer is thinner than the second region.
Preferably, the blowing area occupies about 20% of the total length of the fuse in plan view, and the second metal layer occupies about 30 to 35% of the total length of the fuse in plan view.
Preferably, the second metal layer is formed in one or more patterns, the size of the pattern is characterized in that determined by the number of patterns.
Preferably, the pattern is characterized in that one of the concavo (concavo) form, columnar form and cylinder form.
Preferably, further comprising a nitride film for protecting the upper portion of the first metal layer and the upper portion of the second region.
Preferably, the first region comprises a first metal layer formed of a first metal material; And a second metal layer formed through the first metal layer, wherein the first metal layer is removed below the second metal layer.
The method may further include a contact for connecting one of the two different voltage terminals to the first region, wherein the second metal layer is formed by invading a portion of the contact region.
Preferably, one of the two different voltage terminals and the second metal layer are directly connected without a contact for connecting the first region.
Preferably, the first region occupies about 40% of the total length of the fuse.
Preferably, the second metal layer is formed of a laminated structure of tungsten and aluminum, characterized in that occupies about 30 to 35% of the total length of the fuse on the plane.
According to the present invention, when a fuse included in a highly integrated semiconductor device is formed of copper (Cu), an error that may occur after a blowing process may be eliminated due to the physical properties of copper, thereby securing reliability of operation. have.
Furthermore, the present invention can prevent the thermal deterioration or the movement of residues while blowing the fuse while forming a fuse using copper, so that the fuse can have a low resistance value can prevent power loss due to processing speed delay or leakage current, etc. have.
The present invention, despite the use of copper to form a fuse in order to prevent the power loss caused by the processing speed delay or leakage current due to the increased resistance as the fuse size is reduced as the integration of the semiconductor device increases In the blowing process of a specific fuse, the present invention proposes a structure that can stably blow and prevent thermal deterioration of neighboring fuses due to residues.
In the case of a semiconductor device according to an embodiment of the present invention in which a fuse is formed using copper (Cu), there are several methods for overcoming a disadvantage that may occur due to physical properties of copper. First, there is a method of reducing the potential difference between both ends of the fuse during the blowing process. When the power supply voltage VDD and the ground voltage VSS are applied to both ends of the fuse, a potential difference between the two voltages causes pieces of copper (Cu), which are residues of the fuse, to be easily moved by an electric field. Therefore, if the potential difference is reduced by applying the ground voltage VSS across the fuse, it is possible to prevent the residues of the fuse from being moved by the electric field. Second, there is a nitride film formed after the dama cleaning is performed on the fuse formed of copper (Cu), to strengthen the contact force by changing the interface characteristics between the copper (Cu) and the nitride film (nitride) In this case, even if the fuse is blown, it is possible to prevent the copper (Cu) material remaining in the remaining area except the blowing area. Finally, there is a method of reducing the amount of copper (Cu) to form a fuse to significantly reduce the amount of residue that can move according to the electrical or chemical environment after blowing. In this case, it is important to reduce the amount of copper (Cu) constituting the fuse and not to increase the resistance value of the fuse. Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
2A and 2B are cross-sectional views and a plan view illustrating a fuse in a semiconductor device according to an embodiment of the present invention.
Referring to FIG. 2A,
The
Referring to FIG. 2A, the
2B, the blown
3A and 3B are cross-sectional views and a plan view illustrating a pair of fuses in a semiconductor device according to another embodiment of the present invention.
Referring to FIG. 3A,
Referring to FIG. 3B, the blown
4A and 4B are cross-sectional views and a plan view illustrating a pair of fuses in a semiconductor device according to still another embodiment of the present invention.
Referring to FIG. 4A,
Since the
Referring to FIG. 4B, a
In FIG. 4A, the
As described above, the semiconductor device according to the embodiment of the present invention includes a fuse including a blowing region and first and second regions connected to two different voltage terminals, one of the first and second regions being two The above is composed of different metal layers and the other is composed of one metal layer. In particular, when the fuse in the semiconductor device according to the embodiment of the present invention is applied to the case where both the first region and the second region include copper (Cu), the disadvantages due to the physical properties of the copper can be overcome.
The semiconductor device according to the embodiment of the present invention forms another metal layer relatively free from thermal deterioration in a non-blowing region in a fuse formed by using a metal material such as copper, thereby preventing from moving or thermal deterioration of residues generated after the blowing process. It can protect other components. As a result, not only the phenomenon in which the fuse is not blown completely, but also the power loss due to the processing speed delay or leakage current of the semiconductor device can be prevented and the operation reliability can be improved.
It will be apparent to those skilled in the art that various modifications, additions, and substitutions are possible, and that various modifications, additions and substitutions are possible, within the spirit and scope of the appended claims. As shown in Fig.
1 is a block diagram illustrating a fuse in a conventional semiconductor device.
2A and 2B are cross-sectional views and plan views illustrating a fuse in a semiconductor device according to an embodiment of the present invention.
3A and 3B are a cross-sectional view and a plan view for describing a pair of fuses in a semiconductor device according to another embodiment of the present invention.
4A and 4B are cross-sectional and plan views illustrating a pair of fuses in a semiconductor device according to still another embodiment of the present invention.
Claims (15)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR20090056410A KR101033980B1 (en) | 2009-06-24 | 2009-06-24 | Fuse structure for high integrated semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR20090056410A KR101033980B1 (en) | 2009-06-24 | 2009-06-24 | Fuse structure for high integrated semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20100138056A KR20100138056A (en) | 2010-12-31 |
KR101033980B1 true KR101033980B1 (en) | 2011-05-11 |
Family
ID=43511577
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR20090056410A KR101033980B1 (en) | 2009-06-24 | 2009-06-24 | Fuse structure for high integrated semiconductor device |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR101033980B1 (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20050101025A (en) * | 2004-04-16 | 2005-10-20 | 주식회사 하이닉스반도체 | Method of forming a fuse pattern in a semiconductor device |
KR20070076282A (en) * | 2006-01-18 | 2007-07-24 | 삼성전자주식회사 | Semiconductor devices including metal fuse, metal fuse and manufacturing method of the same |
KR20070097764A (en) * | 2006-03-29 | 2007-10-05 | 삼성전자주식회사 | Method of forming a fuse structure for a semiconductor device |
-
2009
- 2009-06-24 KR KR20090056410A patent/KR101033980B1/en not_active IP Right Cessation
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20050101025A (en) * | 2004-04-16 | 2005-10-20 | 주식회사 하이닉스반도체 | Method of forming a fuse pattern in a semiconductor device |
KR20070076282A (en) * | 2006-01-18 | 2007-07-24 | 삼성전자주식회사 | Semiconductor devices including metal fuse, metal fuse and manufacturing method of the same |
KR20070097764A (en) * | 2006-03-29 | 2007-10-05 | 삼성전자주식회사 | Method of forming a fuse structure for a semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
KR20100138056A (en) | 2010-12-31 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7732892B2 (en) | Fuse structures and integrated circuit devices | |
KR101151302B1 (en) | Fuse structure of integrated circuit devices | |
US20090243032A1 (en) | Electrical fuse structure | |
US6235557B1 (en) | Programmable fuse and method therefor | |
US20080211059A1 (en) | Electronic fuse having heat spreading structure | |
KR101119805B1 (en) | Fuse structure and fabrication method thereof | |
US7176551B2 (en) | Fuse structure for a semiconductor device | |
US7190044B1 (en) | Fuse structure for a semiconductor device | |
KR101033980B1 (en) | Fuse structure for high integrated semiconductor device | |
KR101119161B1 (en) | Fuse structure for high integrated semiconductor device | |
KR101129860B1 (en) | Fuse structure for high integrated semiconductor device | |
KR101043865B1 (en) | Fuse structure for high integrated semiconductor device | |
KR101095054B1 (en) | Fuse structure for high integrated semiconductor device | |
KR101051176B1 (en) | Fuse Structures for Highly Integrated Semiconductor Devices | |
CN113394195B (en) | Semiconductor structure, forming method thereof and fuse array | |
KR20110011063A (en) | Fuse structure for high integrated semiconductor device | |
KR101087796B1 (en) | Fuse of semiconductor device | |
KR20100138058A (en) | Fuse structure for high integrated semiconductor device | |
CN113451263A (en) | Electric fuse structure and forming method thereof | |
KR101087799B1 (en) | Fuse of semiconductor device and method thereof | |
KR20110001694A (en) | Fuse of semiconductor device | |
KR101060714B1 (en) | Fuses in semiconductor devices and methods of forming them | |
KR20110001787A (en) | Fuse of semiconductor device and method thereof | |
KR20110000317A (en) | Fuse of semiconductor device | |
KR20110003678A (en) | Fuse of semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration | ||
GRNT | Written decision to grant | ||
LAPS | Lapse due to unpaid annual fee |