KR101015955B1 - Semiconductor manufacturing equipment and method of controling the same - Google Patents

Abstract

According to the semiconductor manufacturing equipment and the control method thereof, when the process recipes of the preceding wafer first introduced into the process processing unit and the subsequent wafer waiting to be input to the process processing unit are different from each other, the respective process recipes are based on the process recipes of the preceding wafer and the subsequent wafer, respectively. The skip cycle is set by comparing the process step and the path, and the operation of the transfer unit is controlled to inject the trailing wafer into the process processing unit after the skip cycle has elapsed. Therefore, the input time interval between the trailing wafer and the preceding wafer can be properly maintained, and as a result, the trailing wafer can be prevented from waiting in the processing unit.

Description

Semiconductor manufacturing equipment and its control method {SEMICONDUCTOR MANUFACTURING EQUIPMENT AND METHOD OF CONTROLING THE SAME}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing facility and a control method thereof, and more particularly, to a semiconductor manufacturing facility and a control method thereof, which can reduce the time for which a wafer stays in a processing unit.

In general, a photo-lithigraphy process, which is a core process of semiconductor manufacturing, consists of a photoresist coating, a bake and a developing process of a wafer. The spinner system of the semiconductor manufacturing equipment for performing such a process is comprised of the accommodating part which accommodates a wafer, the transfer unit which conveys the received wafer, and the process process part which processes a wafer.

The processing unit includes a spin coater for applying a photoresist to the surface of the wafer, a spin developer for developing the exposed wafer, a heating plate and cooling to heat and cool the wafer before and after application or development of the photoresist. A number of processing units, such as a baker with a plate.

The semiconductor manufacturing equipment processes the wafer based on the process recipe in which the process step is set. However, when the process recipes of the wafers are different from each other, the following wafers may be waited in the processing unit for a long time due to a delay in performing the process of the preceding wafer first put into the processing unit or a failure of the processing unit processing the preceding wafer. do.

However, when the time for which the trailing wafer waits in the processing unit becomes long, there occurs a problem that the film deposited on the trailing wafer is damaged or deformed due to the temperature or the like in the processing unit.

Accordingly, it is an object of the present invention to provide a semiconductor manufacturing facility capable of reducing the time for which a wafer stays in a processing unit.

It is another object of the present invention to provide a control method applied to a semiconductor manufacturing facility that can reduce the time for which a wafer stagnates in a processing unit.

A semiconductor manufacturing apparatus according to the present invention includes an accommodating portion in which a plurality of wafers are accommodated; A process processing unit comprising a plurality of processing units and sequentially receiving the wafers and processing the wafers based on a process recipe of each wafer; A transfer unit for sequentially transferring the wafers accommodated in the accommodating part to the process processor and transferring the wafers processed by the process processor to the accommodating part; And if the process recipe of the preceding wafer introduced into the process processing unit and the process recipe of the subsequent wafer waiting to be introduced into the process processing unit are different, an appropriate skip cycle based on the process sequence and the number of processing units used in each process step. And a control unit for controlling the operation of the transfer unit to feed the trailing wafer into the process processor when the skip cycle has elapsed after the preceding wafer is loaded.

In one embodiment of the present invention, the process treatment unit includes a coating module for performing the coating process, a developing module for performing the developing process, and a baking module for performing the baking process, each module consisting of one or more processing units.

In one embodiment of the present invention, the control unit compares the processing steps of the preceding wafer with the processing steps of the following wafer, and if there is the same processing step, the processing unit used by the preceding wafer in the same processing step A comparison processor for outputting a difference value between the number of and the number of processing units used by the subsequent wafer; A skip cycle setting unit configured to reset the skip cycle by adding the difference value and a preset initial skip cycle; And a transfer unit controller configured to determine when the trailing wafer is introduced into the process processor based on the reset skip cycle.

In one embodiment of the present invention, the bake module includes a plurality of bake blocks for performing different bake processes, each bake block comprising one or more processing units, each processing unit having a cooling plate and a heating plate. It is provided.

In one embodiment of the present invention, the comparison processing unit determines the number of wafers that each processing unit included in each baking block can accommodate at the same time, and determines the number of processing units according to the number of wafers. do.

In one embodiment of the present invention, the control unit includes a processing unit detecting unit for detecting whether a wafer exists in each processing unit; And a counter for counting the number of processing units in which the wafer does not exist among processing units existing on the path of the subsequent wafer from the time when the preceding wafer is input based on the detection signal from the processing unit detector. do.

Here, the skip cycle setting unit resets the skip cycle by subtracting the counting value from the sum of the initial skip cycle and the difference value.

According to another aspect of the present invention, a method of controlling a semiconductor manufacturing facility includes: sequentially extracting the wafers from an accommodating part in which a plurality of wafers are accommodated through a transfer unit and providing the same to a process processor; Sequentially processing the plurality of wafers based on a process recipe of each wafer in the process processor; If the process recipe of the preceding wafer introduced into the process processing unit and the process recipe of the subsequent wafer waiting to be introduced into the process processing unit are different, an appropriate skip cycle is performed based on the process sequence and the number of processing units used in each process step. Setting up; And controlling the operation of the transfer unit to feed the trailing wafer into the process processor when the skip cycle has elapsed after the preceding wafer.

In one embodiment of the present invention, the process treatment unit includes a coating module for performing the coating process, a developing module for performing the developing process, and a baking module for performing the baking process, each module consisting of one or more processing units.

The setting of the skip cycle may include comparing the process steps of the preceding wafer and the process steps of the following wafer; Outputting a difference value between the number of processing units used by the preceding wafer and the number of processing units used by the subsequent wafer when the comparison results in the same process step; And resetting the skip cycle by adding the difference value and a predetermined initial skip cycle.

In one embodiment of the present invention, the baking module includes a plurality of baking blocks for performing different baking processes, each baking block is composed of one or more processing units, each processing unit is provided with a cooling plate and a heating plate do.

In one embodiment of the present disclosure, the outputting of the difference value may include determining a number of wafers that each processing unit included in the baking block may simultaneously accommodate; And determining the number of processing units according to the number of wafers.

In one embodiment of the invention, the method of controlling the semiconductor manufacturing equipment is provided in each of the processing units present on the path of the following wafer from the time when the preceding wafer is inserted, to detect whether the wafer is present. step; And counting the number of processing units in which the wafer is not present.

In the setting of the skip cycle, the skip cycle is reset by subtracting the counting value from the sum of the initial skip cycle and the difference value.

According to such a semiconductor manufacturing facility and a control method thereof, a skip cycle is set by comparing respective process steps and paths based on the process recipes of each of the preceding wafer and the following wafer, and the trailing wafer is introduced into the processing unit after the skip cycle has elapsed. Control the operation of the transfer unit.

Therefore, it is possible to appropriately maintain the interval of input time between the trailing wafer and the preceding wafer, and as a result, it is possible to prevent the trailing wafer from waiting in the processing unit or to shorten the waiting time.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a view schematically showing a semiconductor manufacturing apparatus according to an embodiment of the present invention, Figure 2 is a side view of the baking module shown in FIG.

Referring to FIG. 1, the semiconductor manufacturing apparatus 100 performs a photo-lithography process on a semiconductor substrate (hereinafter, referred to as a “wafer”). For example, the semiconductor manufacturing facility 100 may be a spinner facility that collectively processes an application process, a development process, and a baking process. The spinner facility includes an accommodation unit 110, a transfer unit 120, and a process processor 130.

The accommodating part 110 includes a plurality of load ports 110a, 110b, 110c, and 110d. In this embodiment, the housing 110 has four load ports 110a, 110b, 110c, and 110d, but the number of the load ports 110a, 110b, 110c, and 110d is the substrate processing system. It may increase or decrease depending on the process efficiency and the foot print condition of the 100.

Front Open Unified Pods (FOUPs) (not shown) in which wafers are accommodated are mounted in the load ports 110a, 110b, 110c, and 110d. A plurality of slots are formed for accommodating each unwrapped wafer in a state of being horizontally disposed with respect to the ground. Each of the looses houses wafers that have been processed by the process processor 130 or wafers to be processed into the process processor 130.

The transfer unit 120 includes an index robot 121, a buffer unit 122, and a main transfer robot 123.

The index robot 121 is provided between the accommodating part 110 and the buffer part 122, and under the index robot 121, the index robot 121 is uncoiled into the accommodating part 110. The first conveying rail 124 for moving in the direction in which they are arranged is installed. The index robot 121 moves along the first transfer rail 124 and transfers wafers between the buffer unit 122 and the storage unit 110.

The buffer part 122 is provided with a support part 122a on which the wafer transferred from the index robot 121 is seated. The main transfer robot 123 transfers the wafer seated on the support 122a to the process processor 130. Below the main transfer robot 123, the main transfer robot 123 is provided with a second transfer rail 125 for moving in the horizontal and vertical directions.

The process processor 130 may include a coating unit 131, a development unit 132, and a bake unit 133. The coating module 131 applies a photoresist onto a wafer to apply a photoresist film, and the developing module 132 sprays a developer onto the wafer to develop a photoresist film on the wafer. The bake module 133 performs a bake process of heating and cooling the wafer to a predetermined process temperature. The coating module 131 and the developing module 132 are disposed below the main transfer robot 123, and the baking module 133 is disposed above. Although not shown in the drawings, each of the coating module 131 and the developing module 132 may include a plurality of processing units arranged in a multilayer structure.

Referring to FIG. 2, the bake module 133 is divided into a first bake block B1, a second bake block B2, and a third bake block B3. The first to third bake blocks B1, B2, and B3 perform different bake processes. For example, the first baking block B1 performs an advice process of supplying a chemical (hereinafter, referred to as “adhesive”) on the wafer to increase the coating efficiency of the photoresist (PR). The two baking blocks B2 perform the bake process before the coating process, and the third bake block B3 performs the bake process after the coating process.

In addition, each of the baking blocks B1, B2, and B3 may include a plurality of baking units 133-a, 133-b, and 133-c arranged in a multilayer structure. As an embodiment of the present invention in Figure 2 each bake block (B1, B2, B3, B4) has a structure consisting of four baking units.

Each of the baking units 133-a, 133-b, and 133-c includes a cooling plate 10 and a heating plate 20 arranged side by side therein. The cooling plate 10 cools the wafer to a predetermined process temperature, and the heating plate 20 heats the wafer to a predetermined process temperature. Here, the baking units included in the different blocks may cool and heat the wafer to different temperatures.

3 is a block diagram of a control unit that controls the operation of the transfer unit shown in FIG. 1.

Referring to FIG. 3, the semiconductor manufacturing facility 100 further includes a control unit 140 that controls the operation of the transfer unit.

The control unit 140 includes a comparison processor 141, a skip cycle setting unit 142, a processing unit detector 143, a counter 144, and a transfer unit controller 145.

The comparison processing unit 141 compares the process recipe R1 of the preceding wafer and the process recipe R2 of the subsequent wafer, and when the two process recipes are different from each other, compares the process steps of the preceding wafer and the process steps of the subsequent wafer. do. When the comparison results in the same process step, the difference value DIF between the number of processing units used by the preceding wafer and the number of processing units used by the subsequent wafer is output in the same process step.

Meanwhile, when the same process step is a bake process step, the comparison processor 141 may simultaneously accommodate each of the bake units included in each bake block B1, B2, B3, and the like. Determine the number of first. Specifically, as shown in FIG. 2, each bake unit has cooling and heating plates 10, 20. Here, when each of the cooling and heating plates 10 and 20 may be provided with wafers, each of the baking units may accommodate two wafers. However, only one wafer can be accommodated in the bake unit which processes the baking process using only the cooling plate 10.

If it is determined that each bake unit is a unit that accommodates two wafers, the comparison processing unit 141 counts the bake unit into two processing units. However, when it is determined that each bake unit is a unit that accommodates one wafer, the comparison processing unit 141 counts the bake unit as one processing unit.

When the difference value DIF of the number of processing units is set in the same process step between the preceding and subsequent wafers, the difference unit DIF is provided to the skip unit setting unit 142.

The skip cycle setting unit 142 receives the difference value DIF and resets the skip cycle SKC2 by adding the difference value to a preset initial skip cycle SKC1. As a result, when the number of processing units used by each of the preceding wafer and the following wafer in the same process step is different, the reset skip cycle SKC2 is increased than the initial skip cycle SKC1.

Meanwhile, the processing unit detector 143 detects the states of the processing units existing on the path of the subsequent wafer from the time when the preceding wafer is inserted. In particular, the processing unit detector 143 detects whether a wafer exists in each processing unit, and transmits a detection result to the counter 144 as a detection signal SEN.

The counter 144 counts the number of processing units in which the wafer does not exist based on the detection signal SEN. The counted value CNT is provided to the skip cycle setting unit 142.

The skip cycle setting unit 142 resets the skip cycle SKC2 by subtracting the counting value CNT from the sum of the initial skip cycle SKC1 and the difference value DIF. As a result, the skip cycle SKC2 may decrease according to the number of processing units in which the wafer does not exist.

The transfer unit controller 145 outputs a control signal CON for controlling the operation of the transfer unit 120 (shown in FIG. 1) based on the skip cycle. As a result, the transfer unit controller 145 is configured to input the trailing wafer to the process processor 130 when the preceding wafer is inserted and the time corresponding to the skip cycle SKC2 determined through the above process elapses. The transfer unit 120 is operated.

As such, the skip cycle defined by the input time interval of the preceding wafer and the subsequent wafer may include the number of processing units used in the process steps of the preceding wafer and the subsequent wafer, the number of wafers that can be accommodated in the baking unit, or The number is set in consideration of the number of processing units in which no wafer exists.

Therefore, the input time interval of the preceding wafer and the trailing wafer is appropriately adjusted to prevent the trailing wafer from waiting for a long time in the processing unit, thereby preventing the film formed on the trailing wafer from being damaged or deformed. can do.

4 is a flowchart illustrating the operation of the control unit shown in FIG. 3. However, in FIG. 4, the process recipe of the preceding wafer and the process recipe of the subsequent wafer will be limited to different cases.

Referring to FIG. 4, when the process recipe of the preceding wafer is different from the process recipe of the subsequent wafer, the process steps of the preceding wafer and the process steps of the following wafer are compared. As a result of the comparison, when there is the same process step, the difference value DIF between the number of processing units used by the preceding wafer and the number of processing units used by the subsequent wafer is output in the same process step (S210).

In the process of determining the number of processing units, the number of wafers that can be accommodated simultaneously by each baking unit included in the baking block is determined (S220). The number of processing units may be determined according to the number of wafers. Specifically, since the processing unit accommodating two wafers is counted as two processing units, the difference value DIF may be increased by one. However, since the processing unit accommodating only one wafer is counted as one processing unit, the difference value DIF may not change (S230).

In addition, it is provided in each of the processing units existing on the path of the following wafer from the time when the preceding wafer is inserted, and detects whether or not the wafer exists (S240).

Next, the number of processing units (CNT) in which the wafer does not exist is counted (S250).

Therefore, the skip cycle SKC2 is reset by subtracting the counting value CNT from the sum of the difference value DIF and the preset initial skip cycle SKC1 (S260).

Subsequently, when a time equal to the skip cycle SKC2 elapses after the input of the preceding wafer, the subsequent wafer is introduced into the process processor 130 (S270).

As such, the skip cycle defined by the input time interval of the preceding wafer and the subsequent wafer may include the number of processing units used in each of the process steps of the preceding wafer and the subsequent wafer, the number of wafers that can be accommodated in each baking unit, Or the number of processing units in which no wafer exists.

Therefore, the distance between the trailing wafer and the preceding wafer can be properly maintained, and as a result, it is possible to prevent the trailing wafer from waiting in the processing unit or to shorten the waiting time.

Although described with reference to the embodiments above, those skilled in the art will understand that the present invention can be variously modified and changed without departing from the spirit and scope of the invention as set forth in the claims below. Could be.

1 is a schematic view of a semiconductor manufacturing apparatus according to an embodiment of the present invention.

FIG. 2 is a side view of the bake module shown in FIG. 1.

3 is a block diagram of a control unit that controls the operation of the transfer unit shown in FIG. 1.

4 is a flowchart illustrating an operation of the control unit shown in FIG. 2.

* Description of the symbols for the main parts of the drawings *

100 semiconductor manufacturing equipment 110 storage unit

120: transfer unit 130: process processing unit

140: control unit

Claims (13)

An accommodation part in which a plurality of wafers are accommodated; A process processing unit comprising a plurality of processing units and sequentially receiving the wafers and processing the wafers based on a process recipe of each wafer; A transfer unit for sequentially transferring the wafers accommodated in the accommodating part to the process processor and transferring the wafers processed by the process processor to the accommodating part; And If the process recipe of the preceding wafer introduced into the process processing unit and the process recipe of the subsequent wafer waiting to be introduced into the process processing unit are different, an appropriate skip cycle is performed based on the process sequence and the number of processing units used in each process step. And a control unit configured to control the operation of the transfer unit so that the subsequent wafer is introduced into the process processing unit after a time elapsed by the skip cycle after the preceding wafer is added. The method of claim 1, wherein the processing unit comprises a coating module for performing a coating process, a developing module for performing a developing process, and a baking module for performing a baking process, wherein each module is composed of one or more processing units Semiconductor manufacturing equipment. The method of claim 2, wherein the control unit, Compare the processing steps of the preceding wafer and the processing steps of the following wafer, and if there are the same processing steps, the number of processing units used by the preceding wafer and the processing units used by the subsequent wafer in the same processing step. A comparison processor for outputting a difference value of the number; A skip cycle setting unit configured to reset the skip cycle by adding the difference value and a preset initial skip cycle; And And a transfer unit controller configured to determine when the trailing wafer is introduced into the process processor based on the reset skip cycle. The method of claim 3, wherein the baking module comprises a plurality of baking blocks for performing different baking processes, each baking block is composed of one or more processing units, each processing unit is provided with a cooling plate and a heating plate Semiconductor manufacturing equipment characterized by the above-mentioned. The method of claim 4, wherein the comparison processor determines the number of wafers that each processing unit included in each baking block can simultaneously accommodate, And determining the number of the processing units in accordance with the number of the wafers. The method of claim 3, wherein the control unit, A processing unit detector for detecting whether a wafer exists in each processing unit; And A counter for counting the number of processing units in which the wafer does not exist among processing units existing on the path of the subsequent wafer from the time when the preceding wafer is input based on the detection signal from the processing unit detector; , And the skip cycle setting unit resets the skip cycle by subtracting the counting value from the sum of the initial skip cycle and the difference value. Extracting the wafers sequentially from an accommodation unit in which a plurality of wafers are stored through a transfer unit and providing the wafers to a process processor; Sequentially processing the plurality of wafers based on a process recipe of each wafer in the process processor; If the process recipe of the preceding wafer introduced into the process processing unit and the process recipe of the subsequent wafer waiting to be introduced into the process processing unit are different, an appropriate skip cycle is performed based on the process sequence and the number of processing units used in each process step. Setting up; And And controlling the operation of the transfer unit to feed the trailing wafer into the process processor when the time after the skip cycle has elapsed after the preceding wafer is added. The method of claim 7, wherein the processing unit comprises a coating module for performing a coating process, a developing module for performing a developing process, a baking module for performing a baking process, each module comprises one or more processing units Control method of semiconductor manufacturing equipment. The method of claim 8, wherein the setting of the skip cycle comprises: Comparing the processing steps of the preceding wafer with the processing steps of the following wafer; Outputting a difference value between the number of processing units used by the preceding wafer and the number of processing units used by the subsequent wafer when the comparison results in the same processing step; And And resetting the skip cycle by adding the difference value and a predetermined initial skip cycle. The method of claim 9, wherein the bake module comprises a plurality of baking blocks for performing different baking processes, each baking block is composed of one or more processing units, each processing unit is provided with a cooling plate and a heating plate A control method of a semiconductor manufacturing equipment characterized by the above-mentioned. The method of claim 10, wherein the outputting the difference value, Determining the number of wafers each processing unit included in the baking block can accommodate at the same time; And And determining the number of processing units in accordance with the number of wafers. The method of claim 9, further comprising: detecting whether the preceding wafer is present in each of the processing units existing on the path of the subsequent wafer from the time when the preceding wafer is inserted; And And counting the number of processing units in which the preceding wafer does not exist. The control method of claim 12, wherein the setting of the skip cycle comprises resetting the skip cycle by subtracting the counting value from a sum of the initial skip cycle and the difference value.

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