KR100981673B1 - Method of forming a gate in a semiconductor device - Google Patents

Abstract

Forming a gate oxide film on the semiconductor substrate; Forming a polysilicon layer on the gate oxide layer; Etching the polysilicon layer and the gate oxide layer to form a gate electrode; Removing the reaction product generated when the gate electrode is formed; Performing a plasma nitridation process to nitrate the exposed sidewalls of the gate oxide layer with an oxynitride layer; And forming a source / drain on the semiconductor substrate after forming spacers on both sidewalls of the gate electrode.

Gate oxide, fluorine, nitride

Description

Method of forming a gate in a semiconductor device

1A to 1I are cross-sectional views illustrating a gate forming method of a semiconductor device according to the prior art.

2 is a recipe for explaining the prior art.

3A to 3F are cross-sectional views illustrating a gate forming method of a semiconductor device according to the present invention.

* Explanation of symbols for the main parts of the drawings

10: semiconductor substrate 20: device isolation film

30: gate oxide film 30a: SiO2 layer

30b: SiON layer 50: polysilicon film

60 photoresist pattern 50a gate electrode

70: undercuts 80 and 90: source and drain

110a: spacer

The present invention relates to a method for forming a gate of a semiconductor device, and more particularly to a method for forming a gate oxide film without undercut.

In order to form a gate oxide film applied to a logic device of 0.18 μm or less, a wet oxidation process is performed, followed by an in-situ annealing process in an NO gas atmosphere. In the gate oxide film formed by this process, a SiON film, which is a kind of nitric oxide film, is formed. This ultimately aims to minimize the hot carrier effect related to the reliability of the device as well as boron penetration generated after the subsequent gate electrode process. However, the nitric oxide film through the NO in-situ anneal process, which is additionally applied when the gate oxide film is formed, is laterally distributed in the entire gate oxide film, that is, parallel to the semiconductor substrate, so that there is a lack of a side nitrogen oxide film. cause deficiency. The deficiency of the nitrogen monoxide film in this aspect can cause the gate oxide undercut in the subsequent cleaning process, and also includes room for improving the hot carrier effect properties.

Based on the above description, a conventional gate forming method will be described with reference to FIGS. 1A to 1I.

Referring to FIG. 1A, a device isolation layer 20 for device isolation may be formed on a semiconductor substrate 10. Thereafter, an oxidation process as shown in FIG. 2 is performed to form the gate oxide film 30. In more detail, the wet oxidation process is performed to form the SiO ₂ layer 30a, and then the annealing process is performed in the NO atmosphere. This semiconductor substrate 10 and the SiO ₂ layer (30a) the SiON layer (30b) of nitric oxide film at the interface, as shown in an enlarged view of Figure 1b by the annealing process is formed. That is, the gate oxide film 30 is composed of a SiO ₂ layer 30a and a SiON layer 30b.

1C is a cross-sectional view of a state in which a photoresist pattern 60 for forming a gate electrode is formed after the polysilicon film 50 is formed over the entire structure including the gate oxide film 30.

1D is a cross-sectional view of a state in which a gate electrode 50a is formed by performing an etching process using a photoresist pattern as a mask.

FIG. 1E is a partially enlarged view after the formation of the gate electrode 50a, and as shown in the drawing, the semiconductor substrate 10, the SiON layer 30b, the SiO ₂ layer 30a, and the gate electrode 50a are stacked from the bottom. It is. Here, it can be seen that the side surface of the SiO ₂ layer 30a, which occupies most of the gate oxide film 30, is exposed.

FIG. 1F shows a state in which the undercut 70 is formed in the SiO ₂ layer 30a by performing the cleaning process in the state of FIG. 1E.

FIG. 1G is a cross-sectional view of a nitride film (or oxide film) 110 formed on an entire structure including a gate electrode, and FIG. 1H illustrates a spacer 110a formed on a sidewall of the gate electrode 50a by performing a front surface etching process. The cross section of a state is shown, respectively.                         

FIG. 1I is a cross-sectional view of a state in which transistors are formed by forming sources and drains 80 and 90 in the semiconductor substrate 10. In the transistor operation, a hot carrier from the source 80 passes through the channel 100 to form a gate oxide film. It enters the undercut and causes deterioration of transistor characteristics.

Accordingly, an object of the present invention is to provide a method for forming a gate of a semiconductor device capable of eliminating the above-described disadvantages by forming a nitride film on the sidewall of the gate oxide film.

A method of forming a gate of a semiconductor device according to the present invention for achieving the above object comprises the steps of forming a gate oxide film on the semiconductor substrate; Forming a polysilicon layer on the gate oxide layer; Etching the polysilicon layer and the gate oxide layer to form a gate electrode; Removing the reaction product generated when the gate electrode is formed; Performing a plasma nitridation process to nitrate the exposed sidewalls of the gate oxide layer with an oxynitride layer; And forming a source / drain on the semiconductor substrate after forming spacers on both sidewalls of the gate electrode.

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Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3A to 3F are cross-sectional views illustrating a gate forming method of a semiconductor device according to the present invention.

Referring to FIG. 3A, a device isolation film 20 for device isolation may be formed on the semiconductor substrate 10. Thereafter, an oxidation process as shown in FIG. 2 is performed to form the gate oxide film 30. In more detail, the wet oxidation process is performed to form the SiO ₂ layer 30a, and then the annealing process is performed in the NO atmosphere. By this annealing process, a silicon oxide film SiON layer 30b is formed at the interface between the semiconductor substrate 10 and the SiO ₂ layer 30a. That is, the gate oxide film 30 is composed of a SiO ₂ layer 30a and a SiON layer 30b.

3B is a cross-sectional view of a state in which a photoresist pattern 60 for forming a gate electrode is formed after the polysilicon film 50 is formed over the entire structure including the gate oxide film 30.

3C is a cross-sectional view of the gate electrode 50a formed by an etching process using the photoresist pattern 60 as a mask. Referring to Table 1, the gate electrode forming process will be described in detail.

Parameter Gate electrode forming process Stabilization process Natural Oxide Etching Process Poly Etching Process Residue Etching Process Poly Curing Process Nitriding process Pressure (mT) 7 7 3 1.5 0.1-10 0.1-10 RF power (Max: W) 0 600 300 200 100-1000 50-500 RF power (lowest: W) 0 100 30 500 5-50 0 Cl ₂ 0 0 35 20 0 0 HBr 0 0 35 5 0 0 O ₂ 0 0 7 7 1-100 0 He 0 0 0 0 0 0 Gas of either ClF ₄ or SF ₆ 0 0 0 0 1-100 0 Ar 0 0 0 0 0 0 Any one of NO, N ₂ O, NH ₃ 0 0 0 0 1-100 1-100 N ₂ 0 0 0 0 0 0

1) Stabilization Process

The stabilization process is carried out at a pressure of 7 mT without supply of reaction gas.

2) Natural Oxide Etching Process

The native oxide film etching process is performed under a pressure of 7 mT and an RF power of 100 to 600 W.

3) poly etching process

The poly etch process is carried out under conditions of ₃ mT pressure, 30-300 W RF power, 35 sccm Cl ₂ , 35 sccm HBr, 7 sccm O ₂ . At this time, the wafer temperature is 100-300 ° C, and the etch rate is 500-3000 mW / mim.

4) residue etching process

The residue after the poly etch process is removed under conditions of a pressure of 1.5 mT, RF power of 200-500 W, 20 sccm of Cl ₂ , 5 sccm of HBr, and 7 sccm of O ₂ .

5) Poly Curing Process

To etch the reaction product of oxygen radical with polysilicon in 1-100sccm O ₂ and 1-100sccm ClF ₄ or SF ₆ under 0.1-10mT pressure, 100-1000W RF power One of the gases, 1-100 sccm of NO, N ₂ O or NH ₃ flows. By this process, the reaction product of oxygen group with polysilicon is lightly etched by fluorine.

6) plasma nitriding process

Under a pressure of 0.1-10 mT, RF power of 50 to 500 W, 1-100 sccm of NO, N ₂ O or NH ₃ is flowed. By this process, as shown in FIG. 3D, a nitride film 200 is formed on the sidewalls of the SiO ₂ layer 30a and the SiON layer 30b to a thickness of 10 to 100 kPa.

In more detail, the plasma nitriding process is performed after a weak etching of the reaction product of the oxygen group and the polysilicon. The RF power used in the plasma nitridation process is significantly lower than the RF power used in conventional polysilicon etching. That is, the RF power for discharging the gas is not the RF power that requires a certain amount of etch rate. Nitriding rate is 20-100 kW / min.

As shown in Fig. 3D, the distribution of the SiON layer, which has been conventionally formed laterally (parallel with the semiconductor substrate), is also distributed laterally in the present invention by plasma treatment. This can prevent undercut of the gate oxide film by the subsequent cleaning process and further, maintain stable device characteristics after transistor formation.

Thereafter, as shown in FIG. 3E, the process of forming the spacer 110a is completed, and then, as shown in FIG. 3F and the process of forming the source / drain 80 and 90, the transistor is formed. As shown in FIG. 3F, since undercut does not occur on the sidewall of the gate oxide film, hot carrier damage can be suppressed as much as possible.

As described above, according to the present invention, it is possible to prevent undercut in the gate oxide film and to prevent damage caused by hot carriers.

Although the present invention has been described with reference to the embodiments, one of ordinary skill in the art can modify and change various forms using such embodiments, and thus the present invention is not limited to these embodiments. It is limited by the claims.

Claims (6)

Forming a gate oxide film on the semiconductor substrate; Forming a polysilicon layer on the gate oxide layer; Etching the polysilicon layer and the gate oxide layer to form a gate electrode; Removing the reaction product generated when the gate electrode is formed; Performing a plasma nitridation process to nitrate the exposed sidewalls of the gate oxide layer with an oxynitride layer; And Forming a source / drain on the semiconductor substrate after forming spacers on both sidewalls of the gate electrode; Forming the gate electrode, First etching the polysilicon layer and the gate oxide layer; And Secondary etching to remove residues generated during the first etching process Gate forming method of a semiconductor device comprising a. The method of claim 1, Removing the reaction product, A method for forming a gate of a semiconductor device, which is performed in a state in which a gas containing oxygen gas (O ₂ ) and fluorine (F) is flowed under a pressure of 0.1 mT to 10 mT and an RF power of 100 W to 1000 W. The method of claim 1, The plasma nitriding process is performed in a state in which a gas containing nitrogen flows under a pressure of 0.1 mT to 10 mT and an RF power of 50 W to 500 W. delete The method of claim 1, The primary etching is chlorine gas (Cl ₂ ), hydrogen bromide gas (HBr) and oxygen gas at a pressure of 3mT, RF power of 30W ~ 300W, substrate temperature of 100 ℃ ~ 300 ℃, etch rate of 500 ~ 3000 Å / min A method of forming a gate of a semiconductor device, which is carried out using a mixed gas containing (O ₂ ). The method of claim 1, The secondary etching of the semiconductor device is performed using a mixed gas of 1.5mT pressure, 200W ~ 500W RF power and chlorine gas (Cl ₂ ), hydrogen bromide gas (HBr) and oxygen gas (O ₂ ) mixed Gate formation method.

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