KR100961949B1 - Liquid crystal display and apparatus thereof - Google Patents

Abstract

The present invention improves the accuracy of the operation by reducing the number of signal transmission lines for transmitting signals in the liquid crystal display, reducing manufacturing cost, and reducing operation deviation between data driving ICs. The liquid crystal display according to the present invention includes a liquid crystal panel assembly including a plurality of pixels connected to a gate line and a data line and arranged in a matrix form, and a gate driver for transmitting a signal to the gate line and the gate driver. A data driver for transmitting a signal to the data line is provided. The data driver generates a plurality of gamma voltages, and selects a gamma voltage corresponding to image data from among the plurality of gamma voltages and applies it to the pixel as a data voltage. The signal controller applies gamma reference data for generating the plurality of gamma voltages to the data driver, and generates and applies a control signal for controlling the image data to the data driver.

LCD, LCD, LVDS, COG, Error Correction, Gamma Voltage, Gray Voltage

Description

Liquid crystal display and its driving device {LIQUID CRYSTAL DISPLAY AND APPARATUS THEREOF}

1 is a conceptual diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.

3 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

4 is a block diagram of a gamma voltage generator mounted in a data driver IC according to an exemplary embodiment of the present invention.

The present invention relates to a liquid crystal display device and a drive device thereof.

A typical liquid crystal display (LCD) includes two display panels provided with pixel electrodes and a common electrode, and a liquid crystal layer having dielectric anisotropy interposed therebetween. The pixel electrodes are arranged in a matrix and connected to switching elements such as thin film transistors (TFTs) to receive data voltages one by one in sequence. The common electrode is formed over the entire surface of the display panel and receives a common voltage. The pixel electrode, the common electrode, and the liquid crystal layer therebetween form a liquid crystal capacitor, and the liquid crystal capacitor becomes a basic unit that forms a pixel together with a switching element connected thereto.

In such a liquid crystal display, a voltage is applied to two electrodes to form an electric field in the liquid crystal layer, and the intensity of the electric field is adjusted to control the transmittance of light passing through the liquid crystal layer to obtain a desired image. At this time, in order to prevent deterioration caused by the application of an electric field in one direction to the liquid crystal layer for a long time, the polarity of the data voltage with respect to the common voltage is inverted frame by frame, row, or dot.

A typical liquid crystal display device includes an upper panel including a common electrode, a color filter array, and a lower panel including a plurality of thin film transistors (TFTs) and a plurality of pixel electrodes. An alignment layer is coated on the upper panel and the lower panel, and a liquid crystal layer is inserted between the alignment layers. When a voltage is applied to the pixel electrode and the common electrode, a potential difference is generated between the two electrodes, thereby generating an electric field. By adjusting the electric field, the arrangement of the liquid crystal molecules of the liquid crystal layer is changed. When the arrangement of liquid crystal molecules is changed, the transmittance of light passing through the liquid crystal layer is changed, so that a desired image can be obtained.

Such liquid crystal displays generally include a plurality of data driving ICs, each of which includes a shift register, a data register, a data latch, a D / A converter, an output buffer, and the like. The data driving IC latches data of each RGB sequentially received in accordance with the dot clock from the timing controller, and then outputs a data voltage to the data line of the liquid crystal panel. At this time, the D / A converter converts the RGB data input from the data latch to an analog voltage based on the gamma voltage (gradation voltage) input from the outside.

A signal transmission method for transmitting a control signal such as a data signal, a clock signal, and a gamma voltage, etc. generally enables low voltage driving using a low voltage differential signaling (LVDS) transmission method.

Typically, a plurality of data driver ICs are connected to at least one signal line connected to the timing controller for signal transmission between the data controller and the plurality of data driver ICs. Therefore, many wires are required to transfer data signals, control signals, and gamma voltages to the respective data driver ICs. Therefore, these wires increase the complexity of the manufacturing process. Signal delays and the like occur, which causes operation deviations between the respective data driver ICs, which adversely affects accurate driving of the liquid crystal display.

In order to reduce the problems caused by such signal line arrangement, an advanced bus system interface (ABS) scheme has been developed and used. In this method, the timing controller and each data driving IC independently arrange corresponding transmission lines in a one-to-one correspondence. Therefore, since the signal from the timing controller is directly applied to the corresponding data driver IC, the problem of signal delay is reduced, and the operation deviation between other data driver ICs due to the signal delay is also reduced. However, since a large number of transmission lines must be designed between the timing controller and each data driver IC, a large space is required for the wiring design, the size of the liquid crystal display device is increased, and the manufacturing process is complicated, thereby increasing the manufacturing cost.

Accordingly, the technical problem to be achieved by the present invention is to reduce the number of signal transmission lines for transmitting signals in the liquid crystal display and to reduce manufacturing costs.

In addition, another technical problem to be achieved by the present invention is to reduce the operation deviation between each data driving IC, thereby improving the accuracy of the operation.

The liquid crystal display according to the present invention for achieving the above object is a liquid crystal panel assembly comprising a plurality of pixels each connected to a gate line and a data line and arranged in a matrix form, provided on the assembly and transmits a signal to the gate line A gate driver provided on the assembly and transmitting a signal to the data line, generating a plurality of gamma voltages, selecting a gamma voltage corresponding to image data from the plurality of gamma voltages, and applying the same to the pixel as a data voltage. And a signal controller configured to apply gamma reference data for generating the plurality of gamma voltages to the data driver, generate a control signal for controlling the image data, and apply the gamma reference data to the data driver.

In addition, an apparatus for driving a liquid crystal display device including a plurality of pixels arranged in a matrix form according to the present invention for achieving the above object generates a plurality of gamma voltages, and a gamma voltage corresponding to image data among the plurality of gamma voltages. Selects and applies a data driver to the pixel as a data voltage, and applies gamma reference data for generating the plurality of gamma voltages to the data driver, and generates a control signal for controlling the image data. And a signal controller applied to the driver.

In this case, the data driver includes a plurality of data driver ICs, and each of the plurality of data driver ICs includes a gamma voltage generator that generates the plurality of gamma voltages based on a gamma reference voltage from the signal controller.

The gamma reference voltage is applied from the signal controller to the gamma voltage generator through a low voltage differential signaling.

Preferably, the gamma voltage generator is a data register to which the gamma reference voltage is applied and is temporarily stored, a digital / analog converter for converting data output from the data register into an analog voltage, and an output from the digital / analog converter. And a gamma correction voltage generator configured to divide the voltage into a plurality of voltages and output the plurality of gamma voltages.

In the present embodiment, the digital / analog converter outputs at least two voltages of the output voltages as a positive gamma reference voltage and a negative gamma reference voltage, and the gamma voltage generator is output from the digital / analog converter. A pair of at least two of the voltages respectively applied to one terminal, the positive gamma reference voltage and the negative gamma reference voltage to each other terminal, and output a comparison result to the data register It may further include a comparator.                     

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

1 is a conceptual diagram of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram of one pixel of the liquid crystal display according to an exemplary embodiment of the present invention. 3 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

1 and 3, a liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel assembly 300, a gate driver 400, a data driver 500, and a liquid crystal panel assembly 300 connected thereto. And a signal controller 600 for controlling them.

As shown in FIG. 2, the liquid crystal panel assembly 300 includes a lower panel 100 and an upper panel 200 and a liquid crystal layer interposed therebetween, as shown in FIGS. 1 and 2. The equivalent circuit includes a plurality of display signal lines G ₁ -G _n , D ₁ -D _m , and a plurality of pixels connected thereto and arranged in a substantially matrix form.

The display signal lines G ₁ -G _n and D ₁ -D _m are provided on the lower panel 100 and transmit a plurality of gate lines G ₁ -G _n to transfer a gate signal (also called a “scan signal”). And a data line D ₁ -D _m for transmitting a data signal. The gate lines G ₁ -G _n extend substantially in the row direction and are substantially parallel to each other, and the data lines D ₁ -D _m extend substantially in the column direction and are substantially parallel to each other.

Each pixel includes a switching element Q connected to a display signal line G ₁ -G _n , D ₁ -D _m , and a liquid crystal capacitor C _LC and a storage capacitor C _ST connected thereto. It includes. The holding capacitor C _ST can be omitted as necessary.

The switching element Q is provided in the lower display panel 100, and the three-terminal element such as a thin film transistor, the control terminal and the input terminal of which are gate lines G ₁ -G _n and data lines D ₁ -D _{m, respectively.} ) And the output terminals are connected to the liquid crystal capacitor (C _LC ) and the holding capacitor (C _ST ).

The liquid crystal capacitor C _LC has two terminals, the pixel electrode 190 of the lower panel 100 and the common electrode 270 of the upper panel 200, and the liquid crystal layer 3 between the two electrodes 190 and 270. It functions as a dielectric. The pixel electrode 190 is connected to the switching element Q, and the common electrode 270 is formed on the entire surface of the upper panel 200 and receives a common voltage V _com . Unlike in FIG. 2, the common electrode 270 may be provided in the lower panel 100. In this case, both electrodes 190 and 270 may be linear or rod-shaped.

The storage capacitor C _ST , which serves as an auxiliary part of the liquid crystal capacitor C _LC , is formed by overlapping a separate signal line (not shown) and the pixel electrode 190 provided on the lower panel 100 with an insulator interposed therebetween. A predetermined voltage such as the common voltage (V _com ) is applied to this separate signal line. However, the storage capacitor C _ST may be formed such that the pixel electrode 190 overlaps the front end gate line directly above the insulator.

Meanwhile, in order to implement color display, each pixel must display color, which is possible by providing the color filter 230 in a region corresponding to the pixel electrode 190. In FIG. 2, the color filter 230 is formed in a corresponding region of the upper panel 200. Alternatively, the color filter 230 may be formed above or below the pixel electrode 190 of the lower panel 100.

The liquid crystal molecules change their arrangement according to the electric field generated by the pixel electrode 190 and the common electrode 270, and thus the polarization of light passing through the liquid crystal layer 3 changes. The change in polarization is represented by a change in transmittance of light by a polarizer (not shown) attached to the display panels 100 and 200.

The gate driver 400 is connected to the gate lines G ₁ -G _n of the liquid crystal panel assembly 300 to receive a gate signal formed by a combination of a gate on voltage V _on and a gate off voltage V _off from the outside. It is applied to the gate lines G ₁ -G _n . As shown in FIG. 3, the gate driver 400 may be mounted on the left side of the liquid crystal panel assembly 300.

The data driver 500 includes a plurality of data driver ICs 501-508 mounted on the liquid crystal panel assembly 300, and uses a plurality of gamma using the gamma reference data GD applied from the signal controller 600. After generating the voltage, the signal is applied from the signal controller 600 and applied according to the image data R ', G', and B 'applied through the data lines D ₁ -D _m of the liquid crystal panel assembly 300. The gamma voltage is selected and applied to the pixel as a data signal.

The signal controller 600 generates control signals for controlling operations of the gate driver 400 and the data driver 500, and provides the corresponding control signals to the gate driver 400 and the data driver 500.

Next, the display operation of the liquid crystal display will be described in more detail.

The signal controller 600 inputs an input control signal for controlling the RGB image signals R, G, and B and their display from an external graphic controller (not shown), for example, a vertical sync signal V _sync and a horizontal sync signal. (H _sync ), a main clock (MCLK), a data enable signal (DE) is provided. The signal controller 600 generates a gate control signal CONT1 and a data control signal CONT2 based on the input control signal, and adjusts the image signals R, G, and B to match the operating conditions of the liquid crystal panel assembly 300. After appropriately processing, the gate control signal CONT1 is sent to the gate driver 400, and the data control signal CONT2 and the processed image signals R ', G', and B 'are sent to the data driver 500. In addition, the signal controller 600 applies gamma reference data GD to the data driver 500 to generate a plurality of gamma voltages. In this case, the image signals R ′, G ′, and B ″, the data control signal CONT2, and the gamma reference data GD are transmitted to the data driver 500 through the LVDS transfer method.

The gate control signal CONT1 includes a vertical synchronization start signal STV for indicating the start of output of the gate-on pulse (high period of the gate signal), a gate clock signal CPV for controlling the output timing of the gate-on pulse, and a gate-on pulse. And an output enable signal OE that defines the width of the signal.

The data control signal CONT2 is a load for applying a corresponding data voltage to the horizontal synchronization start signal STH indicating the start of input of the image data R ', G', and B 'and the data lines D ₁ -D _m . Signal LOAD, inverted signal RVS and data that inverts the polarity of the data voltage with respect to common voltage V _com (hereinafter referred to as " polarity of data voltage " by reducing " polarity of data voltage with respect to common voltage "). Clock signal HCLK and the like.

The data driver 500 sequentially receives image data R ′, G ′, and B ′ corresponding to one row of pixels according to the data control signal CONT2 from the signal controller 600, and thus gamma reference data GD. After generating a plurality of gamma voltages, a gamma voltage corresponding to each of the image data R ', G', and B 'is selected to convert the image data R', G ', and B' into corresponding data voltages. Convert. The structure and operation of the data driver 500 will be described in detail below.

The gate driver 400 applies the gate-on voltage V _on to the gate lines G ₁ -G _n in response to the gate control signal CONT1 from the signal controller 600, thereby applying the gate lines G ₁ -G _n. Turn on the switching element (Q) connected to.

The gate-on voltage V _on is applied to one gate line G ₁ -G _n so that a row of switching elements Q connected thereto is turned on (this period is "1H" or "1 horizontal period). (horizontal period) "and equal to one period of the horizontal sync signal Hsync, the data enable signal DE, and the gate clock CPV], and the data driver 400 assigns each data voltage to a corresponding data line D. ₁ -D _m ). The data voltage supplied to the data lines D ₁ -D _m is applied to the corresponding pixel through the turned-on switching element Q.

In this manner, the gate-on voltages V _{on are} sequentially applied to all the gate lines G ₁ -G _n during one frame to apply data voltages to all the pixels. At the end of one frame, the next frame starts and the state of the inversion signal RVS applied to the data driver 500 is controlled so that the polarity of the data voltage applied to each pixel is opposite to that of the previous frame ("frame inversion). "). In this case, the polarity of the data voltage flowing through one data line may be changed (“line inversion”) within one frame or the polarity of the data voltage applied to one pixel row may be different according to the characteristics of the inversion signal RVS ( "Dot reversal").

Next, the data driver 500 will be described in detail with reference to FIGS. 3 and 4.

4 is a block diagram of a gamma voltage generator mounted in a data driver IC according to an exemplary embodiment of the present invention.

As shown in Fig. 3, each of the data driving ICs 501 to 508 includes a first signal line 101 to which gamma reference data GD is applied, image data R ', G', and B 'and a data control scene. Call CONT2, that is, in this embodiment, second signal lines 102a-102d for applying data control signal CONT2, such as horizontal synchronization start signal STH, load signal LOAD, and data clock signal HCLK. It is connected to the signal control unit 600 through. In addition, the data driving ICs 501 to 508 are sequentially connected to each other through the signal lines 103a and 103b.

In the embodiment of the present invention, since the signal transmission method through the signal lines 101 and 102a to 102d uses the LVDS method, signal pairs having opposite polarities are applied through the corresponding signal lines 101 and 102a to 102d.

Each data driving IC 501-508 also has a gamma voltage generator 801-808 as shown in FIG.

The structure and operation of the gamma voltage generators 801-808 will be described with reference to FIG. 4. Since the structures and operations of the gamma voltage generators 801 to 808 are the same, only the gamma voltage generator 801 provided in the first data driver IC 501 will be described.

As shown in FIG. 4, the gamma voltage generator 801 includes a data register 901, a digital / analog converter (hereinafter referred to as a "D / A converter") 902, and a gamma correction voltage generator 903. ) And a pair of comparators 904 and 905.

The data register 901 is connected to the signal controller 600, and the D / A converter 902 is connected to the data register 901.

The output signal G0-G4 of the D / A converter 902 is applied to the gamma correction voltage generator 903, and a part of the signal G2 of the output signal G0-G4 of the D / A converter 902 is applied. , G3 is applied to the gamma voltage generator 802 of the next stage as a gamma reference voltage (G ⁺ _ref , G ^- _ref ).

In the pair of comparators 904 and 905, output signals G2 and G3 of the D / A converter 902 are respectively applied to one terminal, and gamma reference voltages applied from the gamma voltage generator of the previous stage to the other terminal. (G ⁺ _ref , G ^- _ref ) are applied respectively. The output terminals of the pair of comparators 904 and 905 are connected to the data register 801.

The operation of the gamma voltage generator 801 according to the embodiment of the present invention having such a structure will be described.

When the gamma reference data GD is applied to the data register 901 in a digital state from the signal controller 600 through the first signal line 101, the data register 901 temporarily stores the gamma reference data GD. It is then transmitted to the D / A converter 902 as a 2-bit signal.

The D / A converter 902 generates a gamma voltage G0-G4 having a corresponding magnitude through each output terminal according to the transmitted gamma reference data GD. The gamma voltage G0 is a reference voltage such as a polarity of the gamma voltage, that is, a common voltage that determines positive or negative polarity, and the two gamma voltages G1 and G2 have positive polarity when compared with the gamma voltage G0. It is a gamma voltage, and the remaining two gamma voltages G3 and G4 are gamma voltages having negative polarity. Among the gamma voltages G0-G4, the gamma voltages G2 and G3 having approximately intermediate magnitudes of the positive and negative polarities are the positive and negative gamma reference voltages G ⁺ _ref and G ^- _ref, respectively. Is applied to the generation unit 802.

When the corresponding number, that is, four gamma voltages G1-G4 are generated through the D / A converter 902, the gamma correction voltage generator 903 uses a plurality of voltage divider resistors (not shown) or the like. A plurality of gamma voltages Y0-Yx are generated by dividing the gamma voltages G1-G4 into voltage values of respective corresponding magnitudes. Accordingly, the data driver ICs 501-508 select gamma voltages corresponding to the data signals R ′, G ′, and B ′ applied from the plurality of gamma voltages Y0-Yx, and then apply the corresponding gamma voltages of the liquid crystal panel assembly 300. Applied to the pixel.

Gamma voltages G2 and G3 output from the D / A converter 902 are applied to one terminal of the comparators 904 and 905, respectively, and gamma reference voltages G ⁺ _ref and G output from the gamma voltage generator of the previous stage. ^- is compared with a _ref), and applies the comparison result in the data register 901.

Therefore, the data register 901 corrects the gamma reference data GD stored according to the comparison result, thereby providing the currently output gamma voltages G2 and G3 and the gamma voltages G2 and G3 output from the previous gamma voltage generator. That is, the deviation between the gamma reference voltages G ⁺ _ref and G ^- _ref is corrected. Therefore, the output deviation which occurs in the gamma voltage generation part 801-808 of each data driver IC is correct | amended. In the embodiment of the present invention, the operation deviation of each gamma voltage generator 801-808 is corrected based on the gamma voltage output from the first data driver IC 801.

In the present embodiment, since there is no input gamma reference voltage (G ⁺ _ref , G ^- _ref ) in the case of the first data driver IC 801, a separate correction operation is not performed on the first data driver IC 801. Do not.

The numbers given in the examples are only examples and may vary depending on the number of gamma voltages.

In addition, the gate driver and the data driver may be formed in the same process together with the switching elements and the wiring of the pixel on the liquid crystal panel rather than in the form of a chip.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

As described above, since each data driver IC includes a gamma voltage generator that generates a plurality of gamma voltages, only a gamma reference data for operating the gamma voltage generator is required, so only a signal line for receiving the signal from the signal controller is required. The number of signal lines for applying a voltage to each data driver IC can be significantly reduced.

In addition, since the gamma voltage generated by each data driver IC is corrected by comparing with the gamma reference voltage output from the previous stage, the output deviation between the gate driver ICs can be eliminated, thereby improving the accuracy of operation.

Claims (9)

A liquid crystal panel assembly comprising a plurality of pixels each connected to a gate line and a data line and arranged in a matrix form; A gate driver provided on the assembly and transmitting a signal to the gate line; A data driver provided on the assembly and configured to transmit a signal to the data line, generate a plurality of gamma voltages, select a gamma voltage corresponding to image data from the plurality of gamma voltages, and apply the gamma voltage to the pixel as a data voltage; And A signal controller which applies gamma reference data for generating the plurality of gamma voltages to the data driver, generates a control signal for controlling the image data, and applies the gamma reference data to the data driver Including, The data driver includes a plurality of data driver ICs, and each of the plurality of data driver ICs includes a gamma voltage generator that generates the plurality of gamma voltages based on a gamma reference voltage from the signal controller. And the gamma reference data is corrected based on the gamma reference voltage. delete In claim 1, The gamma reference voltage is applied to the gamma voltage generator from the signal controller through a low voltage differential signaling method. 4. The method of claim 3, The gamma voltage generator A data register to which the gamma reference voltage is applied and temporarily stored; A digital / analog converter for converting data output from the data register into an analog voltage, and A gamma correction voltage generator which divides the voltage output from the digital / analog converter into a plurality of voltages and outputs the plurality of gamma voltages. Liquid crystal display comprising a. In claim 4, The digital / analog converter outputs at least two voltages of the output voltages as a positive gamma reference voltage and a negative gamma reference voltage, The gamma voltage generator receives at least two voltages of the voltages output from the digital / analog converter to one terminal, respectively, and the positive gamma reference voltage and the negative gamma reference voltage are respectively different. A pair of comparators that are authorized and output the comparison result to the data register Liquid crystal display further comprising. An apparatus for driving a liquid crystal display device comprising a plurality of pixels arranged in a matrix form, A data driver which generates a plurality of gamma voltages, selects a gamma voltage corresponding to image data from among the plurality of gamma voltages, and applies the gamma voltage to the pixel as a data voltage; A signal controller which applies gamma reference data for generating the plurality of gamma voltages to the data driver, generates a control signal for controlling the image data, and applies the gamma reference data to the data driver Including, The data driver includes a plurality of data driver ICs, and each of the plurality of data driver ICs includes a gamma voltage generator that generates the plurality of gamma voltages based on a gamma reference voltage from the signal controller. And the gamma reference data is corrected based on the gamma reference voltage. delete In claim 6, The gamma voltage generator A data register to which the gamma reference voltage is applied and temporarily stored; A digital / analog converter for converting data output from the data register into an analog voltage, and A gamma correction voltage generator which divides the voltage output from the digital / analog converter into a plurality of voltages and outputs the plurality of gamma voltages. Driving device for a liquid crystal display comprising a. In claim 8, The digital / analog converter outputs at least two voltages of the output voltages as a positive gamma reference voltage and a negative gamma reference voltage, The gamma voltage generator is applied with at least two voltages of the voltages output from the digital / analog converter to one terminal, and applies the positive gamma reference voltage and the negative gamma reference voltage to one terminal, respectively. And a pair of comparators for receiving the comparison result and outputting the result of the comparison to the data register.

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