KR100935676B1 - Liquid crystal display - Google Patents

Abstract

The liquid crystal display according to the present invention includes a first substrate, a gate line formed on the first substrate, a thin film transistor formed on the first substrate and insulated from and intersecting the gate line, the thin film transistor connected to the gate line and the data line; A second electrode connected to the thin film transistor and having a plurality of first cutouts, a second substrate facing the first substrate, and a second substrate, which is formed on the second substrate and divides the pixel into a plurality of domains together with the first cutout; And a common electrode having a portion, wherein the data line overlaps with the second cutout of the pixels positioned at both sides thereof, and the second cutout is located at the upper half and the lower half at the upper half when dividing one pixel up and down. The upper half incision and the lower half incision are located in odd numbers, respectively.

LCD, cutout, data line load, crosstalk

Description

Liquid crystal display

The present invention relates to a liquid crystal display device.

In general, a liquid crystal display device injects a liquid crystal material between an upper substrate on which a common electrode, a color filter, and the like are formed, and a lower substrate on which a thin film transistor and a pixel electrode are formed. By applying a different potential to form an electric field to change the arrangement of the liquid crystal molecules, and through this to control the light transmittance is a device that represents the image.

However, a plurality of wirings are formed on the thin film transistor array panel of the liquid crystal display such as a gate line for transmitting a scan signal and a data line for transmitting an image signal. Has a capacitance. This self-resistance and capacitance act as a load on each wiring and distort the signal transmitted through the wiring through RC delay. In particular, the coupling between the data line and the common electrode drives the liquid crystal molecules positioned between the two to induce light leakage around the data line, thereby degrading the image quality and widening the black matrix to block such light leakage. It causes a decrease in the aperture ratio.

The technical problem to be achieved by the present invention is to reduce the load on the data wiring to improve the image quality.

Another object of the present invention is to reduce the capacitance caused by the coupling between the data line and the common electrode to reduce light leakage around the data line.

In order to solve the above problems, the liquid crystal display according to the present invention includes a first substrate, a gate line formed on the first substrate, a data line formed on the first substrate, insulated from the gate line, and intersected with the gate line. A thin film transistor connected to the thin film transistor, a pixel electrode connected to the thin film transistor, the pixel electrode having a plurality of first cutouts, a second substrate facing the first substrate, and a second substrate formed on the second substrate; And a common electrode having a second cutout that is divided into portions, and the data line overlaps with a second cutout of pixels positioned at both sides thereof, and the second cutout is positioned at the upper half when dividing one pixel up and down. When divided into the upper half incision and the lower half incision located in the lower half, the upper half incision and the lower half incision A.

The second cutout may be inclined with respect to the gate line, and the second cutouts of two pixels adjacent to the data line may be offset.

The storage electrode wiring may be further formed on the first substrate in the same layer as the gate line.

As described above, by removing the common electrode on the data line to form the data line cutout, the load on the wiring is reduced, the amount of change in the liquid crystal capacitance applied to the wiring is reduced, and the light leakage due to side crosstalk is reduced. The aperture ratio can be increased. When the load on the wiring is reduced, a wider and higher resolution liquid crystal display device may be realized by overcoming limitations in terms of size and resolution of a structure in which the data line is formed of a single chromium layer. If the amount of change in the liquid crystal capacitance on the wire is reduced, the problem of the first vertical cross-talk which occurs when the charge rate is low is improved, thereby increasing the limit on the charge rate. In addition, it is possible to obtain a liquid crystal display device having excellent image quality by reducing light leakage and increasing aperture ratio by side crosstalk.

Hereinafter, with reference to the drawings will be described a preferred embodiment of the present invention.

1 is a layout view of a thin film transistor array panel for a liquid crystal display according to an exemplary embodiment of the present invention, FIG. 2 is a layout view of a color filter panel of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. FIG. 4 is a layout view of a pixel electrode and a common electrode cutout when the liquid crystal display according to the exemplary embodiment is viewed from the front, and FIG. 4 is a cross-sectional view taken along line IV-IV ′ of FIG. 3.

First, the thin film transistor array panel of the liquid crystal display according to the first embodiment will be described with reference to FIGS. 1 and 4.

The gate line 121 extending in the horizontal direction is formed on the transparent insulating substrate 110 such as glass, and the storage electrode line 131 is formed in parallel with the gate line 121. The gate electrode 121 is formed in the form of a protrusion of the gate electrode 123, and the first to third sustain electrodes 133a, 133b, and 133c and the sustain electrode connection part 133d are connected to the sustain electrode line 131. have.

Here, the first storage electrode 133a and the second storage electrode 133b are directly connected to the storage electrode line 131 and are formed in the vertical direction, and the third storage electrode 133c is formed in the horizontal direction so that the first storage electrode 133a is formed in the horizontal direction. The electrode 133a and the second sustain electrode 133b are connected. The storage electrode connector 133d connects the second storage electrode 133b to the first storage electrode 133a of the neighboring pixel.

A gate insulating layer 140 is formed on the gate wirings 121 and 123 and the storage electrode wirings 131, 133a, 133b, 133c, and 133d, and an amorphous silicon layer is formed on the gate insulating layer 140 on the gate electrode 123. The semiconductor layers 151 and 154 are formed. The semiconductor layers 151 and 154 have a data line semiconductor layer 151 and a channel semiconductor layer 154.

On the semiconductor layers 151 and 154, ohmic contacts 161, 163 and 165 made of amorphous silicon doped with N-type impurities such as phosphorus (P) at a high concentration are formed. The ohmic contact layers 161, 163, and 165 may include a data line contact layer 161 formed on the data line semiconductor layer 151 and a source and drain contact layer formed on the channel semiconductor layer 154. (163, 165).

A source electrode 173 and a drain electrode 175 are formed on the source and drain contact layers 163 and 165, respectively, and the source electrode 173 extends in the vertical direction on the gate insulating layer 140. Is connected to 171. A passivation layer 180 having a contact hole 181 exposing the drain electrode 175 is formed on the data wires 171, 173, and 174, and a drain electrode is formed on the passivation layer 180 through the contact hole 181. The pixel electrode 190 connected to the 175 is formed. The pixel electrode 190 is made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO).

In this case, the pixel electrode 190 has a plurality of cutouts 191a, 192a, 193a, 194a, 191b, 192b, 193b, 194b, and 195, and these cutouts 191a, 192a, 193a, 194a, 191b, and 192b. , 193b, 194b, and 195 are divided into a plurality of small regions.

The cutouts 191a, 192a, 193a, 194a, 191b, 192b, 193b, and 194b are elongated in the diagonal direction. That is, it extends in the direction which forms about 45 degrees or 135 degrees with the gate line 121. In this case, the cutouts 191a, 192a, 193a, 194a, 191b, 192b, 193b, 194b, and 195 are positioned at an upper half surface of the third storage electrode 133c crossing the center of the pixel plane. 45 degrees with respect to the line 121 and the lower half surface is formed 135 degrees with respect to the gate line 121.

One pixel plane is divided into ten small regions by the cutouts 191a, 192a, 193a, 194a, 191b, 192b, 193b, and 194b, and the upper and lower half surfaces are divided into five small regions, respectively. In this case, the number of small regions may be adjusted as necessary. As described below, in order to arrange an odd number of cutouts of the common electrode 270 corresponding to the upper and lower half surfaces of the pixel surface, The number of small areas in each of the upper and lower surfaces must be odd.

On the other hand, a potential applied to the common electrode of the color filter display panel described later is usually applied to the storage electrode line 131, the storage electrodes 133a, 133b, and 133c.

Next, the color filter display panel of the liquid crystal display according to the exemplary embodiment of the present invention will be described with reference to FIGS. 2 and 4.

A black matrix 220 composed of a chromium / chromium oxide bilayer is formed on a transparent substrate 210 made of glass or the like to define a pixel surface. Color filters 230 of red (R), green (G), and blue (B) colors are formed on each pixel surface. The overcoat film 250 covers and protects the color filter 230 on the color filter 230, and the common electrode 270 made of a transparent conductor is formed on the overcoat film 250.

The common electrode 270 has cutouts 271a, 272a, 273a, 274a, 275a, 271b, 272b, 273b, 274b, and 275b. At this time, the cutouts 271a, 272a, 273a, 274a, 275a, 271b, 272b, 273b, 274b, and 275b have an upper half cutout 271a, 272a, 273a, 274a, 275a) and lower half incisions (271b, 272b, 273b, 274b, 275b), and the upper half incisions (271a, 272a, 273a, 274a, 275a) and lower half incisions (271b, 272b, 273b, 274b, and 275b have different extending directions and form an angle of about 90 degrees.

The number of upper half incisions 271a, 272a, 273a, 274a, and 275a and the lower half incisions 271b, 272b, 273b, 274b, and 275b are respectively five. Here, the number of the upper half incisions 271a, 272a, 273a, 274a, and 275a and the lower half incisions 271b, 272b, 273b, 274b, and 275b may be adjusted as necessary, but each is preferably odd. This is to allow the ends of the cutouts of neighboring pixel surfaces to be alternately arranged on the data line as described below.

A portion of the ends of the cutouts 271a, 272a, 273a, 274a, 275a, 271b, 272b, 273b, 274b, and 275b that overlaps the left and right boundary lines of the pixel plane is widened. This reduces the load of the data line 171 by reducing the area of the common electrode 270 overlapping with the data line 171 in the state where the thin film transistor display panel color filter display panel is coupled, thereby reducing the load of the data line 171 and the common electrode 270. This is to reduce the coupling between them.

Meanwhile, the black matrix 220 may be formed of an organic insulating material to which a black pigment is added instead of using a metal material such as chromium.

The thin film transistor array panel of FIG. 1 and the color filter panel of FIG. 2 are aligned and combined, and a liquid crystal material is injected and sealed between the two display panels to form the liquid crystal layer 3, and the long axis of the liquid crystal molecules included therein is displayed on the display panel. When the two polarizers (not shown) are vertically oriented and the polarization axes are disposed perpendicular to each other outside the two substrates 110 and 210, the liquid crystal display according to the exemplary embodiment is provided.

The common electrode 270 cutouts 271a, 272a, 273a, 274a, 275a, 271b, 272b, 273b, 274b, and 275b are projected on the thin film transistor array panel while the two display panels are aligned. Pixel electrode 190 cutouts 191a, 192a, 193a, 194a, 195a, 191b, 192b, 193b, 194b, between 271a, 272a, 273a, 274a, 275a, 271b, 272b, 273b, 274b, and 275b. 195b is positioned so that the small region divided by the cutouts 191a, 192a, 193a, 194a, 195a, 191b, 192b, 193b, 194b, and 195b of the pixel electrode 190 may have a cutout 271a of the common electrode 270. , 272a, 273a, 274a, 275a, 271b, 272b, 273b, 274b, and 275b. Each region of the liquid crystal layer 3 which is divided by projecting each domain surface to the color filter display panel is defined as a domain.

 Each domain is formed of a polygon, and the two longest sides of the polygon are parallel to each other and form about 45 degrees or about 135 degrees with the gate line 121, and 45 degrees or 135 degrees with the polarization axis of the polarizer.

The ends where the widths of the cutouts 271a, 272a, 273a, 274a, 275a, 271b, 272b, 273b, 274b, and 275b of the common electrode 270 extend are disposed to overlap the data line 171, thereby providing data. The area of the common electrode 270 overlapping the line 171 is greatly reduced. As such, by reducing the area of the common electrode 270 overlapping with the data line 171, the load of the data line 171 is reduced, the amount of change in the liquid crystal capacitance applied to the data line 171 is reduced, and the data line 171 is reduced. ) Lateral light leakage due to cross talk of the signal is reduced. In addition, since the light leakage around the data line is significantly reduced, the width of the black matrix can be reduced, thereby improving the aperture ratio.

Meanwhile, when the cutouts 271a, 272a, 273a, 274a, 275a, 271b, 272b, 273b, 274b, and 275b of the common electrode 270 are formed to overlap the data line 171, the cutouts of neighboring pixels are formed. (271a, 272a, 273a, 274a, 275a, 271b, 272b, 273b, 274b, and 275b) are connected to each other to prevent each part of the common electrode 270 from being electrically disconnected at the end of the cutout of neighboring pixels Are alternately arranged along the data line 171.

The effect of placing the cutout of the common electrode 270 at the position overlapping with the data line 171 as described above will be described.

Then, the capacitance formed between the data electrode and the ITO layer with and without the indium tin oxide (ITO) layer (corresponding to the common electrode) in the structure as shown in FIG. 5 is roughly calculated.

First, when the ITO layer is present, the dielectric constant? Of the liquid crystal flows from 3 to 7 because the voltage applied to the liquid crystal layer LC is maximum. Therefore, ignoring the protective film, if the capacitance is minimum, A (area of data wiring) × 3 (ε) / 4 (d) = 0.75A, and if it is maximum, A (area of data wiring) × 7 (ε) / 4 (d) = 1.75A. That is, when the ITO layer is present, the capacitive load of the data wiring by the common electrode is 0.75A to 1.75A.

In the absence of an ITO layer, the voltage across the liquid crystal layer LC is approximately half of the total, so that the dielectric constant ε of the liquid crystal is about 3 to 4, and the capacitance is formed between the black matrix BM. D = 7. Therefore, the capacitance is A (data wiring area) × 4 (ε) / 7 (d) = 0.57A at maximum, and A (data wiring area) × 3 (ε) / 7 (d) at minimum = 0.43A or so.

Therefore, if the average value is taken, the capacitance value between the data line and the CF in the absence of the ITO layer is (0.43 + 0.57) / (0.75 + 1.75) = 0.4, which is reduced to about 40% compared with the case of the ITO layer. .

Summarizing the above results, the load of the data wiring according to the embodiment of the present invention is represented by the relative ratio with the conventional data wiring load as the reference (1).

As can be seen from Table 1, when the organic BM is used, the capacitive load of the data wiring is reduced by about 40%, and even by using chromium BM, about 20%.

Next, the vertical crosstalk problem reduction will be described.

As described above, the problem caused by the charge rate will be reduced by the cause of the decrease in the load of the wiring, but even if the charge rate is the same level, the longitudinal crosstalk problem caused by the lack of the charge rate is in accordance with the present invention. It decreases compared with the case by the conventional technique. This is because the voltage applied to the liquid crystals around the data line is significantly reduced by removing the common electrode above the data line, and therefore the movement of the liquid crystal is reduced, thereby greatly reducing the amount of change in the load on the data line. As previously calculated, the amount of change in the load on the data line is about 0.07A from 0.73A to 1.75A when there is a common electrode (ITO layer) and 1.0A when there is no common electrode. Only fluctuates. Even considering the coupling between the data line and other lines, the variation in the capacitive load due to the movement of the liquid crystal is reduced to 15% or less of the conventional one. This is enough to solve some of the problems with high resolution products.

Next, look at the reduction of light leakage by the side crosstalk.

Since the common electrode is removed in the upper region of the data line, the electric field formed between the data line and the common electrode is weakened. Accordingly, the lying angle of the liquid crystal driven by the influence of the signal flowing along the data line around the data line is reduced, thereby reducing the amount of light leakage around the data line. Look through the simulated graph.

6 is a graph showing the degree of light leakage around the data line in the liquid crystal display according to the related art, and FIGS. 7 and 8 are light leakage around the data line in the liquid crystal display according to the exemplary embodiment of the present invention. As a graph showing the degree of, the black matrix is formed of an organic material and the chromium is formed, respectively.

6 to 8 are graphs simulated with 0 V applied to the common electrode, 5 V applied to the data line, and -1 V and 1 V applied to the left and right pixel electrodes, respectively.

First, referring to FIG. 6, the common electrode is cut in a region outside the data line. The numerical values described in the legend of the graph correspond to the width of the part where the common electrode ITO is open in the electrode arrangement diagram drawn below the graph. However, the graph shows that almost similar light leakage occurs regardless of the width of the incision. In other words, the common electrode is cut away in the area beyond the data line, and thus does not contribute much to reducing the light leakage.

Next, referring to FIGS. 7 and 8, the common electrode is cut off on the data line. T described in the legend of the graph represents the width of the common electrode cutout beyond the width of the data line in the electrode arrangement diagram drawn below the graph. From the graph, it can be seen that the degree of light leakage decreases significantly as the width of the cutout of the common electrode increases in both the organic BM and the chromium BM. In particular, in the case of using organic BM, the degree of light leakage decreases significantly as the width of the incision increases. This shows that side light leakage around the data line can be reduced by cutting the common electrode above the data line.

9 is a graph comparing the degree of light leakage around the data line according to the cutoff width of the data line in the liquid crystal display according to the exemplary embodiment of the present invention with reference to the liquid crystal display according to the related art. FIG. 9 is a graph showing the amount of light leakage generated around the data line and comparing the amount of light leakage according to the increase of the T value based on the conventional structure (normal).

9, it can be seen that the amount of light leakage decreases as the T value increases. This means that the incision of the common electrode can reduce side crosstalk. On the other hand, the amount of light leakage decreases more when organic BM is used than when chromium BM is used. This is because, in the case of chromium BM, even if the common electrode is removed, the BM acts as an electrode to form an electric field between the data lines.

In FIG. 4, the width of the cutout overlapping the data line can be extended to about 4 μm beyond the data line toward the neighboring pixel. In this case, even if the alignment error is taken into consideration, the light leakage can be lowered to the conventional 50% level.

Next, the aperture ratio increase will be described.

10 is a graph comparing the distance from the point where the transmittance is 10% to the data line according to the data line upper incision width in the liquid crystal display according to the exemplary embodiment of the present invention compared with the liquid crystal display according to the related art.

Referring to FIG. 10, it can be seen that as the width of the common electrode cutout becomes wider, a point where the transmittance due to light leakage becomes 10% compared to the front white state becomes closer to the data line. Therefore, it is possible to reduce the width of the BM formed by 1 to 2 μm to prevent light leakage around the data line.

Although the above has been described with reference to a preferred embodiment of the present invention, those skilled in the art will be able to variously modify and change the present invention without departing from the spirit and scope of the invention as set forth in the claims below. It will be appreciated. In particular, the arrangement of the cutouts formed on the pixel electrode and the common electrode may be variously modified, and modifications such as placing protrusions instead of forming the cutout may be possible.

1 is a layout view of a thin film transistor array panel for a liquid crystal display according to an exemplary embodiment of the present invention.

2 is a layout view of a color filter display panel of a liquid crystal display according to an exemplary embodiment of the present invention.

3 is a layout view of a pixel electrode and a common electrode cutout when the liquid crystal display according to the exemplary embodiment is viewed from the front.

4 is a cross-sectional view taken along line IV-IV ′ of FIG. 3.

FIG. 5 is a diagram schematically illustrating a cross-sectional structure of a liquid crystal display device in order to explain a load of wiring in the liquid crystal display device.

6 is a graph showing the degree of light leakage around a data line in the liquid crystal display according to the related art.

7 and 8 are graphs showing the degree of light leakage around the data line in the liquid crystal display according to the exemplary embodiment of the present invention, respectively, illustrating a case where a black matrix is formed of an organic material and a case of chromium.

9 is a graph comparing the degree of light leakage around the data line according to the cutoff width of the data line in the liquid crystal display according to the exemplary embodiment of the present invention with reference to the liquid crystal display according to the related art.

FIG. 10 is a graph comparing the distance from the point where the transmittance is 10% to the data line according to the liquid crystal display device according to the related art in the liquid crystal display according to the exemplary embodiment of the present invention. to be.

Claims (3)

First substrate, A gate line formed on the first substrate, A data line formed on the first substrate and insulated from and intersecting the gate line; A thin film transistor connected to the gate line and the data line, A pixel electrode connected to the thin film transistor and having a plurality of first cutouts; A second substrate facing the first substrate, A common electrode formed on the second substrate and having a second cutout that divides the pixel into a plurality of domains together with the first cutout; Including, The data line overlaps the second cutout of the pixels positioned at both sides thereof, and the second cutout cuts the upper half and the lower half cutout positioned at the upper half when dividing one pixel up and down. When divided into parts, the upper half incision and the lower half incision is an odd number, And the second cutout is inclined with respect to the gate line, and the second cutouts of two pixels adjacent to the data line are shifted. delete In claim 1, And a sustain electrode wiring formed on the first substrate in the same layer as the gate line.

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