KR100928923B1 - Transverse electric field mode liquid crystal display element - Google Patents

Abstract

The transverse electric field mode liquid crystal display element of the present invention is for improving the light transmittance by making the light transmittance uniform throughout the panel and includes a plurality of gate lines and data lines which define a plurality of pixels, And at least one pair of electrodes disposed substantially parallel to the pixel to generate a transverse electric field, and the insulating layer above the electrodes is removed to form a uniform phase delay over the entire substrate.

A transverse electric field mode, a light transmittance, a cell gap, a phase delay, a gate insulating layer,

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a liquid crystal display (LCD)

1A is a plan view showing a structure of a conventional transverse electric field mode liquid crystal display element.

1B is a sectional view taken along line I-I 'of FIG. 1A.

2 is a plan view showing a structure of a transverse electric field mode liquid crystal display element according to the present invention.

FIG. 3A is a sectional view taken along line II-II 'of FIG. 2; FIG.

3B is a cross-sectional view taken along line III-III 'of FIG. 2;

Description of the Related Art [0002]

105: common electrode 107: pixel electrode

111: gate electrode 112: semiconductor layer

113: source electrode 114: drain electrode

120, 130: substrate 122: gate insulating layer

124: Protective layer 126: Home

132: black matrix 134: color filter layer

140: liquid crystal layer d: cell gap

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transverse electric field mode liquid crystal display device and, more particularly, to a transverse electric field mode liquid crystal display device capable of improving the transmissivity by maintaining the same phase delay throughout the panel, .

2. Description of the Related Art Recently, various portable electronic devices such as a mobile phone, a PDA, and a notebook computer have been developed. Accordingly, there is a growing need for a flat panel display device for a light and small size. As such flat panel display devices, a liquid crystal display (LCD), a plasma display panel (PDP), a field emission display (FED) and a vacuum fluorescent display (VFD) have been actively studied. However, Because of its implementation, liquid crystal display devices (LCDs) are now spotlighted.

Although these liquid crystal display devices have various display modes depending on the arrangement of liquid crystal molecules, liquid crystal display devices of TN mode are mainly used because of their advantages of easy monochrome display, quick response speed and low driving voltage. In such a TN mode liquid crystal display element, liquid crystal molecules aligned horizontally with the substrate are oriented substantially perpendicular to the substrate when a voltage is applied. Therefore, there is a problem that the viewing angle is narrowed when the voltage is applied due to the refractive index anisotropy of the liquid crystal molecules.

In order to solve such a viewing angle problem, liquid crystal display devices of various modes having a wide viewing angle characteristic have been proposed. Among them, liquid crystal display devices of a transverse electric field mode (In Plane Switching Mode) . The IPS mode liquid crystal display element forms at least one pair of electrodes arranged in parallel in a pixel to form a transversal electric field substantially parallel to the substrate, thereby aligning the liquid crystal molecules in a plane.

FIG. 1 is a plan view of a conventional IPS mode liquid crystal display device, and FIG. 1B is a cross-sectional view taken along line I-I 'of FIG. 1A. As shown in Fig. 1A, the pixels of the liquid crystal panel 1 are defined by the gate line 3 and the data line 4 which are arranged vertically and horizontally. Although only the (n, m) -th pixel is shown in the drawing, in the actual liquid crystal panel 1, the gate line 3 and the data line 4 are divided into N (> n) and M (> m) And N × M pixels are formed over the entire liquid crystal panel 1. A thin film transistor 10 is formed in a crossing region of the gate line 3 and the data line 4 in the pixel. The thin film transistor 10 includes a gate electrode 11 to which a scanning signal is applied from a gate line 3 and a semiconductor layer which is formed on the gate electrode 11 and is activated by a scanning signal to form a channel layer And a source electrode 13 and a drain electrode 14 formed on the semiconductor layer 12 and applied with an image signal through the data line 4 to apply an image signal inputted from the outside to the liquid crystal layer do.

In the pixel, a plurality of common electrodes 5 and pixel electrodes 7 arranged substantially in parallel with the data lines 4 are arranged. A common line 16 connected to the common electrode 5 is disposed in the middle of the pixel and a pixel electrode line 18 connected to the pixel electrode 7 is disposed on the common line 16, And overlaps with the common line 16. A storage capacitance is formed in the transverse electric field mode liquid crystal display element by overlapping the common line 16 and the pixel electrode line 18. [

In the IPS mode liquid crystal display element configured as described above, the liquid crystal molecules are oriented substantially parallel to the common electrode 5 and the pixel electrode 7. A horizontal electric field substantially parallel to the liquid crystal panel 1 is generated between the common electrode 5 and the pixel electrode 7 when the thin film transistor 10 is operated and a signal is applied to the pixel electrode 7. [ Since the liquid crystal molecules rotate on the same plane along the transverse electric field, the grayscale inversion due to the refractive index anisotropy of the liquid crystal molecules can be prevented.

A conventional IPS mode liquid crystal display device having the above-described structure will be described in more detail with reference to a cross-sectional view of FIG. 1B.

1B, a gate electrode 11 is formed on a first substrate 20, and a gate insulating layer 22 is stacked over the first substrate 20. A semiconductor layer 12 is formed on the gate insulating layer 22 and a source electrode 13 and a drain electrode 14 are formed thereon. In addition, a passivation layer 24 is formed over the entire surface of the first substrate 20.

A plurality of common electrodes 5 are formed on the first substrate 20 and a pixel electrode 7 and a data line 4 are formed on the gate insulating layer 22. The common electrode 5, A transverse electric field is generated between the pixel electrodes 7.

On the second substrate 30, a black matrix 32 and a color filter layer 34 are formed. The black matrix 32 serves to prevent light from leaking into a region where the liquid crystal molecules do not operate. As shown in the figure, the black matrix 32 is formed between the pixel region and the pixel (that is, the gate line and the data line Region). The color filter layer 34 is formed of R (Red), B (Blue), and G (Green) to realize actual colors.

A liquid crystal layer 40 is formed between the first substrate 20 and the second substrate 30 to complete the liquid crystal panel 1.

In the IPS mode liquid crystal display element of the above structure, a transverse electric field parallel to the substrate is formed in the liquid crystal layer 40 by the common electrode 5 and the pixel electrode 7 arranged substantially in parallel. Strictly speaking, the electric field formed in the liquid crystal layer 40 is not a complete transverse electric field. This is because the electric field is applied to the entire liquid crystal layer 40 by the common electrode 5 and the pixel electrode 7 having a constant thickness formed on the first substrate 20 side. A transverse electric field parallel to the substrate 20 is generated substantially at the central portion between the common electrode 5 and the pixel electrode 7 but the electric field is reduced toward the common electrode 5 and the pixel electrode 7 20 are inclined at a certain angle to form a longitudinal electric field of 90 ° with the substrate 20 substantially at the upper portion of the common electrode 5 and the pixel electrode 7.

The inclination of the transverse electric field, that is, the tilt of the transverse electric field causes a problem in alignment of the liquid crystal molecules upon application of a voltage. 1B, when the voltage is applied, the liquid crystal molecules 42a are oriented substantially parallel to the substrate 20 at the central portion between the common electrode 5 and the pixel electrode 7, The liquid crystal molecules 42b near the pixel electrode 5 and the pixel electrode 7 are oriented obliquely with the substrate 20 at a certain angle. Generally, when an ideal transverse electric field is applied, the pretilt angle of the liquid crystal molecules in the IPS mode liquid crystal display device is about 0 to 5 degrees. However, by the inclined transverse electric field, The pretilt angle at the surface of the substrate is 5 DEG or more.

On the other hand, since the liquid crystal molecules have refractive index anisotropy, the inclination of the liquid crystal molecules near the electrodes 5 and 7 as described above causes a difference in effective refractive index anisotropy (DELTA _neff ) A phase delay difference occurs in the central portion. Therefore, when the voltage is applied, the transmittance is decreased in a specific region (for example, near the electrode) of the liquid crystal panel due to the phase delay difference, and the transmittance is lowered over the entire liquid crystal panel.

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and it is an object of the present invention to provide a transverse electric field mode liquid crystal display element which forms a uniform light transmittance throughout the panel by increasing the cell gap in the vicinity of the common electrode and the pixel electrode, And to provide the above-mentioned objects.

According to one aspect of the present invention, there is provided a liquid crystal display device comprising: a plurality of gate lines and data lines defining a plurality of pixels; a gate electrode formed on the substrate; A thin film transistor comprising: a gate insulating layer; a semiconductor layer formed on the gate insulating layer; source / drain electrodes formed on the semiconductor layer; and a protective layer stacked over the substrate; A gate insulating layer in the pixel, and at least one pair of electrodes formed in the groove from which the protective layer is removed.

Further, the transverse electric field mode liquid crystal display element according to another aspect of the present invention is defined by a plurality of gates and data lines and includes a first region having a cell gap of d1 and a second region having a cell gap of d2 smaller than d1 A plurality of divided pixels, a driving element formed in the pixel, and a first electrode and a second electrode which are formed in the first region and are arranged substantially parallel to each other to generate a transverse electric field.

The present invention provides an IPS mode liquid crystal display device with improved light transmittance (T). In particular, the present invention provides an IPS mode liquid crystal display element having a uniform light transmittance (T) over the entire liquid crystal panel. In general, the light transmittance (T) depends on the magnitude of the phase delay, as shown in Equation (1). Therefore, if the phase delay is made uniform over the entire liquid crystal panel, a uniform light transmittance T can be obtained.

On the other hand, the phase delay? Nd is proportional to the refractive index anisotropy? N of the liquid crystal molecules and the cell gap d. Therefore, for the conventional IPS mode, a refractive index anisotropy of the liquid crystal display device the common electrode and the pixel electrode near the refractive index of the center of anisotropy (Δn) and the common electrode and the pixel electrode in the range (Δn) (or the effective refractive index anisotropy (Δn _eff) difference The same phase delay can be obtained over the entire liquid crystal panel by making a difference between the cell gap at the central portion between the common electrode and the pixel electrode and the cell gap at the vicinity of the common electrode and the pixel electrode, .

Meanwhile, the present invention is not limited to the IPS mode liquid crystal display element having the specific structure. Generally, in a liquid crystal display element of an IPS mode, light is transmitted through a region between a common electrode and a pixel electrode. Such a transmissive region differs depending on the number of common electrodes and the number of pixel electrodes to be formed. Normally, this transmissive region is represented by a block. For example, three common electrodes and two pixel electrodes are formed in the IPS mode liquid crystal display element shown in FIG. 1A, and four light transmission regions through which light is transmitted are formed. As described above, an IPS mode liquid crystal display element having four transmissive regions is generally referred to as a 4-block liquid crystal display element. This name is used for convenience of description only and is not intended to limit the specific structure of the liquid crystal display element.

The IPS mode liquid crystal display device of the present invention can be applied not only to 4-block, 6-block, or 8-block IPS mode liquid crystal display devices, but also to all block liquid crystal display devices. In the following description, the IPS mode liquid crystal display element of a specific block is described. However, this is for convenience of explanation and does not limit the structure of the IPS mode liquid crystal display element of the present invention.

Hereinafter, the IPS mode liquid crystal display device according to the present invention will be described in more detail with reference to the accompanying drawings.

2 is a plan view of an IPS mode liquid crystal display device according to the present invention. As shown in the figure, in the pixel defined by the gate line 103 and the data line 104, a thin film transistor 110 is formed. The thin film transistor 10 includes a semiconductor layer 112 formed on a gate line 103 and a source electrode 113 and a drain electrode 114 formed on the semiconductor layer 112. The gate line 103 ) Serves as a gate electrode.

The common electrode 5 and the pixel electrode 7 are arranged substantially in parallel within the pixel and a common line 116 connected to the common electrode 105 is disposed on the upper portion of the pixel. The first and second pixel electrode lines 118a and 118b are formed. The first pixel electrode line 118a and the second pixel electrode line 118b are connected to each other through a contact hole 117. The storage capacitor electrode 119 is connected to the first pixel electrode 118a via an insulating layer, And the storage capacitor is formed.

FIG. 3A is a cross-sectional view taken along the line II-II 'of FIG. 2, showing the structure of the thin film transistor 110 and the pixel. As shown in the figure, a thin film transistor, a plurality of common electrodes 105 and a pixel electrode 107 are disposed on a first substrate 120 made of a transparent material such as glass. The thin film transistor includes a gate electrode 111 formed on a first substrate 120, a gate insulating layer 122 formed on the gate electrode, a semiconductor layer 112 formed on the gate insulating layer 122, And a source electrode 113 and a drain electrode 114 formed on the substrate 112. A protective layer 124 is formed on the thin film transistor.

Although not shown in the figure, a gate line is formed in the first substrate 120, and a data line is formed in the gate insulating layer 122 so that a signal is applied to the thin film transistor.

A part of the gate insulating layer 122 and the protective layer 124 of the pixel region where the light is transmitted and the image is displayed is etched except for the thin film transistor region to form a plurality of grooves 126. [ The groove 126 is formed by etching the gate insulating layer 122 and the passivation layer 124 to the first substrate 120. The common electrode 105 and the pixel electrode 107 are formed in the respective grooves 126, . The common electrode 105 and the pixel electrode 107 are formed on the first substrate 120 and may be formed of the same metal as the gate electrode 111 of the thin film transistor, . However, in order to improve the aperture ratio of the IPS mode liquid crystal display device, it is preferable that the common electrode 105 and the pixel electrode 107 are formed of a transparent material such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide).

The common electrode 105 and the pixel electrode 107 are formed by depositing a protective layer 124 and etching the protective layer 124 and the gate insulating layer 122 to have a predetermined width to form a groove 126, And is formed by laminating a metal or ITO in the groove 126 and etching.

The protective layer 124 and the gate insulating layer 122 in the pixel region are not completely etched along the common electrode 105 and the pixel electrode 107 but only the display region in which an actual image is displayed is etched. The protective layer 124 and the gate insulating layer 122 of the pixel electrode lines 118a and 118b and the common line 116 are not etched.

3B is a cross-sectional view taken along line III-III 'of FIG. 2, showing the structure of a region where the protective layer 124 and the gate insulating layer 122 are not etched. As shown in the figure, on the side surface of the gate line 103, an electrode 119 for storage capacitance is formed. The storage capacitor electrode 119 is formed of the same metal as the gate line 103, that is, the same metal as the gate electrode.

A first pixel electrode line 118a is formed on the storage capacitor electrode 119 with a gate insulating layer 122 interposed therebetween to form a storage capacitor. The first pixel electrode line 118a is formed of the same metal as the source electrode of the thin film transistor by the same process. A second pixel electrode line 118b is formed on the first pixel electrode line 118a with a protective layer 124 interposed therebetween. The second pixel electrode line 118b is formed of a transparent metal such as ITO or IZO to which a pixel electrode 107 arranged in the pixel is connected and is connected to the pixel electrode 107 through a contact hole 117 formed in the protective layer 124 And is connected to the first pixel electrode line 118a.

Actually, the first pixel electrode line 118a may be omitted. In this case, since the second pixel electrode line 118b overlaps with the storage capacitor electrode 119 via the protective layer 124 and the gate insulating layer 122, the storage capacitor can be formed. However, in this case, since the two-layer insulating layer is located, a storage capacitor of a desired size can not be formed. Therefore, as shown in the figure, it is preferable to provide the first pixel electrode line 118a. It is also possible to omit the first pixel electrode line 118a and form the storage capacitor electrode 119 on the gate insulating layer 122. [

On the other hand, a black matrix 132 and a color filter layer 134 are formed on the second substrate 130 to prevent light from being transmitted through the thin film transistor region and between the pixels, A liquid crystal layer 140 is formed between the first substrate 120 and the second substrate 130.                     

In the IPS mode liquid crystal display device having the above-described structure, the cell gap d _{2 in} the region where the protective layer 124 and the gate insulating layer 122 are present, the groove d ₂ formed in the region where the protective layer 124 and the gate insulating layer 122 are etched, A difference occurs in the cell gap d ₁ between the common electrode 105 and the pixel electrode 107 forming region. The cell gap of the general IPS mode liquid crystal display element, that is, the cell gap of the IPS mode liquid crystal display element in which the protective layer 124 and the gate insulating layer 122 are not etched is about 4 to 5 mu m. In addition, the thickness of the gate insulating layer 122 is about 0.4 mu m, and the thickness of the protective layer 124 is about 0.6 mu m for organic materials such as BCB (Benzo Cyclo Butene) and photoacryl. Therefore, in the IPS mode liquid crystal display element of the present invention, d ₁ = 5 to 6 μm and d ₂ = 4 to 5 μm. Of course, an inorganic material such as SiOx or SiNx may be used for the protective layer 124. [

As described above, in the IPS mode liquid crystal display device of the present invention, the cell gap d _{1 in} the region where the common electrode 105 and the pixel electrode 107 are formed is larger than the cell gap d _{2 in the} other region. On the other hand, the refractive index anisotropy? _{N 1} (or the effective refractive index anisotropy? _{N 1 eff} ) of the region where the common electrode 105 and the pixel electrode 107 are formed (practically, the common electrode and the region near the pixel electrode) because of the inclination it is smaller than the refractive index anisotropy of the other area (Δn ₂₎ (or the effective refractive index anisotropy (Δn _2eff)). In practice, the size of the cell gap (d1) to increase by the removal of the protective layer 124 and the gate insulating layer 122, which will compensate for the reduction in the refractive index anisotropy (Δn ₁₎ in the vicinity of the electrodes 105, 107.

Therefore, the phase retardation (Δn ₁ d ₁₎ and the phase delay of the other areas of the cell gap (d ₁₎ is increased, the common electrode 105 and the formation region (or near the electrode) of the pixel electrode 107 by the (Δn ₂ d ₂ ) become almost the same (? n ₁ d ₁ ?? n ₂ d ₂ ). As shown in Equation 1, since the light transmittance T is proportional to the phase retardation DELTA n, the cell gap is adjusted to control the phase delay to be substantially the same as described above, so that a uniform light transmittance T Can be obtained. Substantially the same light transmittance T means that the light transmittance T can be obtained in the vicinity of the common electrode 105 and the pixel electrode 107 only in the other region. And the vicinity of the pixel electrode 107. [0064] FIG.

As described above, in the IPS mode liquid crystal display of the present invention, the protective layer and the gate insulating layer in the region where the common electrode and the pixel electrode are formed are removed to increase the cell gap. This increased cell gap improves the light transmittance near the common electrode and the pixel electrode by compensating the refractive index anisotropy and providing a uniform phase delay over the entire liquid crystal panel.

Claims (19)

Board; A plurality of gate lines and data lines formed on the substrate and defining a plurality of pixels; A gate electrode formed on the substrate, a gate insulating layer stacked over the substrate, a semiconductor layer formed on the gate insulating layer, a source electrode and a drain electrode formed on the semiconductor layer, and a protective layer stacked over the substrate transistor; And And a pixel electrode formed on the substrate inside the groove in which the gate insulating layer and the protective layer are removed, Wherein the cell gap of the region where the common electrode and the pixel electrode are formed is larger than the cell gap of the region where the gate insulating layer and the protective layer are formed, so that the phase delay of the entire pixel becomes the same. The transverse electric field mode liquid crystal display element according to claim 1, wherein the common electrode and the pixel electrode are formed on a substrate. delete The transverse electric field mode liquid crystal display element according to claim 1, wherein the common electrode and the pixel electrode are made of opaque metal. The transverse electric field mode liquid crystal display element according to claim 1, wherein the common electrode and the pixel electrode are transparent electrodes. The transverse electric field mode liquid crystal display device according to claim 5, wherein the transparent electrode is made of ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide). The method according to claim 1, A common line to which the common electrode is connected; A pixel electrode line to which the pixel electrode is connected; And And a storage capacitor electrode overlapping the pixel electrode line with an insulating layer therebetween to generate a storage capacitor. ≪ RTI ID = 0.0 > 8. < / RTI > The transverse electric field mode liquid crystal display element according to claim 7, wherein the pixel electrode line is formed on a passivation layer. The transverse electric field mode liquid crystal display element according to claim 8, wherein the storage capacitor is formed on a substrate or a gate insulating layer. The liquid crystal display device according to claim 7, A first pixel electrode line formed on the gate insulating layer; And And a second pixel electrode line formed on the passivation layer and connected to the first pixel electrode line through a contact hole formed in the passivation layer. The transverse electric field mode liquid crystal display element according to claim 10, wherein the storage capacitor is formed on a substrate. delete delete delete delete delete delete delete delete

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