KR100925459B1 - Liquid crystal display having multi domain and panel for the same - Google Patents

Abstract

A gate line formed on an insulating substrate, a data line insulated from and intersecting the gate line, a first pixel electrode, a gate line, a data line, and a first pixel electrode formed in each pixel region defined by the intersection of the gate line and the data line A liquid crystal display device including a thin film transistor having three terminals connected to each other and a second pixel electrode formed in each pixel area and capacitively coupled to the first pixel electrode is provided. In this way, a wide viewing angle liquid crystal display device having improved side visibility can be obtained.

LCD, vertical alignment, cutout, coupling electrode

Description

Multi-domain liquid crystal display and display panel used therefor {LIQUID CRYSTAL DISPLAY HAVING MULTI DOMAIN AND PANEL FOR THE SAME}

1 is a layout view of a thin film transistor array panel for a liquid crystal display according to a first exemplary embodiment of the present invention.

2 is a layout view of a color filter display panel for a liquid crystal display according to a first embodiment of the present invention;

3 is a layout view of a liquid crystal display according to a first exemplary embodiment of the present invention;

4 is a cross-sectional view taken along line IV-IV ′ of FIG. 3,

5 is a circuit diagram of a liquid crystal display according to a first embodiment of the present invention;

6 is a layout view of a liquid crystal display according to a second exemplary embodiment of the present invention.

7 is a layout view of a liquid crystal display according to a third exemplary embodiment of the present invention.

FIG. 8 is a cross-sectional view taken along line VIII-VIII ′ of FIG. 7;

9 is a layout view of a liquid crystal display according to a fourth exemplary embodiment of the present invention.

10 is a layout view of a liquid crystal display according to a fifth exemplary embodiment of the present invention.

11 is a layout view of a liquid crystal display according to a sixth exemplary embodiment of the present invention.

12 is a layout view of a liquid crystal display according to a seventh exemplary embodiment of the present invention.

13 is a circuit diagram of a liquid crystal display according to a seventh embodiment of the present invention.                 

14 is a circuit diagram of a liquid crystal display according to an eighth embodiment of the present invention;

15 is a layout view of a liquid crystal display according to an eighth exemplary embodiment of the present invention.

16 is a circuit diagram of a liquid crystal display according to a ninth embodiment of the present invention;

17 is a layout view of a liquid crystal display according to a ninth embodiment of the present invention.

121 gate line, 123 gate electrode,

133a, 133b, 133c sustain electrode, 176 bond electrode,

171 data lines, 173 source electrodes,

175 drain electrodes, 190 pixel electrodes,

191, 192, 193 incisions, 151, 154 amorphous silicon layer,

270 reference electrode, 271, 272, 273 incision

The present invention relates to a liquid crystal display device and a display panel used therefor.

In general, a liquid crystal display device injects a liquid crystal material between an upper display panel on which a common electrode and a color filter are formed, and a lower display panel on which a thin film transistor and a pixel electrode are formed. By applying a different voltage to form an electric field to change the arrangement of the liquid crystal molecules, and through this to control the light transmittance is a device that represents the image.

However, it is an important disadvantage that the liquid crystal display device has a narrow viewing angle. In order to overcome these disadvantages, various methods for widening the viewing angle have been developed. Among them, liquid crystal molecules are oriented vertically with respect to the upper and lower display panels, and a method of forming a constant incision pattern or forming protrusions on the pixel electrode and the common electrode that is opposite thereto. This is becoming potent.

As a method of forming an incision pattern, an incision pattern is formed on each of the pixel electrode and the common electrode, and the viewing angle is widened by adjusting the direction in which the liquid crystal molecules lie down using a fringe field formed by the incision patterns. .

The protrusions are formed by forming protrusions on the pixel electrode and the common electrode formed on the upper and lower display panels, respectively, to adjust the lying direction of the liquid crystal molecules using an electric field distorted by the protrusions.

In another method, an incision pattern is formed on the pixel electrode formed on the lower panel, and protrusions are formed on the common electrode formed on the upper panel, so that the liquid crystal lies down using a fringe field formed by the incision pattern and the protrusion. There is a way to form a domain by controlling.

In such a multi-domain liquid crystal display, the gray scale inversion reference viewing angle defined as a contrast ratio reference viewing angle based on a contrast ratio of 1:10 or a limit angle of luminance inversion between gray scales is excellent, more than 80 ° in all directions. However, the gamma curve of the front side and the gamma curve of the side do not coincide with each other, resulting in inferior visibility in the left and right sides compared to the TN (twisted nematic) mode liquid crystal display. For example, in the patterned vertically aligned (PVA) mode, which makes an incision by domain dividing means, the screen looks brighter and the color tends to shift toward white as the side faces. Occasionally, the picture appears clumped and disappears. However, as liquid crystal display devices are used for multimedia in recent years, visibility has become increasingly important as pictures and moving pictures are viewed.

The technical problem to be achieved by the present invention is to implement a multi-domain liquid crystal display device having excellent visibility.

In order to solve this problem, in the present invention, the pixel electrode is divided into two and different potentials are applied to the two sub pixel electrodes.

Specifically, for each pixel region defined by an insulation substrate, a first signal line formed on the insulation substrate, a second signal line insulated from and intersecting the first signal line, and the first signal line and the second signal line intersect. A thin film transistor having three terminals connected to the formed first pixel electrode, the first signal line, the second signal line, and the first pixel electrode, respectively, formed in each of the pixel regions, and capacitively coupled to the first pixel electrode. A thin film transistor array panel including the second pixel electrode is provided.                     

In this case, the display device may further include a coupling electrode connected to the first pixel electrode and overlapping the second pixel electrode in an insulated state, wherein at least one of the first pixel electrode and the second pixel electrode is a domain. Preferably, the coupling electrode may extend from the drain electrode among the three terminals of the thin film transistor, or may be connected to the first pixel electrode through a contact hole formed in the passivation layer. In addition, the first and second pixel electrodes may be substantially mirror-symmetrical with respect to the upper and lower bisectors of the pixel region, and two long sides of the boundary lines between the first pixel electrode and the second pixel electrode are adjacent to each other. 45 ° can be achieved with the signal line.

A second thin film transistor having three terminals connected to the second signal line, the third signal line being insulated from and crossing the second signal line, to which a reference potential is applied, and the third terminal connected to the first signal line, the second pixel electrode and the third signal line, The display device may further include a third thin film transistor having three terminals connected to the first signal line, the coupling electrode, and the second pixel electrode, respectively. In this case, the second thin film transistor and the third thin film transistor in the same pixel region are connected to the same first signal line, and the first thin film transistor and the second thin film transistor are connected to adjacent first signal lines, respectively. It may be.

Or a second thin film transistor having three terminals connected to the third signal line, the first signal line, the second pixel electrode, and the third signal line, which are insulated from and cross the second signal line and to which a reference potential is applied. The first thin film transistor and the second thin film transistor in the same pixel area may be connected to adjacent first signal lines, respectively.

Alternatively, an insulating substrate, a first signal line formed on the insulating substrate, a second signal line insulated from and intersecting the first signal line, and formed in each pixel region defined by the first signal line and the second signal line intersecting with each other. A first thin film transistor having three terminals connected to a first pixel electrode, the first signal line, the second signal line, and the first pixel electrode, a second pixel electrode formed in each of the pixel regions, the first signal line, And a second thin film transistor having three terminals connected to the second signal line and the second pixel electrode, respectively, wherein the channel resistance of the first thin film transistor and the channel resistance of the second thin film transistor are different from each other. Prepare.

In this case, the first thin film transistor and the second thin film transistor share a source electrode, and the three terminals of the first thin film transistor are referred to as a first gate electrode, a source electrode, and a first drain electrode, respectively, and the second thin film When the three terminals of the transistor are referred to as the second gate electrode, the source electrode, and the second drain electrode, the distance between the source electrode and the second drain electrode is greater than the distance between the source electrode and the first drain electrode. The width of the source electrode and the first drain electrode facing each other is wider than the width of the source electrode and the second drain electrode facing each other.

At least one of the first pixel electrode and the second pixel electrode preferably has domain dividing means.

More specifically, a first insulating substrate, a gate line formed on the first insulating substrate and including a gate electrode, a gate insulating film formed on the gate line, an amorphous silicon layer formed on the gate insulating film, A data line formed on the amorphous silicon layer and including a source electrode formed on the ohmic contact layer and the gate insulating layer, and at least a portion of which is formed on the ohmic contact layer, and at least a portion of the data line formed on the ohmic contact layer. A drain electrode facing the electrode, a coupling electrode formed on the gate insulating film, a passivation layer formed on the data line, the drain electrode and the coupling electrode, and formed on the passivation layer and connected to the drain electrode and the coupling electrode; A first pixel electrode, the first A second pixel electrode insulated from a small electrode and overlapping at least a portion of the coupling electrode, a second insulating substrate facing the first insulating substrate, and a common electrode formed on the second insulating substrate; A plurality of small domains formed on at least one of the first and second substrates, the first domain dividing means and the first domain and the second substrate, together with the first domain dividing means A liquid crystal display device including second domain dividing means for dividing into portions is provided.

In this case, it is preferable that the coupling electrode extends from the drain electrode or is connected to the first pixel electrode through a contact hole of the passivation layer, and the first domain dividing means comprises the first pixel electrode and the first electrode. At least one of the two pixel electrodes may be a cutout, and the second domain dividing unit may be a cutout of the common electrode. In addition, the coupling electrode preferably overlaps the second domain division means with a half or more portion.

Alternatively, a first insulating substrate, a gate line formed on the first insulating substrate and including a gate electrode, a gate insulating film formed on the gate line, an amorphous silicon layer formed on the gate insulating film, and on the amorphous silicon layer A data line formed on the resistive contact layer, the data line including a source electrode formed on the resistive contact layer and at least partially formed on the resistive contact layer, and at least a portion formed on the resistive contact layer and opposing the source electrode. A passivation layer formed on the first and second drain electrodes, the data line and the first and second drain electrodes, and first and second pixels formed on the passivation layer and connected to the first and second drain electrodes, respectively. An electrode, a second insulating substrate facing the first insulating substrate, and the second insulator A first domain dividing means formed on at least one of the common electrode formed on the first electrode, the first substrate and the second substrate, and formed on at least one of the first substrate and the second substrate and dividing the first domain A liquid crystal display device comprising second means for dividing the pixel region into a plurality of small domains together with the means is provided.

In this case, the distance between the source electrode and the second drain electrode is greater than the distance between the source electrode and the first drain electrode, or the width of the source electrode and the first drain electrode facing each other is greater than the distance between the source electrode and the first drain electrode. It is preferable that the second drain electrode and the second drain electrode be wider than the width opposite each other.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

Next, a structure of a thin film transistor substrate for a liquid crystal display according to an exemplary embodiment of the present invention will be described with reference to the drawings.

1 is a layout view of a thin film transistor substrate for a liquid crystal display according to a first embodiment of the present invention, FIG. 2 is a layout view of a color filter substrate for a liquid crystal display according to a first embodiment of the present invention, and FIG. 4 is a layout view of a liquid crystal display according to a first exemplary embodiment of the present invention, and FIG. 4 is a cross-sectional view taken along line IV-IV 'of FIG. 3.

The liquid crystal display device includes a liquid crystal layer 3 including liquid crystal molecules aligned between the lower display panel and the upper display panel facing the lower display panel and the lower display panel and the upper display panel and oriented perpendicular to the display panel.

First, the lower panel has the following configuration.

First and second pixel electrodes 190a and 190b made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) are formed on the insulating substrate 110 made of a transparent insulating material such as glass. have. The first pixel electrode 190a is connected to the thin film transistor to receive an image signal voltage, and the second pixel electrode 190b overlaps the coupling electrode 176 connected to the first pixel electrode 190a to form a first pixel. It is electromagnetically coupled (capacitively coupled) with the pixel electrode 190a. In this case, the thin film transistor is connected to the gate line 121 transmitting the scan signal and the data line 171 transmitting the image signal, respectively, to turn on the image signal applied to the first pixel electrode 190a according to the scan signal. on) off. The second pixel electrode 190b has a cutout 192. In addition, the lower polarizing plate 12 is attached to the lower surface of the insulating substrate 110. Here, the first and second pixel electrodes 190a and 190b may not be made of a transparent material in the case of a reflective liquid crystal display device, and in this case, the lower polarizer 12 is also unnecessary.

Next, the configuration of the upper panel is as follows.

It is also made of a black matrix 220 to prevent light leakage on the lower surface of the insulating substrate 210 made of a transparent insulating material such as glass, a color filter 230 of red, green, and blue and a transparent conductive material such as ITO or IZO. The common electrode 270 is formed. Here, the cutouts 271, 272, and 273 are formed in the common electrode 270. The black matrix 220 may be formed not only in the peripheral portion of the pixel region but also in the portion overlapping the cutouts 271, 272, and 273 of the common electrode 270. This is to prevent light leakage caused by the cutouts 271, 272, and 273.

The liquid crystal display according to the first embodiment will be described in more detail.                     

A plurality of gate lines 121 and storage electrode lines 131 extending mainly in the horizontal direction are formed on the lower insulating substrate 110.

The gate line 121 has a plurality of portions extending up and down to form a gate electrode 123, and one end portion 125 is widely extended for connection with an external circuit.

Each storage electrode line 131 includes a plurality of storage electrodes 133a, 133b, and 133c extending therefrom. Two storage electrodes 133a and 133b of the pair of storage electrodes 133a, 133b, and 133c extend in the vertical direction and are connected to each other by another storage electrode 133c extending in the horizontal direction. In this case, each of the storage electrode lines 131 may be formed of two or more horizontal lines.

The gate line 121 and the storage electrode line 131 are made of metal such as Al, Al alloy, Ag, Ag alloy, Cr, Ti, Ta, Mo, or the like. As shown in FIG. 4, the gate line 121 and the storage electrode line 131 of the present embodiment are formed of a single layer, but have a high physical and chemical properties such as Cr, Mo, Ti, Ta, and the like and an Al series having a small specific resistance or It may be made of a double layer including an Ag-based metal layer. In addition, the gate line 121 and the storage electrode line 131 may be made of various metals or conductors.

The sidewalls of the gate line 121 and the storage electrode line 131 are inclined, and the inclination angle with respect to the horizontal plane is 30 to 80 °.

A gate insulating layer 140 made of silicon nitride (SiNx) or the like is formed on the gate line 121 and the storage electrode line 131.

On the gate insulating layer 140, a plurality of data lines 171, a plurality of thin film transistor drain electrodes 175, a plurality of coupling electrodes 176, and a plurality of under-bridge metal pieces ( 172 is formed. Each data line 171 extends mainly in a vertical direction, and forms a plurality of branches toward each drain electrode 175 to form a source electrode 173 of the thin film transistor. The leg metal piece 172 is positioned on the gate line 121. The coupling electrode 176 is connected to the drain electrode 175 and is refracted in a V shape.

Like the gate line 121, the data line 171, the drain electrode 175, the coupling electrode 176, and the leg metal piece 172 may be made of a material such as chromium and aluminum, and may be formed of a single layer or multiple layers. have.

Under the data line 171 and the drain electrode 175, a plurality of linear semiconductors 151 extending mainly vertically along the data line 171 are formed. Each linear semiconductor 151 made of amorphous silicon branches to the gate electrode 123, the source electrode 173, and the drain electrode 175 to form a channel 154 of the thin film transistor.

A plurality of ohmic contacts 161 are formed between the semiconductor 151 and the data line 171 and the drain electrode 175 to reduce the contact resistance between the two. The ohmic contact 161 is made of amorphous silicon doped with silicide or n-type impurities at a high concentration.

On the data line 171, the drain electrode 175, and the leg metal piece 172, a protective film 180 made of an inorganic insulator such as silicon nitride or an organic insulator such as resin is formed.                     

The passivation layer 180 is provided with a plurality of contact holes 181 and 183 exposing at least a portion of the drain electrode 175 and the end portion 179 of the data line 171, respectively, and the end of the gate line 121. A plurality of contact holes 182, 184, and 185 exposing portions 125 and portions of the storage electrode lines 131 penetrate the gate insulating layer 140 and the passivation layer 180, respectively.

A plurality of contact assistants 95 and 97 and a plurality of storage bridge 91 are formed on the passivation layer 180, as well as a plurality of pixel electrodes 190a and 190b. The pixel electrodes 190a and 190b, the contact auxiliary members 95 and 97, and the connection legs 91 may be formed of a transparent conductor such as indium tin oxide (ITO) or indium zinc oxide (IZO), or a light reflection characteristic such as aluminum (Al). This excellent opaque conductor is made.

The pixel electrodes 190a and 190b are classified into the first pixel electrode 190a and the second pixel electrode 190b, and the first pixel electrode 190a is connected to the drain electrode 175 through the contact hole 181. The second pixel electrode 190b overlaps the coupling electrode 176. Therefore, the second pixel electrode 190b is electromagnetically coupled (capacitively coupled) to the first pixel electrode 190a.

The boundary dividing the first pixel electrode 190a and the second pixel electrode 190b is divided into portions perpendicular to the portions 191 and 193 forming 45 ° with respect to the gate line 121, and forming a 45 ° portion. The length of the two parts 191 and 193 is longer than that of the vertical part. In addition, the two portions 191 and 193 constituting 45 ° are perpendicular to each other.

The second pixel electrode 190b has a cutout 192, and the cutout 192 penetrates from the right side of the second pixel electrode 190b toward the left side, and the inlet is widened.

Each of the first pixel electrode 190a and the second pixel electrode 190b is substantially a line (parallel with the gate line) that bisects the pixel region defined by the intersection of the gate line 121 and the data line 171. Mirror image symmetry.

On the passivation layer 180, a storage wiring connecting leg 91 is formed to connect the two storage electrode lines 131 across the gate line 121 and positioned at both sides thereof. The storage wiring connection leg 91 is in contact with the storage electrode 133a and the storage electrode line 131 through the contact holes 183 and 184 penetrating through the passivation layer 180 and the gate insulating layer 140. The sustain wiring connection leg 91 overlaps the leg metal piece 172. The storage wiring connection leg 91 serves to electrically connect the entire storage electrode line 131 on the lower substrate 110. The storage electrode line 131 may be used to repair a defect of the gate line 121 or the data line 171, if necessary, and the metal part 172 of the bridge 121 may emit the gate line 121 when irradiating a laser for such repair. And to maintain the electrical connection of the retaining wire connecting bridge (91).

The contact auxiliary members 95 and 97 are connected to the end portion 125 of the gate line and the end portion 179 of the data line through contact holes 182 and 183, respectively.

A black matrix 220 is formed on the upper insulating substrate 210 to prevent light leakage. The red, green, and blue color filters 230 are formed on the black matrix 220. The common electrode 270 having a plurality of cutouts 271, 272, and 273 is formed on the color filter 230. The common electrode 270 is formed of a transparent conductor such as ITO or indium zinc oxide (IZO).

A pair of cutouts 271, 272, and 273 of the common electrode 270 has a portion 191, 193 formed at 45 ° with respect to the gate line 121 among the boundary of the two pixel electrodes 190a and 190b. It includes a diagonal portion parallel to the side and an end portion overlapping the sides of the pixel electrode 190. At this time, the end is classified into a longitudinal end part and a horizontal end part.

When the thin film transistor array panel and the color filter display panel having the above structure are aligned and combined, and a liquid crystal material is injected and vertically aligned therebetween, the basic structure of the liquid crystal display according to the exemplary embodiment of the present invention is provided.

When the thin film transistor array panel and the color filter panel are aligned, the cutouts 271, 272, and 273 of the common electrode 270 divide the two pixel electrodes 190a and 190b into a plurality of sub-areas, respectively. In the present embodiment, as illustrated in FIG. 3, the two pixel electrodes 190a and 190b are respectively divided into four sub-regions. As can be seen in FIG. 3, each subregion is elongated to distinguish the width direction from the length direction.

The portion of the liquid crystal layer 3 between each subregion of the pixel electrodes 190a and 190b and the corresponding subregion of the reference electrode 270 is referred to as a subregion in the future, and these small regions are applied when an electric field is applied. It is classified into four types according to the average major axis direction of the liquid crystal molecules located therein, which is called domain in the future.

In the liquid crystal display having the structure, the first pixel electrode 190a receives an image signal voltage through the thin film transistor, whereas the voltage of the second pixel electrode 190b varies due to capacitive coupling with the coupling electrode 176. Therefore, the absolute value of the voltage of the second pixel electrode 190b is always lower than that of the first pixel electrode 190b. As such, when two pixel electrodes having different voltages are disposed in one pixel area, the two pixel electrodes compensate for each other to reduce distortion of the gamma curve.

Next, the reason why the voltage of the first pixel electrode 190a is lower than the voltage of the second pixel electrode 190b will be described with reference to FIG. 5.

5 is a circuit diagram illustrating a liquid crystal display according to a first exemplary embodiment of the present invention.

In FIG. 5, Clca represents a liquid crystal capacitor formed between the first pixel electrode 190a and the common electrode 270, and Cst represents a storage capacitor formed between the first pixel electrode 190a and the storage electrode line 131. . Clcb represents a liquid crystal capacitor formed between the second pixel electrode 190b and the common electrode 270, and Ccp represents a coupling capacitor formed between the first pixel electrode 190a and the second pixel electrode 190b.

When the voltage of the first pixel electrode 190a with respect to the voltage of the common electrode 270 is called Va, and the voltage of the second pixel electrode 190b is called Vb, according to the voltage division law,

Va = Vb × [Ccp / (Ccp + Clcb)]

Since Ccp / (Ccp + Clcb) is always less than 1, Vb is always smaller than Va.

 On the other hand, by adjusting Ccp, the ratio of Vb to Va can be adjusted. The adjustment of Ccp is possible by adjusting the overlapping area and distance of the coupling electrode 176 and the second pixel electrode 190b. The overlapping area can be easily adjusted by changing the width of the coupling electrode 176, and the distance can be adjusted by changing the formation position of the coupling electrode 176. That is, in the exemplary embodiment of the present invention, the coupling electrode 176 is formed on the same layer as the data line 171, but the coupling electrode 176 and the second pixel electrode 190b are formed on the same layer as the gate line 121. You can increase the distance between them.

The arrangement of the coupling electrode 176 may be variously modified. This will be described as the second to sixth embodiments.

Hereinafter, only the features distinguished from the first embodiment will be described, and the description of the same parts will be omitted.

6 is a layout view of a liquid crystal display according to a second exemplary embodiment of the present invention.

In the liquid crystal display according to the second exemplary embodiment, a position where the coupling electrode 176 is connected to the drain electrode 175 is directly connected to a portion facing the source electrode 173 unlike the first exemplary embodiment.

FIG. 7 is a layout view of a liquid crystal display according to a third exemplary embodiment of the present invention, and FIG. 8 is a cross-sectional view taken along line VIII-VIII ′ of FIG. 7.

In the liquid crystal display according to the third exemplary embodiment, the coupling electrode 176 is connected to the first pixel electrode 190a. These connections are made through the contact holes 186 formed in the passivation layer 180.

9 is a layout view of a liquid crystal display according to a fourth exemplary embodiment of the present invention.

In the liquid crystal display according to the fourth exemplary embodiment, the coupling electrode 176 is connected to the first pixel electrode 190a through the contact hole 186 as in the third exemplary embodiment. However, it is different from the third embodiment in that the contact hole 186 is disposed above the sustain electrode 133a rather than the drain electrode 175.

10 is a layout view of a liquid crystal display according to a fifth exemplary embodiment of the present invention.

The liquid crystal display according to the fifth embodiment is different from the first embodiment in that the coupling electrode 176 has a straight shape.

11 is a layout view of a liquid crystal display according to a sixth exemplary embodiment of the present invention.

The liquid crystal display according to the sixth embodiment is characterized in that the coupling electrode 176 has a shape in which the coupling electrode 176 of the liquid crystal display according to the fifth embodiment and the first embodiment is combined.

In the above, the second pixel electrode 190b is floated and the capacitive coupling is formed with the first pixel electrode 190a by using the coupling electrode 176. However, unlike this, the image signal may be directly applied to the second pixel electrode 190b.

12 is a layout view of a liquid crystal display according to a seventh exemplary embodiment of the present invention.

In the seventh embodiment of the present invention, two drain electrodes 175a and 175b are formed, and they are connected to the first pixel electrode 190a and the second pixel electrode 190b, respectively.

At this time, the distances between the two drain electrodes 175a and 175b are different from the source electrode 173. If the distance between the first drain electrode 175a and the source electrode 173 is La and the distance between the second drain electrode 175b and the source electrode 173 is Lb, La <Lb. The widths of the two drain electrodes 175a and 175b facing the source electrode 173 are also different. When the width of the first drain electrode 175a is called Wa and the width of the second drain electrode 175b is called Wb, Wa> Wb.

As such, when the widths of the two drain electrodes 175a and 175b that face the distance from the source electrode 173 are different from each other, the channel resistances of the thin film transistors are different from each other, so that the first pixel electrode 190a and the first pixel electrode 190a are connected through the channel for the same time. The amount of charge transferred to the second pixel electrode 190b is different. Therefore, the voltage applied to the two pixel electrodes 190a and 190b is also different. At this time, since La < Lb and Wa > Wb, the resistance of the channel passing through the first pixel electrode 190a is smaller than the resistance of the channel passing through the second pixel electrode 190b. Therefore, the absolute value of the voltage of the first pixel electrode 190a is always greater than that of the second pixel electrode 190b.

Therefore, the effect of the visibility improvement like the 1st-6th Example can be acquired.

The voltage difference between the first pixel electrode 190a and the second pixel electrode 190b can be adjusted by changing La, Lb, Wa, and Wb.

13 is a circuit diagram of a liquid crystal display according to a seventh embodiment of the present invention.

However, in the liquid crystal display according to the first to sixth embodiments of the present invention, since the second pixel electrode 190b is always floating, abnormal charges (electrostatics, etc.) are caused on the second pixel electrode 190b due to external factors. There is a problem that distorts the effective driving voltage while remaining because there is no passage to exit when the inflow. If the effective driving voltage is changed, it becomes difficult to display a desired image and defects such as afterimage or flicker occur.                     

The solution to this problem will be described with reference to the eighth and ninth embodiments.

14 is a circuit diagram of a liquid crystal display according to an eighth embodiment of the present invention, and FIG. 15 is a layout view of a liquid crystal display according to an eighth embodiment of the present invention.

Referring to FIG. 14, the thin film transistor T2 connecting the second pixel electrode to the reference potential is formed, and the gate electrode thereof is connected to the front gate line. Therefore, before the on signal is applied to the main gate line and the image signal is charged to the first pixel electrode, the second pixel electrode is refreshed to the reference electrode potential.

In this case, even if abnormal charge flows into the second pixel electrode, since the second pixel electrode is refreshed at the reference potential every frame, the image signal is not distorted.

FIG. 15 is a layout view of a liquid crystal display that specifically embodies the circuit diagram of FIG. 14.

The liquid crystal display according to the eighth embodiment also includes a liquid crystal layer 3 including liquid crystal molecules aligned between the lower display panel, the upper display panel facing the lower display panel, and the lower display panel and the upper display panel and oriented perpendicular to the display panel.

The lower panel of the liquid crystal display according to the eighth embodiment has the following configuration.

First and second pixel electrodes 190b and 190a made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) are formed on the insulating substrate 110 made of a transparent insulating material such as glass. have. The first pixel electrode 190b is connected to the drain electrode 175a of the first thin film transistor to receive an image signal voltage. The second pixel electrode 190a is electromagnetically coupled (capacitively coupled) with the first pixel electrode 190b by overlapping the coupling electrode 176 connected to the first pixel electrode 190b, and the second thin film. It is connected to the drain electrode 175b of the transistor to receive a reference potential.

In this case, the gate electrode 123a and the source electrode 173a of the first thin film transistor are connected to the main gate line 121 for transmitting the scan signal and the data line 171 for transmitting the image signal, respectively, according to the scan signal. The image signal applied to the first pixel electrode 190b is turned on.

The gate electrode 123b and the source electrode 173b of the second thin film transistor are connected to the front gate line 121 and the sustain electrode connection bridge 91, respectively, and according to the scan signal applied to the front gate line 121, the second electrode according to the scan signal. The pixel electrode 190a is refreshed at the reference potential.

The second thin film transistor includes an amorphous silicon layer 154b overlapping the front gate line 121 and an ohmic contact layer (not shown) thereon, and the source electrode 173b of the second thin film transistor includes a passivation layer 180. Is connected to the storage electrode connection part 91 through the contact hole 186 penetrating through the contact hole, and the drain electrode 175b of the second thin film transistor is connected to the second pixel through the contact hole 187 penetrating the passivation layer 180. It is connected to the electrode 190a.

The first pixel electrode 190b has a cutout 192.

Here, the first and second pixel electrodes 190a and 190b may not be made of a transparent material in the case of a reflective liquid crystal display.                     

16 is a circuit diagram of a liquid crystal display according to a ninth embodiment of the present invention, and FIG. 17 is a layout view of a liquid crystal display according to a ninth embodiment of the present invention.

Referring to FIG. 16, the second thin film transistor T2 connecting the second pixel electrode to the reference potential is formed, and the gate electrode is connected to the front gate line. In addition, a third thin film transistor T3 connecting the first pixel electrode and the second pixel electrode is formed, and the gate electrode thereof is connected to the front gate line like the second thin film transistor. Therefore, before the on signal is applied to the main gate line and the image signal is charged to the first pixel electrode, the first and second pixel electrodes are refreshed to the reference electrode potential.

When the image signal voltage Vd is applied to the first pixel electrode, the voltage V (b) applied to the second pixel electrode is represented by Vd × Ccp / (Ccp + Clcb).

In this case, even if abnormal charge flows into the second pixel electrode, since the first and second pixel electrodes are refreshed at the reference potential every frame, the image signal is not distorted. In addition, the second pixel electrode voltage V (b) is independent of the pixel electrode voltage applied to the previous frame, thereby preventing the image of the previous frame from affecting the image of the next frame.

17 is a layout view of a liquid crystal display that specifically embodies the circuit diagram of FIG. 16.

The liquid crystal display according to the ninth embodiment also includes a liquid crystal layer 3 including liquid crystal molecules aligned between the lower display panel, the upper display panel facing the lower display panel, and the lower display panel and the upper display panel and oriented perpendicular to the display panel.

The lower panel of the liquid crystal display according to the ninth embodiment has the following configuration.

First and second pixel electrodes 190b and 190a made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) are formed on the insulating substrate 110 made of a transparent insulating material such as glass. have.

The first pixel electrode 190b is connected to the drain electrode 175a of the first thin film transistor to receive an image signal voltage.

The second pixel electrode 190a is electromagnetically coupled (capacitively coupled) with the first pixel electrode 190b by overlapping the coupling electrode 176 connected to the first pixel electrode 190b, and the second thin film. It is connected to the drain electrode 175b of the transistor to receive a reference potential.

In addition, the coupling electrode 176 is connected to the source electrode 173c of the third thin film transistor, and the drain electrode 175c of the third thin film transistor is connected to the drain electrode 175b of the second thin film transistor. The reference potential is also applied to the electrode 176 through the second and third thin film transistors. Since the coupling electrode 176 is connected to the first pixel electrode 190b, a reference potential is applied to the first pixel electrode 190b together with the second pixel electrode 190a.

The gate electrode 123a and the source electrode 173a of the first thin film transistor are connected to the main gate line 121 that transmits the scan signal and the data line 171 that transmits the image signal, respectively, and according to the scan signal, the first pixel. The image signal applied to the electrode 190b is turned on.                     

The gate electrode 123b and the source electrode 173b of the second thin film transistor are connected to the front gate line 121 and the sustain electrode connection leg 91, respectively, and according to a scan signal applied to the front gate line 121. The two pixel electrodes 190a are refreshed at the reference potential.

Like the second thin film transistor, the gate electrode 123c of the third thin film transistor is also connected to the front gate line 121 so that when the second pixel electrode 190a is refreshed to the reference potential, the first pixel electrode 190b is also included. Refreshed to the reference potential.

The second thin film transistor includes an amorphous silicon layer 154b overlapping the front gate line 121 and an ohmic contact layer (not shown) thereon, and the source electrode 173b of the second thin film transistor includes a passivation layer 180. Is connected to the storage electrode connection part 91 through the contact hole 186 penetrating through the contact hole, and the drain electrode 175b of the second thin film transistor is connected to the second pixel through the contact hole 187 penetrating the passivation layer 180. It is connected to the electrode 190a.

The third thin film transistor also includes an amorphous silicon layer 154c overlapping the front gate line 121 and an ohmic contact layer (not shown) thereon, and the drain electrode 175c of the third thin film transistor includes a second thin film. The drain electrode of the transistor extends, and the source electrode 173c of the third thin film transistor extends from the coupling electrode 176.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights. In particular, the arrangement of the cutouts formed in the pixel electrode and the common electrode may be variously modified.

Through the above configuration, the side angle of the liquid crystal display device can be improved, and the viewing angle can be extended.

Claims (24)

delete delete delete delete delete delete delete An insulating substrate including a plurality of pixel regions, A first signal line formed on the insulating substrate, A second signal line insulated from and intersecting the first signal line, A first pixel electrode formed for each pixel region, A first thin film transistor having three terminals connected to the first signal line, the second signal line, and the first pixel electrode, respectively; A second pixel electrode formed in each pixel area and capacitively coupled to the first pixel electrode; A coupling electrode connected to the first pixel electrode and overlapping the second pixel electrode in an insulated state; A third signal line insulated from and intersecting the second signal line and to which a reference potential is applied; A second thin film transistor having three terminals connected to the first signal line, the second pixel electrode, and the third signal line, respectively; A third thin film transistor having three terminals connected to the first signal line, the coupling electrode, and the second pixel electrode, respectively; Thin film transistor array panel comprising a. In claim 8, The second thin film transistor and the third thin film transistor in the same pixel region are connected to the same first signal line, and the first thin film transistor and the second thin film transistor are respectively connected to adjacent first signal lines. Transistor display panel. An insulating substrate including a plurality of pixel regions, A first signal line formed on the insulating substrate, A second signal line insulated from and intersecting the first signal line, A first pixel electrode formed for each pixel region, A first thin film transistor having three terminals connected to the first signal line, the second signal line, and the first pixel electrode, respectively; A second pixel electrode formed in each pixel area and capacitively coupled to the first pixel electrode; A third signal line insulated from and intersecting the second signal line and to which a reference potential is applied; And a second thin film transistor having three terminals connected to the first signal line, the second pixel electrode, and the third signal line, respectively. In claim 10, And the first thin film transistor and the second thin film transistor in the same pixel region are respectively connected to adjacent first signal lines. delete delete delete delete delete First insulating substrate, A gate line formed on the first insulating substrate and including a gate electrode; A gate insulating film formed on the gate line, An amorphous silicon layer formed on the gate insulating film, An ohmic contact layer formed on the amorphous silicon layer, A data line formed on the gate insulating layer and including at least a portion of a source electrode formed on the ohmic contact layer; A drain electrode formed at least in part on the ohmic contact layer and opposing the source electrode, A coupling electrode formed on the gate insulating film, A protective film formed on the data line, the drain electrode and the coupling electrode; A first pixel electrode formed on the passivation layer and connected to the drain electrode and the coupling electrode; A second pixel electrode insulated from the first pixel electrode and overlapping at least a portion of the coupling electrode; A second insulating substrate facing the first insulating substrate, A common electrode formed on the second insulating substrate, First domain dividing means formed on the first insulating substrate, Second domain dividing means formed on the second insulating substrate and dividing the pixel region into a plurality of small domains together with the first domain dividing means; Including, And the coupling electrode overlaps the second domain dividing means. The method of claim 17, And the coupling electrode extends from the drain electrode. The method of claim 17, The coupling electrode is connected to the first pixel electrode through a contact hole of the passivation layer. The method of claim 17, The first domain dividing means is a cutout portion of at least one of the first pixel electrode and the second pixel electrode. And the second domain dividing means is a cutout of the common electrode. The method of claim 20, And the coupling electrode overlaps the second domain dividing means with a half or more portion. delete delete delete

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